• Home
• com.diozero
• diozero-core
• 1.4.0
• source code
• asus_rk3288-tinker.txt

×

Project download

Many resources are needed to download a project. Please understand that we have to compensate our server costs. Thank you in advance.
Project price only 1 $

You can buy this project and download/modify it how often you want.

boarddefs.asus_rk3288-tinker.txt Maven / Gradle / Ivy

General, DEFAULT, 1, 3v3
General, DEFAULT, 2, 5v
General, DEFAULT, 4, 5v
General, DEFAULT, 6, GND
General, DEFAULT, 9, GND
General, DEFAULT, 14, GND
General, DEFAULT, 17, 3v3
General, DEFAULT, 20, GND
General, DEFAULT, 25, GND
General, DEFAULT, 30, GND
General, DEFAULT, 34, GND
General, DEFAULT, 39, GND

# Format is:
# GPIO, Header, GPIO#, Name, Physical Pin, Chip, Line, Modes

# GPIO Chip 0, 3 banks of 8 GPIOs = 24 lines; offset = 0
GPIO, DEFAULT, 17, GPIO0_C1, 7, 0, 17, DIGITAL_INPUT | DIGITAL_OUTPUT   # CLKOUT

# GPIO Chip 1, 4 banks of 8 GPIOs = 32 lines; offset = 24
# GPIO Chip 2, 4 banks of 8 GPIOs = 32 lines; offset = 56
# GPIO Chip 3, 4 banks of 8 GPIOs = 32 lines; offset = 88
# GPIO Chip 4, 4 banks of 8 GPIOs = 32 lines; offset = 120

# GPIO Chip 5, 4 banks of 8 GPIOs = 32 lines; offset = 152
GPIO, DEFAULT, 160, GPIO5_B0, 10, 5, 8, DIGITAL_INPUT | DIGITAL_OUTPUT  # UART-1 RX
GPIO, DEFAULT, 161, GPIO5_B1, 8, 5, 9, DIGITAL_INPUT | DIGITAL_OUTPUT   # UART-1 TX
GPIO, DEFAULT, 162, GPIO5_B2, 16, 5, 10, DIGITAL_INPUT | DIGITAL_OUTPUT # UART-1 CTSN
GPIO, DEFAULT, 163, GPIO5_B3, 18, 5, 11, DIGITAL_INPUT | DIGITAL_OUTPUT # UART-1 RTSN
GPIO, DEFAULT, 164, GPIO5_B4, 11, 5, 12, DIGITAL_INPUT | DIGITAL_OUTPUT # SPI-0 CLK
GPIO, DEFAULT, 165, GPIO5_B5, 29, 5, 13, DIGITAL_INPUT | DIGITAL_OUTPUT # SPI-0 CS N0
GPIO, DEFAULT, 166, GPIO5_B6, 13, 5, 14, DIGITAL_INPUT | DIGITAL_OUTPUT # SPI-0 TX
GPIO, DEFAULT, 167, GPIO5_B7, 15, 5, 15, DIGITAL_INPUT | DIGITAL_OUTPUT # SPI-0 RX
GPIO, DEFAULT, 168, GPIO5_C0, 31, 5, 16, DIGITAL_INPUT | DIGITAL_OUTPUT # SPI-0 CS N1
GPIO, DEFAULT, 171, GPIO5_C3, 22, 5, 19, DIGITAL_INPUT | DIGITAL_OUTPUT

# GPIO Chip 6, 4 banks of 8 GPIOs = 32 lines; offset = 184
GPIO, DEFAULT, 184, GPIO6_A0, 12, 6, 0, DIGITAL_INPUT | DIGITAL_OUTPUT  # PCM / I2C CLK
GPIO, DEFAULT, 185, GPIO6_A1, 35, 6, 1, DIGITAL_INPUT | DIGITAL_OUTPUT  # PCM I2S FS
GPIO, DEFAULT, 187, GPIO6_A3, 38, 6, 3, DIGITAL_INPUT | DIGITAL_OUTPUT  # I2S SDI
GPIO, DEFAULT, 188, GPIO6_A4, 40, 6, 4, DIGITAL_INPUT | DIGITAL_OUTPUT  # I2S SDO

# GPIO Chip 7, 4 banks of 8 GPIOs = 32 lines; offset = 216
GPIO, DEFAULT, 223, GPIO7_A7, 36, 7, 7, DIGITAL_INPUT | DIGITAL_OUTPUT  # UART-3 RX
GPIO, DEFAULT, 224, GPIO7_B0, 37, 7, 8, DIGITAL_INPUT | DIGITAL_OUTPUT  # UART-3 TX
GPIO, DEFAULT, 233, GPIO7_C1, 27, 7, 17, DIGITAL_INPUT | DIGITAL_OUTPUT # I2C-4 SDA
GPIO, DEFAULT, 234, GPIO7_C2, 28, 7, 18, DIGITAL_INPUT | DIGITAL_OUTPUT # I2C-4 SCL
PWM, DEFAULT, 238, GPIO7_C6, 33, 7, 22, 0, 0, DIGITAL_INPUT | DIGITAL_OUTPUT | PWM_OUTPUT # UART-2 RX
PWM, DEFAULT, 239, GPIO7_C7, 32, 7, 23, 0, 1, DIGITAL_INPUT | DIGITAL_OUTPUT | PWM_OUTPUT # UART-2 TX

# GPIO Chip 8, 2 banks of 8 GPIOs = 16 lines; offset = 248
GPIO, DEFAULT, 251, GPIO8_A3, 26, 8, 3, DIGITAL_INPUT | DIGITAL_OUTPUT  # SPI-2 CS N1
GPIO, DEFAULT, 252, GPIO8_A4, 3, 8, 4, DIGITAL_INPUT | DIGITAL_OUTPUT   # I2C-1 SDA
GPIO, DEFAULT, 253, GPIO8_A5, 5, 8, 5, DIGITAL_INPUT | DIGITAL_OUTPUT   # I2C-1 SCL
GPIO, DEFAULT, 254, GPIO8_A6, 23, 8, 6, DIGITAL_INPUT | DIGITAL_OUTPUT  # SPI-2 CLK
GPIO, DEFAULT, 255, GPIO8_A7, 24, 8, 7, DIGITAL_INPUT | DIGITAL_OUTPUT  # SPI-2 CS N0
GPIO, DEFAULT, 256, GPIO8_B0, 21, 8, 8, DIGITAL_INPUT | DIGITAL_OUTPUT  # SPI-2 RX
GPIO, DEFAULT, 257, GPIO8_B1, 19, 8, 9, DIGITAL_INPUT | DIGITAL_OUTPUT  # SPI-2 TX