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PlantUML is a component that allows to quickly write diagrams from text.
// THIS FILE HAS BEEN GENERATED BY A PREPROCESSOR.
package h;
import smetana.core.ACCESS;
import smetana.core.CStarStar;
import smetana.core.FieldOffset;
import smetana.core.UnsupportedStarStruct;
import smetana.core.__ptr__;
final public class ST_Agsubnode_s extends UnsupportedStarStruct {
public final ST_dtlink_s seq_link = new ST_dtlink_s(this);
public final ST_dtlink_s id_link = new ST_dtlink_s(this);
public ST_Agnode_s node;
public ST_dtlink_s in_id;
public CStarStar in_id_AMP() {
return CStarStar.BUILD(new ACCESS() {
public ST_dtlink_s get() {
return in_id;
}
public void set(ST_dtlink_s data) {
in_id = data;
}
});
}
public ST_dtlink_s out_id;
public CStarStar out_id_AMP() {
return CStarStar.BUILD(new ACCESS() {
public ST_dtlink_s get() {
return out_id;
}
public void set(ST_dtlink_s data) {
out_id = data;
}
});
}
public ST_dtlink_s in_seq;
public CStarStar in_seq_AMP() {
return CStarStar.BUILD(new ACCESS() {
public ST_dtlink_s get() {
return in_seq;
}
public void set(ST_dtlink_s data) {
in_seq = data;
}
});
}
public ST_dtlink_s out_seq;
public CStarStar out_seq_AMP() {
return CStarStar.BUILD(new ACCESS() {
public ST_dtlink_s get() {
return out_seq;
}
public void set(ST_dtlink_s data) {
out_seq = data;
}
});
}
@Override
public boolean isSameThan(__ptr__ other) {
return this == (ST_Agsubnode_s) other;
}
@Override
public Object getTheField(FieldOffset offset) {
if (offset == null || offset.getSign() == 0)
return this;
if (offset == FieldOffset.id_link)
return id_link;
if (offset == FieldOffset.seq_link)
return seq_link;
throw new UnsupportedOperationException();
}
@Override
public __ptr__ castTo(Class dest) {
if (dest == ST_Agsubnode_s.class) {
return ST_Agsubnode_s.this;
}
System.err.println("dest=" + dest);
return super.castTo(dest);
}
}
// struct Agsubnode_s { /* the node-per-graph-or-subgraph record */
// Dtlink_t seq_link; /* must be first */
// Dtlink_t id_link;
// Agnode_t *node; /* the object */
// Dtlink_t *in_id, *out_id; /* by node/ID for random access */
// Dtlink_t *in_seq, *out_seq; /* by node/sequence for serial access */
// };