
gust.linalg.cuda.matrix_kernels_float.ptx Maven / Gradle / Ivy
The newest version!
//
// Generated by NVIDIA NVVM Compiler
// Compiler built on Thu Sep 5 12:08:11 2013 (1378400891)
// Cuda compilation tools, release 5.5, V5.5.0
//
.version 3.2
.target sm_30
.address_size 64
.file 1 "/Users/dlwh/src/gust/src/main/resources/gust/linalg/cuda/matrix_kernels_float.cu", 1404413058, 7022
.file 2 "/Users/dlwh/src/gust/src/main/resources/gust/linalg/cuda/function_decls.cuh", 1401993266, 1803
.file 3 "/Developer/NVIDIA/CUDA-5.5/bin//../include/math_functions.h", 1378419394, 390673
.file 4 "/Developer/NVIDIA/CUDA-5.5/bin//../include/device_functions.h", 1378419394, 185228
.file 5 "/Developer/NVIDIA/CUDA-5.5/bin//../include/sm_30_intrinsics.h", 1378419394, 6616
// map2_transpose_add_float$__cuda_local_var_32576_1730_non_const_tile has been demoted
// map2_transpose_sub_float$__cuda_local_var_32577_1730_non_const_tile has been demoted
// map2_transpose_mul_float$__cuda_local_var_32578_1730_non_const_tile has been demoted
// map2_transpose_div_float$__cuda_local_var_32579_1730_non_const_tile has been demoted
// map2_transpose_mod_float$__cuda_local_var_32580_1730_non_const_tile has been demoted
// map2_transpose_pow_float$__cuda_local_var_32581_1730_non_const_tile has been demoted
// map2_transpose_max_float$__cuda_local_var_32582_1730_non_const_tile has been demoted
// map2_transpose_min_float$__cuda_local_var_32583_1730_non_const_tile has been demoted
// map2_transpose_set_float$__cuda_local_var_32584_1730_non_const_tile has been demoted
.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
.global .align 1 .b8 $str[11] = {95, 95, 67, 85, 68, 65, 95, 70, 84, 90, 0};
.visible .entry map_negate_float(
.param .u32 map_negate_float_param_0,
.param .u32 map_negate_float_param_1,
.param .u64 map_negate_float_param_2,
.param .u32 map_negate_float_param_3,
.param .u64 map_negate_float_param_4,
.param .u32 map_negate_float_param_5
)
{
.reg .pred %p<5>;
.reg .f32 %f<3>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map_negate_float_param_0];
ld.param.u32 %r13, [map_negate_float_param_1];
ld.param.u64 %rd3, [map_negate_float_param_2];
ld.param.u32 %r14, [map_negate_float_param_3];
ld.param.u64 %rd4, [map_negate_float_param_4];
ld.param.u32 %r15, [map_negate_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 3 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 3 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB0_6;
.loc 2 3 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 3 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 3 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB0_2:
.loc 2 3 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB0_5;
.loc 2 3 1
mul.lo.s32 %r7, %r25, %r15;
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB0_4:
.loc 2 3 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 3 1
ld.global.f32 %f1, [%rd6];
neg.f32 %f2, %f1;
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 3 1
st.global.f32 [%rd8], %f2;
.loc 2 3 22
add.s32 %r10, %r5, %r9;
.loc 2 3 1
setp.lt.s32 %p3, %r10, %r12;
mov.u32 %r26, %r10;
@%p3 bra BB0_4;
BB0_5:
.loc 2 3 22
add.s32 %r25, %r4, %r25;
.loc 2 3 1
setp.lt.s32 %p4, %r25, %r13;
@%p4 bra BB0_2;
BB0_6:
.loc 2 3 2
ret;
}
.visible .entry map_acos_float(
.param .u32 map_acos_float_param_0,
.param .u32 map_acos_float_param_1,
.param .u64 map_acos_float_param_2,
.param .u32 map_acos_float_param_3,
.param .u64 map_acos_float_param_4,
.param .u32 map_acos_float_param_5
)
{
.reg .pred %p<7>;
.reg .f32 %f<27>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map_acos_float_param_0];
ld.param.u32 %r13, [map_acos_float_param_1];
ld.param.u64 %rd3, [map_acos_float_param_2];
ld.param.u32 %r14, [map_acos_float_param_3];
ld.param.u64 %rd4, [map_acos_float_param_4];
ld.param.u32 %r15, [map_acos_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 4 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 4 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB1_6;
.loc 2 4 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 4 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 4 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB1_2:
.loc 2 4 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB1_5;
.loc 2 4 1
mul.lo.s32 %r7, %r25, %r15;
.loc 2 4 99
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB1_4:
.loc 2 4 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 4 1
ld.global.f32 %f1, [%rd6];
.loc 3 8464 10
abs.f32 %f2, %f1;
mov.f32 %f3, 0f3F800000;
.loc 3 8464 10
sub.f32 %f4, %f3, %f2;
mul.f32 %f5, %f4, 0f3F000000;
sqrt.rn.f32 %f6, %f5;
setp.gt.f32 %p3, %f2, 0f3F11EB85;
selp.f32 %f7, %f6, %f2, %p3;
mul.f32 %f8, %f7, %f7;
mov.f32 %f9, 0f3C94D2E9;
mov.f32 %f10, 0f3D53F941;
.loc 3 8464 10
fma.rn.f32 %f11, %f10, %f8, %f9;
mov.f32 %f12, 0f3D3F841F;
.loc 3 8464 10
fma.rn.f32 %f13, %f11, %f8, %f12;
mov.f32 %f14, 0f3D994929;
.loc 3 8464 10
fma.rn.f32 %f15, %f13, %f8, %f14;
mov.f32 %f16, 0f3E2AAB94;
.loc 3 8464 10
fma.rn.f32 %f17, %f15, %f8, %f16;
mul.f32 %f18, %f17, %f8;
fma.rn.f32 %f19, %f18, %f7, %f7;
add.f32 %f20, %f19, %f19;
mov.f32 %f21, 0f3FC90FDB;
.loc 3 8464 10
sub.f32 %f22, %f21, %f19;
selp.f32 %f23, %f20, %f22, %p3;
setp.lt.f32 %p4, %f1, 0f00000000;
mov.f32 %f24, 0f40490FDB;
.loc 3 8464 10
sub.f32 %f25, %f24, %f23;
selp.f32 %f26, %f25, %f23, %p4;
.loc 2 4 99
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 4 99
st.global.f32 [%rd8], %f26;
.loc 2 4 22
add.s32 %r10, %r5, %r9;
.loc 2 4 1
setp.lt.s32 %p5, %r10, %r12;
mov.u32 %r26, %r10;
@%p5 bra BB1_4;
BB1_5:
.loc 2 4 22
add.s32 %r25, %r4, %r25;
.loc 2 4 1
setp.lt.s32 %p6, %r25, %r13;
@%p6 bra BB1_2;
BB1_6:
.loc 2 4 2
ret;
}
.visible .entry map_acosh_float(
.param .u32 map_acosh_float_param_0,
.param .u32 map_acosh_float_param_1,
.param .u64 map_acosh_float_param_2,
.param .u32 map_acosh_float_param_3,
.param .u64 map_acosh_float_param_4,
.param .u32 map_acosh_float_param_5
)
{
.reg .pred %p<19>;
.reg .f32 %f<86>;
.reg .s32 %r<35>;
.reg .s64 %rd<9>;
ld.param.u32 %r10, [map_acosh_float_param_0];
ld.param.u32 %r11, [map_acosh_float_param_1];
ld.param.u64 %rd3, [map_acosh_float_param_2];
ld.param.u32 %r12, [map_acosh_float_param_3];
ld.param.u64 %rd4, [map_acosh_float_param_4];
ld.param.u32 %r13, [map_acosh_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 5 1
mov.u32 %r14, %ntid.x;
mov.u32 %r15, %ctaid.x;
mov.u32 %r16, %tid.x;
mad.lo.s32 %r33, %r14, %r15, %r16;
.loc 2 5 1
setp.ge.s32 %p1, %r33, %r11;
@%p1 bra BB2_16;
.loc 2 5 1
mov.u32 %r17, %tid.y;
mov.u32 %r18, %ntid.y;
mov.u32 %r19, %ctaid.y;
mad.lo.s32 %r2, %r18, %r19, %r17;
.loc 2 5 22
mov.u32 %r20, %nctaid.y;
mul.lo.s32 %r3, %r20, %r18;
BB2_2:
.loc 2 5 1
setp.ge.s32 %p2, %r2, %r10;
@%p2 bra BB2_15;
.loc 2 5 1
mul.lo.s32 %r5, %r33, %r13;
.loc 2 5 91
mul.lo.s32 %r6, %r33, %r12;
mov.u32 %r34, %r2;
BB2_4:
.loc 2 5 1
mov.u32 %r7, %r34;
add.s32 %r21, %r7, %r5;
mul.wide.s32 %rd5, %r21, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 5 1
ld.global.f32 %f1, [%rd6];
.loc 3 8492 10
add.f32 %f2, %f1, 0fBF800000;
abs.f32 %f13, %f2;
setp.gt.f32 %p3, %f13, 0f4B000000;
@%p3 bra BB2_10;
mul.rz.f32 %f14, %f1, %f2;
add.rn.f32 %f15, %f14, %f2;
sqrt.rn.f32 %f16, %f15;
add.f32 %f3, %f2, %f16;
setp.le.f32 %p4, %f3, 0f3F266666;
setp.ge.f32 %p5, %f3, 0fBEC9BA5E;
and.pred %p6, %p5, %p4;
@%p6 bra BB2_9;
add.f32 %f4, %f3, 0f3F800000;
setp.gt.f32 %p7, %f4, 0f00000000;
setp.lt.f32 %p8, %f4, 0f7F800000;
and.pred %p9, %p7, %p8;
@%p9 bra BB2_8;
lg2.approx.f32 %f85, %f4;
bra.uni BB2_14;
BB2_8:
.loc 3 8492 10
setp.lt.f32 %p10, %f4, 0f00800000;
mul.f32 %f19, %f4, 0f4B800000;
selp.f32 %f20, %f19, %f4, %p10;
selp.f32 %f21, 0fC3170000, 0fC2FE0000, %p10;
mov.b32 %r22, %f20;
and.b32 %r23, %r22, 8388607;
or.b32 %r24, %r23, 1065353216;
mov.b32 %f22, %r24;
shr.u32 %r25, %r22, 23;
cvt.rn.f32.u32 %f23, %r25;
add.f32 %f24, %f21, %f23;
setp.gt.f32 %p11, %f22, 0f3FB504F3;
mul.f32 %f25, %f22, 0f3F000000;
add.f32 %f26, %f24, 0f3F800000;
selp.f32 %f27, %f25, %f22, %p11;
selp.f32 %f28, %f26, %f24, %p11;
add.f32 %f29, %f27, 0fBF800000;
add.f32 %f18, %f27, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f17,%f18;
// inline asm
neg.f32 %f30, %f29;
mul.f32 %f31, %f29, %f30;
mul.rn.f32 %f32, %f17, %f31;
add.rn.f32 %f33, %f29, %f32;
mul.f32 %f34, %f33, %f33;
mov.f32 %f35, 0f3C4C4BE0;
mov.f32 %f36, 0f3B2063C3;
.loc 3 8492 10
fma.rn.f32 %f37, %f36, %f34, %f35;
mov.f32 %f38, 0f3DAAAB50;
.loc 3 8492 10
fma.rn.f32 %f39, %f37, %f34, %f38;
mul.f32 %f40, %f39, %f34;
fma.rn.f32 %f41, %f40, %f33, %f32;
add.f32 %f42, %f41, %f29;
mov.f32 %f43, 0f3F317218;
.loc 3 8492 10
fma.rn.f32 %f85, %f28, %f43, %f42;
bra.uni BB2_14;
BB2_9:
.loc 3 8492 10
add.f32 %f44, %f3, 0f40000000;
div.approx.f32 %f45, %f3, %f44;
neg.f32 %f46, %f3;
mul.rn.f32 %f47, %f46, %f45;
add.rn.f32 %f48, %f3, %f47;
mul.f32 %f49, %f48, %f48;
mov.f32 %f50, 0f3C4C4BE0;
mov.f32 %f51, 0f3B2063C3;
.loc 3 8492 10
fma.rn.f32 %f52, %f51, %f49, %f50;
mov.f32 %f53, 0f3DAAAB50;
.loc 3 8492 10
fma.rn.f32 %f54, %f52, %f49, %f53;
mul.f32 %f55, %f54, %f49;
fma.rn.f32 %f56, %f55, %f48, %f47;
add.f32 %f85, %f56, %f3;
bra.uni BB2_14;
BB2_10:
.loc 3 8492 10
setp.gt.f32 %p12, %f1, 0f00000000;
setp.lt.f32 %p13, %f1, 0f7F800000;
and.pred %p14, %p12, %p13;
@%p14 bra BB2_12;
lg2.approx.f32 %f84, %f1;
bra.uni BB2_13;
BB2_12:
.loc 3 8492 10
setp.lt.f32 %p15, %f1, 0f00800000;
mul.f32 %f59, %f1, 0f4B800000;
selp.f32 %f60, %f59, %f1, %p15;
selp.f32 %f61, 0fC3170000, 0fC2FE0000, %p15;
mov.b32 %r26, %f60;
and.b32 %r27, %r26, 8388607;
or.b32 %r28, %r27, 1065353216;
mov.b32 %f62, %r28;
shr.u32 %r29, %r26, 23;
cvt.rn.f32.u32 %f63, %r29;
add.f32 %f64, %f61, %f63;
setp.gt.f32 %p16, %f62, 0f3FB504F3;
mul.f32 %f65, %f62, 0f3F000000;
add.f32 %f66, %f64, 0f3F800000;
selp.f32 %f67, %f65, %f62, %p16;
selp.f32 %f68, %f66, %f64, %p16;
add.f32 %f69, %f67, 0fBF800000;
add.f32 %f58, %f67, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f57,%f58;
// inline asm
neg.f32 %f70, %f69;
mul.f32 %f71, %f69, %f70;
mul.rn.f32 %f72, %f57, %f71;
add.rn.f32 %f73, %f69, %f72;
mul.f32 %f74, %f73, %f73;
mov.f32 %f75, 0f3C4C4BE0;
mov.f32 %f76, 0f3B2063C3;
.loc 3 8492 10
fma.rn.f32 %f77, %f76, %f74, %f75;
mov.f32 %f78, 0f3DAAAB50;
.loc 3 8492 10
fma.rn.f32 %f79, %f77, %f74, %f78;
mul.f32 %f80, %f79, %f74;
fma.rn.f32 %f81, %f80, %f73, %f72;
add.f32 %f82, %f81, %f69;
mov.f32 %f83, 0f3F317218;
.loc 3 8492 10
fma.rn.f32 %f84, %f68, %f83, %f82;
BB2_13:
add.f32 %f85, %f84, 0f3F317218;
BB2_14:
.loc 2 5 91
add.s32 %r30, %r7, %r6;
mul.wide.s32 %rd7, %r30, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 5 91
st.global.f32 [%rd8], %f85;
.loc 2 5 22
add.s32 %r8, %r3, %r7;
.loc 2 5 1
setp.lt.s32 %p17, %r8, %r10;
mov.u32 %r34, %r8;
@%p17 bra BB2_4;
BB2_15:
.loc 2 5 22
mov.u32 %r31, %nctaid.x;
mad.lo.s32 %r33, %r31, %r14, %r33;
.loc 2 5 1
setp.lt.s32 %p18, %r33, %r11;
@%p18 bra BB2_2;
BB2_16:
.loc 2 5 2
ret;
}
.visible .entry map_asin_float(
.param .u32 map_asin_float_param_0,
.param .u32 map_asin_float_param_1,
.param .u64 map_asin_float_param_2,
.param .u32 map_asin_float_param_3,
.param .u64 map_asin_float_param_4,
.param .u32 map_asin_float_param_5
)
{
.reg .pred %p<7>;
.reg .f32 %f<26>;
.reg .s32 %r<31>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map_asin_float_param_0];
ld.param.u32 %r13, [map_asin_float_param_1];
ld.param.u64 %rd3, [map_asin_float_param_2];
ld.param.u32 %r14, [map_asin_float_param_3];
ld.param.u64 %rd4, [map_asin_float_param_4];
ld.param.u32 %r15, [map_asin_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 6 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r29, %r1, %r16, %r17;
.loc 2 6 1
setp.ge.s32 %p1, %r29, %r13;
@%p1 bra BB3_6;
.loc 2 6 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 6 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 6 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB3_2:
.loc 2 6 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB3_5;
.loc 2 6 1
mul.lo.s32 %r7, %r29, %r15;
.loc 2 6 99
mul.lo.s32 %r8, %r29, %r14;
mov.u32 %r30, %r3;
BB3_4:
.loc 2 6 1
mov.u32 %r9, %r30;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 6 1
ld.global.f32 %f1, [%rd6];
.loc 3 8459 10
abs.f32 %f2, %f1;
mov.f32 %f3, 0f3F800000;
.loc 3 8459 10
sub.f32 %f4, %f3, %f2;
mul.f32 %f5, %f4, 0f3F000000;
sqrt.rn.f32 %f6, %f5;
setp.gt.f32 %p3, %f2, 0f3F11EB85;
selp.f32 %f7, %f6, %f2, %p3;
mul.f32 %f8, %f7, %f7;
mov.f32 %f9, 0f3C94D2E9;
mov.f32 %f10, 0f3D53F941;
.loc 3 8459 10
fma.rn.f32 %f11, %f10, %f8, %f9;
mov.f32 %f12, 0f3D3F841F;
.loc 3 8459 10
fma.rn.f32 %f13, %f11, %f8, %f12;
mov.f32 %f14, 0f3D994929;
.loc 3 8459 10
fma.rn.f32 %f15, %f13, %f8, %f14;
mov.f32 %f16, 0f3E2AAB94;
.loc 3 8459 10
fma.rn.f32 %f17, %f15, %f8, %f16;
mul.f32 %f18, %f17, %f8;
fma.rn.f32 %f19, %f18, %f7, %f7;
mov.f32 %f20, 0f3FC90FDB;
mov.f32 %f21, 0fC0000000;
.loc 3 8459 10
fma.rn.f32 %f22, %f21, %f19, %f20;
selp.f32 %f23, %f22, %f19, %p3;
setp.gtu.f32 %p4, %f23, 0f7F800000;
mov.b32 %r24, %f23;
mov.b32 %r25, %f1;
and.b32 %r26, %r25, -2147483648;
or.b32 %r27, %r24, %r26;
mov.b32 %f24, %r27;
selp.f32 %f25, %f23, %f24, %p4;
.loc 2 6 99
add.s32 %r28, %r9, %r8;
mul.wide.s32 %rd7, %r28, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 6 99
st.global.f32 [%rd8], %f25;
.loc 2 6 22
add.s32 %r10, %r5, %r9;
.loc 2 6 1
setp.lt.s32 %p5, %r10, %r12;
mov.u32 %r30, %r10;
@%p5 bra BB3_4;
BB3_5:
.loc 2 6 22
add.s32 %r29, %r4, %r29;
.loc 2 6 1
setp.lt.s32 %p6, %r29, %r13;
@%p6 bra BB3_2;
BB3_6:
.loc 2 6 2
ret;
}
.visible .entry map_asinh_float(
.param .u32 map_asinh_float_param_0,
.param .u32 map_asinh_float_param_1,
.param .u64 map_asinh_float_param_2,
.param .u32 map_asinh_float_param_3,
.param .u64 map_asinh_float_param_4,
.param .u32 map_asinh_float_param_5
)
{
.reg .pred %p<15>;
.reg .f32 %f<62>;
.reg .s32 %r<35>;
.reg .s64 %rd<9>;
ld.param.u32 %r10, [map_asinh_float_param_0];
ld.param.u32 %r11, [map_asinh_float_param_1];
ld.param.u64 %rd2, [map_asinh_float_param_2];
ld.param.u32 %r12, [map_asinh_float_param_3];
ld.param.u64 %rd3, [map_asinh_float_param_4];
ld.param.u32 %r13, [map_asinh_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
.loc 2 7 1
mov.u32 %r14, %ntid.x;
mov.u32 %r15, %ctaid.x;
mov.u32 %r16, %tid.x;
mad.lo.s32 %r33, %r14, %r15, %r16;
.loc 2 7 1
setp.ge.s32 %p1, %r33, %r11;
@%p1 bra BB4_13;
.loc 2 7 1
mov.u32 %r17, %tid.y;
mov.u32 %r18, %ntid.y;
mov.u32 %r19, %ctaid.y;
mad.lo.s32 %r2, %r18, %r19, %r17;
.loc 2 7 22
mov.u32 %r20, %nctaid.y;
mul.lo.s32 %r3, %r20, %r18;
cvta.to.global.u64 %rd6, %rd2;
BB4_2:
.loc 2 7 1
setp.ge.s32 %p2, %r2, %r10;
@%p2 bra BB4_12;
.loc 2 7 1
mul.lo.s32 %r5, %r33, %r13;
.loc 2 7 91
mul.lo.s32 %r6, %r33, %r12;
mov.u32 %r34, %r2;
BB4_4:
.loc 2 7 1
mov.u32 %r7, %r34;
add.s32 %r21, %r7, %r5;
mul.wide.s32 %rd4, %r21, 4;
add.s64 %rd5, %rd1, %rd4;
.loc 2 7 1
ld.global.f32 %f1, [%rd5];
.loc 3 8497 10
abs.f32 %f2, %f1;
setp.gt.f32 %p3, %f2, 0f7E800000;
@%p3 bra BB4_10;
rcp.rn.f32 %f12, %f2;
mov.f32 %f13, 0f3F800000;
.loc 3 8497 10
fma.rn.f32 %f14, %f12, %f12, %f13;
sqrt.rn.f32 %f15, %f14;
add.f32 %f11, %f12, %f15;
// inline asm
rcp.approx.ftz.f32 %f10,%f11;
// inline asm
fma.rn.f32 %f3, %f2, %f10, %f2;
setp.le.f32 %p4, %f3, 0f3F266666;
setp.ge.f32 %p5, %f3, 0fBEC9BA5E;
and.pred %p6, %p5, %p4;
@%p6 bra BB4_9;
add.f32 %f4, %f3, 0f3F800000;
setp.gt.f32 %p7, %f4, 0f00000000;
setp.lt.f32 %p8, %f4, 0f7F800000;
and.pred %p9, %p7, %p8;
@%p9 bra BB4_8;
lg2.approx.f32 %f61, %f4;
bra.uni BB4_11;
BB4_8:
.loc 3 8497 10
setp.lt.f32 %p10, %f4, 0f00800000;
mul.f32 %f18, %f4, 0f4B800000;
selp.f32 %f19, %f18, %f4, %p10;
selp.f32 %f20, 0fC3170000, 0fC2FE0000, %p10;
mov.b32 %r22, %f19;
and.b32 %r23, %r22, 8388607;
or.b32 %r24, %r23, 1065353216;
mov.b32 %f21, %r24;
shr.u32 %r25, %r22, 23;
cvt.rn.f32.u32 %f22, %r25;
add.f32 %f23, %f20, %f22;
setp.gt.f32 %p11, %f21, 0f3FB504F3;
mul.f32 %f24, %f21, 0f3F000000;
add.f32 %f25, %f23, 0f3F800000;
selp.f32 %f26, %f24, %f21, %p11;
selp.f32 %f27, %f25, %f23, %p11;
add.f32 %f28, %f26, 0fBF800000;
add.f32 %f17, %f26, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f16,%f17;
// inline asm
neg.f32 %f29, %f28;
mul.f32 %f30, %f28, %f29;
mul.rn.f32 %f31, %f16, %f30;
add.rn.f32 %f32, %f28, %f31;
mul.f32 %f33, %f32, %f32;
mov.f32 %f34, 0f3C4C4BE0;
mov.f32 %f35, 0f3B2063C3;
.loc 3 8497 10
fma.rn.f32 %f36, %f35, %f33, %f34;
mov.f32 %f37, 0f3DAAAB50;
.loc 3 8497 10
fma.rn.f32 %f38, %f36, %f33, %f37;
mul.f32 %f39, %f38, %f33;
fma.rn.f32 %f40, %f39, %f32, %f31;
add.f32 %f41, %f40, %f28;
mov.f32 %f42, 0f3F317218;
.loc 3 8497 10
fma.rn.f32 %f61, %f27, %f42, %f41;
bra.uni BB4_11;
BB4_9:
.loc 3 8497 10
add.f32 %f43, %f3, 0f40000000;
div.approx.f32 %f44, %f3, %f43;
neg.f32 %f45, %f3;
mul.rn.f32 %f46, %f45, %f44;
add.rn.f32 %f47, %f3, %f46;
mul.f32 %f48, %f47, %f47;
mov.f32 %f49, 0f3C4C4BE0;
mov.f32 %f50, 0f3B2063C3;
.loc 3 8497 10
fma.rn.f32 %f51, %f50, %f48, %f49;
mov.f32 %f52, 0f3DAAAB50;
.loc 3 8497 10
fma.rn.f32 %f53, %f51, %f48, %f52;
mul.f32 %f54, %f53, %f48;
fma.rn.f32 %f55, %f54, %f47, %f46;
add.f32 %f61, %f55, %f3;
bra.uni BB4_11;
BB4_10:
.loc 3 8497 10
lg2.approx.f32 %f56, %f2;
mul.f32 %f57, %f56, 0f3F317218;
mov.f32 %f58, 0f3F317218;
.loc 3 8497 10
add.rn.f32 %f61, %f58, %f57;
BB4_11:
mov.b32 %r26, %f1;
and.b32 %r27, %r26, -2147483648;
mov.b32 %r28, %f61;
or.b32 %r29, %r28, %r27;
mov.b32 %f59, %r29;
setp.gtu.f32 %p12, %f2, 0f7F800000;
selp.f32 %f60, %f61, %f59, %p12;
.loc 2 7 91
add.s32 %r30, %r7, %r6;
mul.wide.s32 %rd7, %r30, 4;
add.s64 %rd8, %rd6, %rd7;
.loc 2 7 91
st.global.f32 [%rd8], %f60;
.loc 2 7 22
add.s32 %r8, %r3, %r7;
.loc 2 7 1
setp.lt.s32 %p13, %r8, %r10;
mov.u32 %r34, %r8;
@%p13 bra BB4_4;
BB4_12:
.loc 2 7 22
mov.u32 %r31, %nctaid.x;
mad.lo.s32 %r33, %r31, %r14, %r33;
.loc 2 7 1
setp.lt.s32 %p14, %r33, %r11;
@%p14 bra BB4_2;
BB4_13:
.loc 2 7 2
ret;
}
.visible .entry map_atan_float(
.param .u32 map_atan_float_param_0,
.param .u32 map_atan_float_param_1,
.param .u64 map_atan_float_param_2,
.param .u32 map_atan_float_param_3,
.param .u64 map_atan_float_param_4,
.param .u32 map_atan_float_param_5
)
{
.reg .pred %p<8>;
.reg .f32 %f<26>;
.reg .s32 %r<31>;
.reg .s64 %rd<9>;
ld.param.u32 %r10, [map_atan_float_param_0];
ld.param.u32 %r11, [map_atan_float_param_1];
ld.param.u64 %rd3, [map_atan_float_param_2];
ld.param.u32 %r12, [map_atan_float_param_3];
ld.param.u64 %rd4, [map_atan_float_param_4];
ld.param.u32 %r13, [map_atan_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 8 1
mov.u32 %r14, %ntid.x;
mov.u32 %r15, %ctaid.x;
mov.u32 %r16, %tid.x;
mad.lo.s32 %r29, %r14, %r15, %r16;
.loc 2 8 1
setp.ge.s32 %p1, %r29, %r11;
@%p1 bra BB5_8;
.loc 2 8 1
mov.u32 %r17, %tid.y;
mov.u32 %r18, %ntid.y;
mov.u32 %r19, %ctaid.y;
mad.lo.s32 %r2, %r18, %r19, %r17;
.loc 2 8 22
mov.u32 %r20, %nctaid.y;
mul.lo.s32 %r3, %r20, %r18;
BB5_2:
.loc 2 8 1
setp.ge.s32 %p2, %r2, %r10;
@%p2 bra BB5_7;
.loc 2 8 1
mul.lo.s32 %r5, %r29, %r13;
.loc 2 8 99
mul.lo.s32 %r6, %r29, %r12;
mov.u32 %r30, %r2;
BB5_4:
.loc 2 8 1
mov.u32 %r7, %r30;
add.s32 %r21, %r7, %r5;
mul.wide.s32 %rd5, %r21, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 8 1
ld.global.f32 %f1, [%rd6];
.loc 3 8454 10
abs.f32 %f2, %f1;
setp.leu.f32 %p3, %f2, 0f3F800000;
mov.f32 %f25, %f2;
@%p3 bra BB5_6;
rcp.rn.f32 %f3, %f2;
mov.f32 %f25, %f3;
BB5_6:
.loc 3 8454 10
mov.f32 %f4, %f25;
mul.rn.f32 %f5, %f4, %f4;
mov.f32 %f6, 0fC0B59883;
mov.f32 %f7, 0fBF52C7EA;
.loc 3 8454 10
fma.rn.f32 %f8, %f5, %f7, %f6;
mov.f32 %f9, 0fC0D21907;
.loc 3 8454 10
fma.rn.f32 %f10, %f8, %f5, %f9;
mul.f32 %f11, %f10, %f5;
mul.f32 %f12, %f11, %f4;
add.f32 %f13, %f5, 0f41355DC0;
mov.f32 %f14, 0f41E6BD60;
.loc 3 8454 10
fma.rn.f32 %f15, %f13, %f5, %f14;
mov.f32 %f16, 0f419D92C8;
.loc 3 8454 10
fma.rn.f32 %f17, %f15, %f5, %f16;
rcp.rn.f32 %f18, %f17;
fma.rn.f32 %f19, %f12, %f18, %f4;
mov.f32 %f20, 0f3FC90FDB;
.loc 3 8454 10
sub.f32 %f21, %f20, %f19;
setp.gt.f32 %p4, %f2, 0f3F800000;
.loc 3 8454 10
selp.f32 %f22, %f21, %f19, %p4;
mov.b32 %r22, %f22;
mov.b32 %r23, %f1;
and.b32 %r24, %r23, -2147483648;
or.b32 %r25, %r22, %r24;
mov.b32 %f23, %r25;
setp.gtu.f32 %p5, %f2, 0f7F800000;
selp.f32 %f24, %f22, %f23, %p5;
.loc 2 8 99
add.s32 %r26, %r7, %r6;
mul.wide.s32 %rd7, %r26, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 8 99
st.global.f32 [%rd8], %f24;
.loc 2 8 22
add.s32 %r8, %r3, %r7;
.loc 2 8 1
setp.lt.s32 %p6, %r8, %r10;
mov.u32 %r30, %r8;
@%p6 bra BB5_4;
BB5_7:
.loc 2 8 22
mov.u32 %r27, %nctaid.x;
mad.lo.s32 %r29, %r27, %r14, %r29;
.loc 2 8 1
setp.lt.s32 %p7, %r29, %r11;
@%p7 bra BB5_2;
BB5_8:
.loc 2 8 2
ret;
}
.visible .entry map_atanh_float(
.param .u32 map_atanh_float_param_0,
.param .u32 map_atanh_float_param_1,
.param .u64 map_atanh_float_param_2,
.param .u32 map_atanh_float_param_3,
.param .u64 map_atanh_float_param_4,
.param .u32 map_atanh_float_param_5
)
{
.reg .pred %p<14>;
.reg .f32 %f<57>;
.reg .s32 %r<35>;
.reg .s64 %rd<9>;
ld.param.u32 %r10, [map_atanh_float_param_0];
ld.param.u32 %r11, [map_atanh_float_param_1];
ld.param.u64 %rd3, [map_atanh_float_param_2];
ld.param.u32 %r12, [map_atanh_float_param_3];
ld.param.u64 %rd4, [map_atanh_float_param_4];
ld.param.u32 %r13, [map_atanh_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 9 1
mov.u32 %r14, %ntid.x;
mov.u32 %r15, %ctaid.x;
mov.u32 %r16, %tid.x;
mad.lo.s32 %r33, %r14, %r15, %r16;
.loc 2 9 1
setp.ge.s32 %p1, %r33, %r11;
@%p1 bra BB6_11;
.loc 2 9 1
mov.u32 %r17, %tid.y;
mov.u32 %r18, %ntid.y;
mov.u32 %r19, %ctaid.y;
mad.lo.s32 %r2, %r18, %r19, %r17;
.loc 2 9 22
mov.u32 %r20, %nctaid.y;
mul.lo.s32 %r3, %r20, %r18;
BB6_2:
.loc 2 9 1
setp.ge.s32 %p2, %r2, %r10;
@%p2 bra BB6_10;
.loc 2 9 1
mul.lo.s32 %r5, %r33, %r13;
.loc 2 9 91
mul.lo.s32 %r6, %r33, %r12;
mov.u32 %r34, %r2;
BB6_4:
.loc 2 9 1
mov.u32 %r7, %r34;
add.s32 %r21, %r7, %r5;
mul.wide.s32 %rd5, %r21, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 9 1
ld.global.f32 %f1, [%rd6];
.loc 3 8502 10
abs.f32 %f8, %f1;
add.f32 %f9, %f8, %f8;
mov.f32 %f10, 0f3F800000;
.loc 3 8502 10
sub.f32 %f11, %f10, %f8;
div.approx.f32 %f2, %f9, %f11;
setp.le.f32 %p3, %f2, 0f3F266666;
setp.ge.f32 %p4, %f2, 0fBEC9BA5E;
and.pred %p5, %p4, %p3;
@%p5 bra BB6_8;
add.f32 %f3, %f2, 0f3F800000;
setp.gt.f32 %p6, %f3, 0f00000000;
setp.lt.f32 %p7, %f3, 0f7F800000;
and.pred %p8, %p6, %p7;
@%p8 bra BB6_7;
lg2.approx.f32 %f56, %f3;
bra.uni BB6_9;
BB6_7:
.loc 3 8502 10
setp.lt.f32 %p9, %f3, 0f00800000;
mul.f32 %f14, %f3, 0f4B800000;
selp.f32 %f15, %f14, %f3, %p9;
selp.f32 %f16, 0fC3170000, 0fC2FE0000, %p9;
mov.b32 %r22, %f15;
and.b32 %r23, %r22, 8388607;
or.b32 %r24, %r23, 1065353216;
mov.b32 %f17, %r24;
shr.u32 %r25, %r22, 23;
cvt.rn.f32.u32 %f18, %r25;
add.f32 %f19, %f16, %f18;
setp.gt.f32 %p10, %f17, 0f3FB504F3;
mul.f32 %f20, %f17, 0f3F000000;
add.f32 %f21, %f19, 0f3F800000;
selp.f32 %f22, %f20, %f17, %p10;
selp.f32 %f23, %f21, %f19, %p10;
add.f32 %f24, %f22, 0fBF800000;
add.f32 %f13, %f22, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f12,%f13;
// inline asm
neg.f32 %f25, %f24;
mul.f32 %f26, %f24, %f25;
mul.rn.f32 %f27, %f12, %f26;
add.rn.f32 %f28, %f24, %f27;
mul.f32 %f29, %f28, %f28;
mov.f32 %f30, 0f3C4C4BE0;
mov.f32 %f31, 0f3B2063C3;
.loc 3 8502 10
fma.rn.f32 %f32, %f31, %f29, %f30;
mov.f32 %f33, 0f3DAAAB50;
.loc 3 8502 10
fma.rn.f32 %f34, %f32, %f29, %f33;
mul.f32 %f35, %f34, %f29;
fma.rn.f32 %f36, %f35, %f28, %f27;
add.f32 %f37, %f36, %f24;
mov.f32 %f38, 0f3F317218;
.loc 3 8502 10
fma.rn.f32 %f56, %f23, %f38, %f37;
bra.uni BB6_9;
BB6_8:
.loc 3 8502 10
add.f32 %f39, %f2, 0f40000000;
div.approx.f32 %f40, %f2, %f39;
neg.f32 %f41, %f2;
mul.rn.f32 %f42, %f41, %f40;
add.rn.f32 %f43, %f2, %f42;
mul.f32 %f44, %f43, %f43;
mov.f32 %f45, 0f3C4C4BE0;
mov.f32 %f46, 0f3B2063C3;
.loc 3 8502 10
fma.rn.f32 %f47, %f46, %f44, %f45;
mov.f32 %f48, 0f3DAAAB50;
.loc 3 8502 10
fma.rn.f32 %f49, %f47, %f44, %f48;
mul.f32 %f50, %f49, %f44;
fma.rn.f32 %f51, %f50, %f43, %f42;
add.f32 %f56, %f51, %f2;
BB6_9:
mul.f32 %f52, %f56, 0f3F000000;
abs.f32 %f53, %f52;
setp.gtu.f32 %p11, %f53, 0f7F800000;
mov.b32 %r26, %f52;
mov.b32 %r27, %f1;
and.b32 %r28, %r27, -2147483648;
or.b32 %r29, %r26, %r28;
mov.b32 %f54, %r29;
selp.f32 %f55, %f52, %f54, %p11;
.loc 2 9 91
add.s32 %r30, %r7, %r6;
mul.wide.s32 %rd7, %r30, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 9 91
st.global.f32 [%rd8], %f55;
.loc 2 9 22
add.s32 %r8, %r3, %r7;
.loc 2 9 1
setp.lt.s32 %p12, %r8, %r10;
mov.u32 %r34, %r8;
@%p12 bra BB6_4;
BB6_10:
.loc 2 9 22
mov.u32 %r31, %nctaid.x;
mad.lo.s32 %r33, %r31, %r14, %r33;
.loc 2 9 1
setp.lt.s32 %p13, %r33, %r11;
@%p13 bra BB6_2;
BB6_11:
.loc 2 9 2
ret;
}
.visible .entry map_cbrt_float(
.param .u32 map_cbrt_float_param_0,
.param .u32 map_cbrt_float_param_1,
.param .u64 map_cbrt_float_param_2,
.param .u32 map_cbrt_float_param_3,
.param .u64 map_cbrt_float_param_4,
.param .u32 map_cbrt_float_param_5
)
{
.reg .pred %p<7>;
.reg .f32 %f<16>;
.reg .s32 %r<28>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map_cbrt_float_param_0];
ld.param.u32 %r13, [map_cbrt_float_param_1];
ld.param.u64 %rd3, [map_cbrt_float_param_2];
ld.param.u32 %r14, [map_cbrt_float_param_3];
ld.param.u64 %rd4, [map_cbrt_float_param_4];
ld.param.u32 %r15, [map_cbrt_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 10 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r26, %r1, %r16, %r17;
.loc 2 10 1
setp.ge.s32 %p1, %r26, %r13;
@%p1 bra BB7_6;
.loc 2 10 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 10 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 10 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB7_2:
.loc 2 10 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB7_5;
.loc 2 10 1
mul.lo.s32 %r7, %r26, %r15;
.loc 2 10 91
mul.lo.s32 %r8, %r26, %r14;
mov.u32 %r27, %r3;
BB7_4:
.loc 2 10 1
mov.u32 %r9, %r27;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 10 1
ld.global.f32 %f5, [%rd6];
.loc 3 8517 10
abs.f32 %f6, %f5;
lg2.approx.f32 %f7, %f6;
mul.f32 %f2, %f7, 0f3EAAAAAB;
// inline asm
ex2.approx.ftz.f32 %f1,%f2;
// inline asm
mul.f32 %f4, %f1, %f1;
// inline asm
rcp.approx.ftz.f32 %f3,%f4;
// inline asm
neg.f32 %f8, %f6;
fma.rn.f32 %f9, %f3, %f8, %f1;
mov.f32 %f10, 0fBEAAAAAB;
.loc 3 8517 10
fma.rn.f32 %f11, %f9, %f10, %f1;
mov.b32 %r24, %f5;
setp.lt.s32 %p3, %r24, 0;
neg.f32 %f12, %f11;
selp.f32 %f13, %f12, %f11, %p3;
add.f32 %f14, %f5, %f5;
setp.eq.f32 %p4, %f14, %f5;
selp.f32 %f15, %f14, %f13, %p4;
.loc 2 10 91
add.s32 %r25, %r9, %r8;
mul.wide.s32 %rd7, %r25, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 10 91
st.global.f32 [%rd8], %f15;
.loc 2 10 22
add.s32 %r10, %r5, %r9;
.loc 2 10 1
setp.lt.s32 %p5, %r10, %r12;
mov.u32 %r27, %r10;
@%p5 bra BB7_4;
BB7_5:
.loc 2 10 22
add.s32 %r26, %r4, %r26;
.loc 2 10 1
setp.lt.s32 %p6, %r26, %r13;
@%p6 bra BB7_2;
BB7_6:
.loc 2 10 2
ret;
}
.visible .entry map_ceil_float(
.param .u32 map_ceil_float_param_0,
.param .u32 map_ceil_float_param_1,
.param .u64 map_ceil_float_param_2,
.param .u32 map_ceil_float_param_3,
.param .u64 map_ceil_float_param_4,
.param .u32 map_ceil_float_param_5
)
{
.reg .pred %p<5>;
.reg .f32 %f<3>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map_ceil_float_param_0];
ld.param.u32 %r13, [map_ceil_float_param_1];
ld.param.u64 %rd3, [map_ceil_float_param_2];
ld.param.u32 %r14, [map_ceil_float_param_3];
ld.param.u64 %rd4, [map_ceil_float_param_4];
ld.param.u32 %r15, [map_ceil_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 11 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 11 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB8_6;
.loc 2 11 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 11 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 11 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB8_2:
.loc 2 11 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB8_5;
.loc 2 11 1
mul.lo.s32 %r7, %r25, %r15;
.loc 2 11 99
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB8_4:
.loc 2 11 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 11 1
ld.global.f32 %f1, [%rd6];
.loc 4 2815 10
cvt.rpi.f32.f32 %f2, %f1;
.loc 2 11 99
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 11 99
st.global.f32 [%rd8], %f2;
.loc 2 11 22
add.s32 %r10, %r5, %r9;
.loc 2 11 1
setp.lt.s32 %p3, %r10, %r12;
mov.u32 %r26, %r10;
@%p3 bra BB8_4;
BB8_5:
.loc 2 11 22
add.s32 %r25, %r4, %r25;
.loc 2 11 1
setp.lt.s32 %p4, %r25, %r13;
@%p4 bra BB8_2;
BB8_6:
.loc 2 11 2
ret;
}
.visible .entry map_cos_float(
.param .u32 map_cos_float_param_0,
.param .u32 map_cos_float_param_1,
.param .u64 map_cos_float_param_2,
.param .u32 map_cos_float_param_3,
.param .u64 map_cos_float_param_4,
.param .u32 map_cos_float_param_5
)
{
.local .align 4 .b8 __local_depot9[28];
.reg .b64 %SP;
.reg .b64 %SPL;
.reg .pred %p<18>;
.reg .f32 %f<48>;
.reg .s32 %r<120>;
.reg .s64 %rd<22>;
mov.u64 %SPL, __local_depot9;
cvta.local.u64 %SP, %SPL;
ld.param.u32 %r37, [map_cos_float_param_0];
ld.param.u32 %r38, [map_cos_float_param_1];
ld.param.u64 %rd7, [map_cos_float_param_2];
ld.param.u32 %r39, [map_cos_float_param_3];
ld.param.u64 %rd8, [map_cos_float_param_4];
ld.param.u32 %r40, [map_cos_float_param_5];
.loc 2 12 1
mov.u32 %r41, %ntid.x;
mov.u32 %r42, %ctaid.x;
mov.u32 %r43, %tid.x;
mad.lo.s32 %r110, %r41, %r42, %r43;
.loc 2 12 1
setp.ge.s32 %p1, %r110, %r38;
@%p1 bra BB9_25;
.loc 2 12 1
mov.u32 %r44, %ntid.y;
.loc 2 12 22
mov.u32 %r45, %nctaid.y;
mul.lo.s32 %r2, %r45, %r44;
cvta.to.global.u64 %rd9, %rd8;
cvta.to.global.u64 %rd17, %rd7;
BB9_2:
.loc 2 12 1
mov.u32 %r46, %ctaid.y;
mov.u32 %r48, %tid.y;
mad.lo.s32 %r111, %r44, %r46, %r48;
.loc 2 12 1
setp.ge.s32 %p2, %r111, %r37;
@%p2 bra BB9_24;
BB9_3:
.loc 2 12 1
mad.lo.s32 %r53, %r110, %r40, %r111;
mul.wide.s32 %rd10, %r53, 4;
add.s64 %rd11, %rd9, %rd10;
.loc 2 12 1
ld.global.f32 %f43, [%rd11];
.loc 3 8368 10
abs.f32 %f19, %f43;
setp.neu.f32 %p3, %f19, 0f7F800000;
@%p3 bra BB9_5;
mov.f32 %f20, 0f00000000;
.loc 3 8368 10
mul.rn.f32 %f43, %f43, %f20;
BB9_5:
mul.f32 %f21, %f43, 0f3F22F983;
cvt.rni.s32.f32 %r119, %f21;
cvt.rn.f32.s32 %f22, %r119;
neg.f32 %f23, %f22;
mov.f32 %f24, 0f3FC90FDA;
.loc 3 8368 10
fma.rn.f32 %f25, %f23, %f24, %f43;
mov.f32 %f26, 0f33A22168;
.loc 3 8368 10
fma.rn.f32 %f27, %f23, %f26, %f25;
mov.f32 %f28, 0f27C234C5;
.loc 3 8368 10
fma.rn.f32 %f44, %f23, %f28, %f27;
abs.f32 %f29, %f43;
setp.leu.f32 %p4, %f29, 0f47CE4780;
@%p4 bra BB9_13;
add.u64 %rd13, %SP, 0;
.loc 3 8368 10
mov.b32 %r7, %f43;
shr.u32 %r8, %r7, 23;
and.b32 %r56, %r8, 255;
add.s32 %r57, %r56, -128;
shl.b32 %r58, %r7, 8;
or.b32 %r9, %r58, -2147483648;
shr.u32 %r10, %r57, 5;
cvta.to.local.u64 %rd20, %rd13;
mov.u32 %r113, 0;
mov.u32 %r112, %r113;
mov.u64 %rd21, __cudart_i2opi_f;
BB9_7:
.pragma "nounroll";
.loc 3 8368 10
ld.const.u32 %r61, [%rd21];
// inline asm
{
mad.lo.cc.u32 %r59, %r61, %r9, %r113;
madc.hi.u32 %r60, %r61, %r9, 0;
}
// inline asm
st.local.u32 [%rd20], %r59;
add.s64 %rd21, %rd21, 4;
add.s64 %rd20, %rd20, 4;
.loc 3 8368 10
add.s32 %r112, %r112, 1;
setp.ne.s32 %p5, %r112, 6;
mov.u32 %r113, %r60;
@%p5 bra BB9_7;
and.b32 %r117, %r7, -2147483648;
cvta.to.local.u64 %rd15, %rd13;
.loc 3 8368 10
st.local.u32 [%rd15+24], %r60;
mov.u32 %r64, 6;
.loc 3 8368 10
sub.s32 %r65, %r64, %r10;
mul.wide.s32 %rd16, %r65, 4;
add.s64 %rd6, %rd15, %rd16;
.loc 3 8368 10
ld.local.u32 %r114, [%rd6];
ld.local.u32 %r115, [%rd6+-4];
and.b32 %r18, %r8, 31;
setp.eq.s32 %p6, %r18, 0;
@%p6 bra BB9_10;
mov.u32 %r66, 32;
.loc 3 8368 10
sub.s32 %r67, %r66, %r18;
shr.u32 %r68, %r115, %r67;
shl.b32 %r69, %r114, %r18;
add.s32 %r114, %r68, %r69;
ld.local.u32 %r70, [%rd6+-8];
shr.u32 %r71, %r70, %r67;
shl.b32 %r72, %r115, %r18;
add.s32 %r115, %r71, %r72;
BB9_10:
shr.u32 %r73, %r115, 30;
shl.b32 %r74, %r114, 2;
add.s32 %r116, %r73, %r74;
shl.b32 %r24, %r115, 2;
shr.u32 %r75, %r116, 31;
shr.u32 %r76, %r114, 30;
add.s32 %r77, %r75, %r76;
neg.s32 %r78, %r77;
setp.eq.s32 %p7, %r117, 0;
selp.b32 %r119, %r77, %r78, %p7;
setp.eq.s32 %p8, %r75, 0;
mov.u32 %r118, %r24;
@%p8 bra BB9_12;
not.b32 %r79, %r116;
neg.s32 %r26, %r24;
setp.eq.s32 %p9, %r24, 0;
selp.u32 %r80, 1, 0, %p9;
add.s32 %r116, %r80, %r79;
xor.b32 %r117, %r117, -2147483648;
mov.u32 %r118, %r26;
BB9_12:
.loc 3 8368 10
clz.b32 %r81, %r116;
setp.eq.s32 %p10, %r81, 0;
shl.b32 %r82, %r116, %r81;
mov.u32 %r83, 32;
.loc 3 8368 10
sub.s32 %r84, %r83, %r81;
shr.u32 %r85, %r118, %r84;
add.s32 %r86, %r85, %r82;
selp.b32 %r87, %r116, %r86, %p10;
mul.lo.s32 %r88, %r87, -921707870;
mov.u32 %r89, -921707870;
.loc 3 8368 10
mul.hi.u32 %r90, %r87, %r89;
setp.gt.s32 %p11, %r90, 0;
shl.b32 %r91, %r90, 1;
shr.u32 %r92, %r88, 31;
add.s32 %r93, %r92, %r91;
selp.b32 %r94, %r93, %r90, %p11;
selp.b32 %r95, -1, 0, %p11;
mov.u32 %r96, 126;
.loc 3 8368 10
sub.s32 %r97, %r96, %r81;
add.s32 %r98, %r97, %r95;
shl.b32 %r99, %r98, 23;
add.s32 %r100, %r94, 1;
shr.u32 %r101, %r100, 7;
add.s32 %r102, %r101, 1;
shr.u32 %r103, %r102, 1;
add.s32 %r104, %r103, %r99;
or.b32 %r105, %r104, %r117;
mov.b32 %f44, %r105;
BB9_13:
mul.rn.f32 %f7, %f44, %f44;
add.s32 %r33, %r119, 1;
and.b32 %r34, %r33, 1;
setp.eq.s32 %p12, %r34, 0;
@%p12 bra BB9_15;
mov.f32 %f30, 0fBAB6061A;
mov.f32 %f31, 0f37CCF5CE;
.loc 3 8368 10
fma.rn.f32 %f45, %f31, %f7, %f30;
bra.uni BB9_16;
BB9_15:
mov.f32 %f32, 0f3C08839E;
mov.f32 %f33, 0fB94CA1F9;
.loc 3 8368 10
fma.rn.f32 %f45, %f33, %f7, %f32;
BB9_16:
@%p12 bra BB9_18;
mov.f32 %f34, 0f3D2AAAA5;
.loc 3 8368 10
fma.rn.f32 %f35, %f45, %f7, %f34;
mov.f32 %f36, 0fBF000000;
.loc 3 8368 10
fma.rn.f32 %f46, %f35, %f7, %f36;
bra.uni BB9_19;
BB9_18:
mov.f32 %f37, 0fBE2AAAA3;
.loc 3 8368 10
fma.rn.f32 %f38, %f45, %f7, %f37;
mov.f32 %f39, 0f00000000;
.loc 3 8368 10
fma.rn.f32 %f46, %f38, %f7, %f39;
BB9_19:
fma.rn.f32 %f47, %f46, %f44, %f44;
@%p12 bra BB9_21;
mov.f32 %f40, 0f3F800000;
.loc 3 8368 10
fma.rn.f32 %f47, %f46, %f7, %f40;
BB9_21:
and.b32 %r106, %r33, 2;
setp.eq.s32 %p15, %r106, 0;
@%p15 bra BB9_23;
mov.f32 %f41, 0f00000000;
mov.f32 %f42, 0fBF800000;
.loc 3 8368 10
fma.rn.f32 %f47, %f47, %f42, %f41;
BB9_23:
.loc 2 12 99
mad.lo.s32 %r107, %r110, %r39, %r111;
mul.wide.s32 %rd18, %r107, 4;
add.s64 %rd19, %rd17, %rd18;
.loc 2 12 99
st.global.f32 [%rd19], %f47;
.loc 2 12 22
add.s32 %r111, %r2, %r111;
.loc 2 12 1
setp.lt.s32 %p16, %r111, %r37;
@%p16 bra BB9_3;
BB9_24:
.loc 2 12 22
mov.u32 %r108, %nctaid.x;
mad.lo.s32 %r110, %r108, %r41, %r110;
.loc 2 12 1
setp.lt.s32 %p17, %r110, %r38;
@%p17 bra BB9_2;
BB9_25:
.loc 2 12 2
ret;
}
.visible .entry map_cosh_float(
.param .u32 map_cosh_float_param_0,
.param .u32 map_cosh_float_param_1,
.param .u64 map_cosh_float_param_2,
.param .u32 map_cosh_float_param_3,
.param .u64 map_cosh_float_param_4,
.param .u32 map_cosh_float_param_5
)
{
.reg .pred %p<6>;
.reg .f32 %f<19>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map_cosh_float_param_0];
ld.param.u32 %r13, [map_cosh_float_param_1];
ld.param.u64 %rd3, [map_cosh_float_param_2];
ld.param.u32 %r14, [map_cosh_float_param_3];
ld.param.u64 %rd4, [map_cosh_float_param_4];
ld.param.u32 %r15, [map_cosh_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 13 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 13 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB10_6;
.loc 2 13 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 13 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 13 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB10_2:
.loc 2 13 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB10_5;
.loc 2 13 1
mul.lo.s32 %r7, %r25, %r15;
.loc 2 13 99
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB10_4:
.loc 2 13 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 13 1
ld.global.f32 %f3, [%rd6];
.loc 3 8434 10
abs.f32 %f4, %f3;
mul.f32 %f5, %f4, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f6, %f5;
mov.f32 %f7, 0fBF317200;
.loc 3 8434 10
fma.rn.f32 %f8, %f6, %f7, %f4;
mov.f32 %f9, 0fB5BFBE8E;
.loc 3 8434 10
fma.rn.f32 %f10, %f6, %f9, %f8;
mul.f32 %f2, %f10, 0f3FB8AA3B;
// inline asm
ex2.approx.ftz.f32 %f1,%f2;
// inline asm
add.f32 %f11, %f6, 0fC0000000;
ex2.approx.f32 %f12, %f11;
mul.f32 %f13, %f1, %f12;
mov.f32 %f14, 0f3E000000;
.loc 3 8434 10
div.approx.f32 %f15, %f14, %f13;
mov.f32 %f16, 0f40000000;
.loc 3 8434 10
fma.rn.f32 %f17, %f16, %f13, %f15;
setp.ltu.f32 %p3, %f4, 0f42B40000;
selp.f32 %f18, %f17, 0f7F800000, %p3;
.loc 2 13 99
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 13 99
st.global.f32 [%rd8], %f18;
.loc 2 13 22
add.s32 %r10, %r5, %r9;
.loc 2 13 1
setp.lt.s32 %p4, %r10, %r12;
mov.u32 %r26, %r10;
@%p4 bra BB10_4;
BB10_5:
.loc 2 13 22
add.s32 %r25, %r4, %r25;
.loc 2 13 1
setp.lt.s32 %p5, %r25, %r13;
@%p5 bra BB10_2;
BB10_6:
.loc 2 13 2
ret;
}
.visible .entry map_cospi_float(
.param .u32 map_cospi_float_param_0,
.param .u32 map_cospi_float_param_1,
.param .u64 map_cospi_float_param_2,
.param .u32 map_cospi_float_param_3,
.param .u64 map_cospi_float_param_4,
.param .u32 map_cospi_float_param_5
)
{
.reg .pred %p<10>;
.reg .f32 %f<43>;
.reg .s32 %r<35>;
.reg .s64 %rd<9>;
ld.param.u32 %r11, [map_cospi_float_param_0];
ld.param.u32 %r12, [map_cospi_float_param_1];
ld.param.u64 %rd1, [map_cospi_float_param_2];
ld.param.u32 %r13, [map_cospi_float_param_3];
ld.param.u64 %rd2, [map_cospi_float_param_4];
ld.param.u32 %r14, [map_cospi_float_param_5];
.loc 2 14 1
mov.u32 %r15, %tid.x;
mov.u32 %r16, %ntid.x;
mov.u32 %r17, %ctaid.x;
mad.lo.s32 %r33, %r16, %r17, %r15;
.loc 2 14 1
setp.ge.s32 %p1, %r33, %r12;
@%p1 bra BB11_18;
.loc 2 14 1
mov.u32 %r18, %ntid.y;
.loc 2 14 22
mov.u32 %r19, %nctaid.y;
mul.lo.s32 %r2, %r19, %r18;
cvta.to.global.u64 %rd3, %rd2;
cvta.to.global.u64 %rd6, %rd1;
BB11_2:
.loc 2 14 1
mov.u32 %r20, %ctaid.y;
mov.u32 %r22, %tid.y;
mad.lo.s32 %r34, %r18, %r20, %r22;
.loc 2 14 1
setp.ge.s32 %p2, %r34, %r11;
@%p2 bra BB11_17;
.loc 2 14 92
mul.lo.s32 %r4, %r33, %r13;
BB11_4:
.loc 2 14 1
mad.lo.s32 %r27, %r33, %r14, %r34;
mul.wide.s32 %rd4, %r27, 4;
add.s64 %rd5, %rd3, %rd4;
.loc 2 14 1
ld.global.f32 %f39, [%rd5];
.loc 3 8388 10
abs.f32 %f17, %f39;
setp.leu.f32 %p3, %f17, 0f4B800000;
@%p3 bra BB11_6;
mov.f32 %f18, 0f00000000;
.loc 3 8388 10
mul.rn.f32 %f39, %f39, %f18;
BB11_6:
add.f32 %f19, %f39, %f39;
cvt.rni.f32.f32 %f20, %f19;
cvt.rzi.s32.f32 %r28, %f20;
neg.f32 %f21, %f20;
mov.f32 %f22, 0f3F000000;
.loc 3 8388 10
fma.rn.f32 %f23, %f21, %f22, %f39;
mul.f32 %f24, %f23, 0f34222169;
mov.f32 %f25, 0f40490FDA;
.loc 3 8388 10
fma.rn.f32 %f4, %f23, %f25, %f24;
add.s32 %r7, %r28, 1;
mul.rn.f32 %f5, %f4, %f4;
and.b32 %r8, %r7, 1;
setp.eq.s32 %p4, %r8, 0;
@%p4 bra BB11_8;
mov.f32 %f26, 0fBAB6061A;
mov.f32 %f27, 0f37CCF5CE;
.loc 3 8388 10
fma.rn.f32 %f40, %f27, %f5, %f26;
bra.uni BB11_9;
BB11_8:
mov.f32 %f28, 0f3C08839E;
mov.f32 %f29, 0fB94CA1F9;
.loc 3 8388 10
fma.rn.f32 %f40, %f29, %f5, %f28;
BB11_9:
@%p4 bra BB11_11;
mov.f32 %f30, 0f3D2AAAA5;
.loc 3 8388 10
fma.rn.f32 %f31, %f40, %f5, %f30;
mov.f32 %f32, 0fBF000000;
.loc 3 8388 10
fma.rn.f32 %f41, %f31, %f5, %f32;
bra.uni BB11_12;
BB11_11:
mov.f32 %f33, 0fBE2AAAA3;
.loc 3 8388 10
fma.rn.f32 %f34, %f40, %f5, %f33;
mov.f32 %f35, 0f00000000;
.loc 3 8388 10
fma.rn.f32 %f41, %f34, %f5, %f35;
BB11_12:
fma.rn.f32 %f42, %f41, %f4, %f4;
@%p4 bra BB11_14;
mov.f32 %f36, 0f3F800000;
.loc 3 8388 10
fma.rn.f32 %f42, %f41, %f5, %f36;
BB11_14:
and.b32 %r29, %r7, 2;
setp.eq.s32 %p7, %r29, 0;
@%p7 bra BB11_16;
mov.f32 %f37, 0f00000000;
mov.f32 %f38, 0fBF800000;
.loc 3 8388 10
fma.rn.f32 %f42, %f42, %f38, %f37;
BB11_16:
.loc 2 14 92
add.s32 %r30, %r34, %r4;
mul.wide.s32 %rd7, %r30, 4;
add.s64 %rd8, %rd6, %rd7;
.loc 2 14 92
st.global.f32 [%rd8], %f42;
.loc 2 14 22
add.s32 %r34, %r2, %r34;
.loc 2 14 1
setp.lt.s32 %p8, %r34, %r11;
@%p8 bra BB11_4;
BB11_17:
.loc 2 14 22
mov.u32 %r31, %nctaid.x;
mad.lo.s32 %r33, %r31, %r16, %r33;
.loc 2 14 1
setp.lt.s32 %p9, %r33, %r12;
@%p9 bra BB11_2;
BB11_18:
.loc 2 14 2
ret;
}
.visible .entry map_erfc_float(
.param .u32 map_erfc_float_param_0,
.param .u32 map_erfc_float_param_1,
.param .u64 map_erfc_float_param_2,
.param .u32 map_erfc_float_param_3,
.param .u64 map_erfc_float_param_4,
.param .u32 map_erfc_float_param_5
)
{
.reg .pred %p<7>;
.reg .f32 %f<63>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map_erfc_float_param_0];
ld.param.u32 %r13, [map_erfc_float_param_1];
ld.param.u64 %rd3, [map_erfc_float_param_2];
ld.param.u32 %r14, [map_erfc_float_param_3];
ld.param.u64 %rd4, [map_erfc_float_param_4];
ld.param.u32 %r15, [map_erfc_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 15 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 15 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB12_6;
.loc 2 15 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 15 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 15 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB12_2:
.loc 2 15 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB12_5;
.loc 2 15 1
mul.lo.s32 %r7, %r25, %r15;
.loc 2 15 92
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB12_4:
.loc 2 15 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 15 1
ld.global.f32 %f7, [%rd6];
.loc 3 8584 10
abs.f32 %f8, %f7;
add.f32 %f9, %f8, 0fC0800000;
mov.f32 %f10, 0fC0800000;
.loc 3 8584 10
add.f32 %f2, %f8, 0f40800000;
// inline asm
rcp.approx.ftz.f32 %f1,%f2;
// inline asm
mul.rn.f32 %f11, %f9, %f1;
add.f32 %f12, %f11, 0f3F800000;
mov.f32 %f13, 0f3F800000;
.loc 3 8584 10
fma.rn.f32 %f14, %f10, %f12, %f8;
neg.f32 %f15, %f11;
fma.rn.f32 %f16, %f15, %f8, %f14;
fma.rn.f32 %f17, %f1, %f16, %f11;
mov.f32 %f18, 0f3BE6E05B;
mov.f32 %f19, 0f3A69A091;
.loc 3 8584 10
fma.rn.f32 %f20, %f19, %f17, %f18;
mov.f32 %f21, 0fBC81FB4B;
.loc 3 8584 10
fma.rn.f32 %f22, %f20, %f17, %f21;
mov.f32 %f23, 0f3D15373B;
.loc 3 8584 10
fma.rn.f32 %f24, %f22, %f17, %f23;
mov.f32 %f25, 0fBD887C5A;
.loc 3 8584 10
fma.rn.f32 %f26, %f24, %f17, %f25;
mov.f32 %f27, 0f3DC021D5;
.loc 3 8584 10
fma.rn.f32 %f28, %f26, %f17, %f27;
mov.f32 %f29, 0fBDCED424;
.loc 3 8584 10
fma.rn.f32 %f30, %f28, %f17, %f29;
mov.f32 %f31, 0f3D8B74DE;
.loc 3 8584 10
fma.rn.f32 %f32, %f30, %f17, %f31;
mov.f32 %f33, 0f3C7BF170;
.loc 3 8584 10
fma.rn.f32 %f34, %f32, %f17, %f33;
mov.f32 %f35, 0fBE0EF8D4;
.loc 3 8584 10
fma.rn.f32 %f36, %f34, %f17, %f35;
mov.f32 %f37, 0f3F9DD2C9;
.loc 3 8584 10
fma.rn.f32 %f38, %f36, %f17, %f37;
mov.f32 %f39, 0f40000000;
.loc 3 8584 10
fma.rn.f32 %f4, %f39, %f8, %f13;
// inline asm
rcp.approx.ftz.f32 %f3,%f4;
// inline asm
mul.rn.f32 %f40, %f38, %f3;
mul.f32 %f41, %f40, 0fC0000000;
fma.rn.f32 %f42, %f8, %f41, %f38;
sub.f32 %f43, %f42, %f40;
fma.rn.f32 %f44, %f43, %f3, %f40;
neg.f32 %f45, %f8;
mul.f32 %f46, %f8, %f45;
mul.f32 %f47, %f46, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f48, %f47;
mov.f32 %f49, 0fBF317200;
.loc 3 8584 10
fma.rn.f32 %f50, %f48, %f49, %f46;
mov.f32 %f51, 0fB5BFBE8E;
.loc 3 8584 10
fma.rn.f32 %f52, %f48, %f51, %f50;
mul.f32 %f6, %f52, 0f3FB8AA3B;
// inline asm
ex2.approx.ftz.f32 %f5,%f6;
// inline asm
add.f32 %f53, %f48, 0f00000000;
ex2.approx.f32 %f54, %f53;
mul.f32 %f55, %f5, %f54;
neg.f32 %f56, %f46;
fma.rn.f32 %f57, %f45, %f8, %f56;
fma.rn.f32 %f58, %f55, %f57, %f55;
mul.f32 %f59, %f44, %f58;
setp.gt.f32 %p3, %f8, 0f4120E148;
selp.f32 %f60, 0f00000000, %f59, %p3;
setp.lt.f32 %p4, %f7, 0f00000000;
sub.f32 %f61, %f39, %f60;
selp.f32 %f62, %f61, %f60, %p4;
.loc 2 15 92
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 15 92
st.global.f32 [%rd8], %f62;
.loc 2 15 22
add.s32 %r10, %r5, %r9;
.loc 2 15 1
setp.lt.s32 %p5, %r10, %r12;
mov.u32 %r26, %r10;
@%p5 bra BB12_4;
BB12_5:
.loc 2 15 22
add.s32 %r25, %r4, %r25;
.loc 2 15 1
setp.lt.s32 %p6, %r25, %r13;
@%p6 bra BB12_2;
BB12_6:
.loc 2 15 2
ret;
}
.visible .entry map_erfcinv_float(
.param .u32 map_erfcinv_float_param_0,
.param .u32 map_erfcinv_float_param_1,
.param .u64 map_erfcinv_float_param_2,
.param .u32 map_erfcinv_float_param_3,
.param .u64 map_erfcinv_float_param_4,
.param .u32 map_erfcinv_float_param_5
)
{
.reg .pred %p<9>;
.reg .f32 %f<56>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r10, [map_erfcinv_float_param_0];
ld.param.u32 %r11, [map_erfcinv_float_param_1];
ld.param.u64 %rd2, [map_erfcinv_float_param_2];
ld.param.u32 %r12, [map_erfcinv_float_param_3];
ld.param.u64 %rd3, [map_erfcinv_float_param_4];
ld.param.u32 %r13, [map_erfcinv_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
.loc 2 16 1
mov.u32 %r14, %ntid.x;
mov.u32 %r15, %ctaid.x;
mov.u32 %r16, %tid.x;
mad.lo.s32 %r25, %r14, %r15, %r16;
.loc 2 16 1
setp.ge.s32 %p1, %r25, %r11;
@%p1 bra BB13_9;
.loc 2 16 1
mov.u32 %r17, %tid.y;
mov.u32 %r18, %ntid.y;
mov.u32 %r19, %ctaid.y;
mad.lo.s32 %r2, %r18, %r19, %r17;
.loc 2 16 22
mov.u32 %r20, %nctaid.y;
mul.lo.s32 %r3, %r20, %r18;
cvta.to.global.u64 %rd6, %rd2;
BB13_2:
.loc 2 16 1
setp.ge.s32 %p2, %r2, %r10;
@%p2 bra BB13_8;
.loc 2 16 1
mul.lo.s32 %r5, %r25, %r13;
.loc 2 16 92
mul.lo.s32 %r6, %r25, %r12;
mov.u32 %r26, %r2;
BB13_4:
.loc 2 16 1
mov.u32 %r7, %r26;
add.s32 %r21, %r7, %r5;
mul.wide.s32 %rd4, %r21, 4;
add.s64 %rd5, %rd1, %rd4;
.loc 2 16 1
ld.global.f32 %f1, [%rd5];
.loc 3 8594 10
neg.f32 %f2, %f1;
mov.f32 %f7, 0f40000000;
.loc 3 8594 10
add.rn.f32 %f3, %f7, %f2;
setp.le.f32 %p3, %f1, 0f3FFF9097;
setp.ge.f32 %p4, %f1, 0f3B5ED289;
and.pred %p5, %p4, %p3;
@%p5 bra BB13_6;
setp.gt.f32 %p6, %f1, 0f3F800000;
selp.f32 %f12, %f3, %f1, %p6;
lg2.approx.f32 %f13, %f12;
neg.f32 %f9, %f13;
// inline asm
rsqrt.approx.ftz.f32 %f8,%f9;
// inline asm
mov.f32 %f14, 0f42FEF829;
mov.f32 %f15, 0fC27C73F1;
.loc 3 8594 10
fma.rn.f32 %f16, %f15, %f8, %f14;
mov.f32 %f17, 0fC2E4361C;
.loc 3 8594 10
fma.rn.f32 %f18, %f16, %f8, %f17;
mov.f32 %f19, 0f42714D9B;
.loc 3 8594 10
fma.rn.f32 %f20, %f18, %f8, %f19;
mov.f32 %f21, 0fC1AE51B3;
.loc 3 8594 10
fma.rn.f32 %f22, %f20, %f8, %f21;
mov.f32 %f23, 0f40CEF504;
.loc 3 8594 10
fma.rn.f32 %f24, %f22, %f8, %f23;
mov.f32 %f25, 0fBFEA9E05;
.loc 3 8594 10
fma.rn.f32 %f26, %f24, %f8, %f25;
mov.f32 %f27, 0fBCF871F4;
.loc 3 8594 10
fma.rn.f32 %f28, %f26, %f8, %f27;
mov.f32 %f29, 0f3F553775;
.loc 3 8594 10
fma.rn.f32 %f30, %f28, %f8, %f29;
// inline asm
rcp.approx.ftz.f32 %f10,%f8;
// inline asm
mul.rn.f32 %f31, %f30, %f10;
neg.f32 %f32, %f31;
selp.f32 %f55, %f32, %f31, %p6;
bra.uni BB13_7;
BB13_6:
.loc 3 8594 10
mul.rn.f32 %f34, %f3, %f1;
// inline asm
lg2.approx.ftz.f32 %f33,%f34;
// inline asm
neg.f32 %f35, %f33;
mov.f32 %f36, 0f3221F645;
mov.f32 %f37, 0fAF8A6370;
.loc 3 8594 10
fma.rn.f32 %f38, %f37, %f35, %f36;
mov.f32 %f39, 0fB4016FDA;
.loc 3 8594 10
fma.rn.f32 %f40, %f38, %f35, %f39;
mov.f32 %f41, 0f3468F846;
.loc 3 8594 10
fma.rn.f32 %f42, %f40, %f35, %f41;
mov.f32 %f43, 0f370742AA;
.loc 3 8594 10
fma.rn.f32 %f44, %f42, %f35, %f43;
mov.f32 %f45, 0fB804DB4D;
.loc 3 8594 10
fma.rn.f32 %f46, %f44, %f35, %f45;
mov.f32 %f47, 0fBA4AFEA1;
.loc 3 8594 10
fma.rn.f32 %f48, %f46, %f35, %f47;
mov.f32 %f49, 0f3BB5C027;
.loc 3 8594 10
fma.rn.f32 %f50, %f48, %f35, %f49;
mov.f32 %f51, 0f3E24AE0F;
.loc 3 8594 10
fma.rn.f32 %f52, %f50, %f35, %f51;
mov.f32 %f53, 0f3F62DFC4;
.loc 3 8594 10
fma.rn.f32 %f54, %f52, %f35, %f53;
fma.rn.f32 %f55, %f54, %f2, %f54;
BB13_7:
.loc 2 16 92
add.s32 %r22, %r7, %r6;
mul.wide.s32 %rd7, %r22, 4;
add.s64 %rd8, %rd6, %rd7;
.loc 2 16 92
st.global.f32 [%rd8], %f55;
.loc 2 16 22
add.s32 %r8, %r3, %r7;
.loc 2 16 1
setp.lt.s32 %p7, %r8, %r10;
mov.u32 %r26, %r8;
@%p7 bra BB13_4;
BB13_8:
.loc 2 16 22
mov.u32 %r23, %nctaid.x;
mad.lo.s32 %r25, %r23, %r14, %r25;
.loc 2 16 1
setp.lt.s32 %p8, %r25, %r11;
@%p8 bra BB13_2;
BB13_9:
.loc 2 16 2
ret;
}
.visible .entry map_erfcx_float(
.param .u32 map_erfcx_float_param_0,
.param .u32 map_erfcx_float_param_1,
.param .u64 map_erfcx_float_param_2,
.param .u32 map_erfcx_float_param_3,
.param .u64 map_erfcx_float_param_4,
.param .u32 map_erfcx_float_param_5
)
{
.reg .pred %p<10>;
.reg .f32 %f<81>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r10, [map_erfcx_float_param_0];
ld.param.u32 %r11, [map_erfcx_float_param_1];
ld.param.u64 %rd2, [map_erfcx_float_param_2];
ld.param.u32 %r12, [map_erfcx_float_param_3];
ld.param.u64 %rd3, [map_erfcx_float_param_4];
ld.param.u32 %r13, [map_erfcx_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
.loc 2 17 1
mov.u32 %r14, %ntid.x;
mov.u32 %r15, %ctaid.x;
mov.u32 %r16, %tid.x;
mad.lo.s32 %r25, %r14, %r15, %r16;
.loc 2 17 1
setp.ge.s32 %p1, %r25, %r11;
@%p1 bra BB14_11;
.loc 2 17 1
mov.u32 %r17, %tid.y;
mov.u32 %r18, %ntid.y;
mov.u32 %r19, %ctaid.y;
mad.lo.s32 %r2, %r18, %r19, %r17;
.loc 2 17 22
mov.u32 %r20, %nctaid.y;
mul.lo.s32 %r3, %r20, %r18;
cvta.to.global.u64 %rd6, %rd2;
BB14_2:
.loc 2 17 1
setp.ge.s32 %p2, %r2, %r10;
@%p2 bra BB14_10;
.loc 2 17 1
mul.lo.s32 %r5, %r25, %r13;
.loc 2 17 92
mul.lo.s32 %r6, %r25, %r12;
mov.u32 %r26, %r2;
BB14_4:
.loc 2 17 1
mov.u32 %r7, %r26;
add.s32 %r21, %r7, %r5;
mul.wide.s32 %rd4, %r21, 4;
add.s64 %rd5, %rd1, %rd4;
.loc 2 17 1
ld.global.f32 %f1, [%rd5];
.loc 3 8589 10
abs.f32 %f2, %f1;
setp.lt.f32 %p3, %f2, 0f4120E148;
@%p3 bra BB14_6;
mul.f32 %f8, %f2, 0f3E800000;
mov.f32 %f9, 0f3E800000;
.loc 3 8589 10
div.approx.f32 %f10, %f9, %f8;
mul.f32 %f11, %f10, %f10;
mov.f32 %f12, 0fBFF00000;
mov.f32 %f13, 0f40D20000;
.loc 3 8589 10
fma.rn.f32 %f14, %f13, %f11, %f12;
mov.f32 %f15, 0f3F400000;
.loc 3 8589 10
fma.rn.f32 %f16, %f14, %f11, %f15;
mov.f32 %f17, 0fBF000000;
.loc 3 8589 10
fma.rn.f32 %f18, %f16, %f11, %f17;
mov.f32 %f19, 0f3F800000;
.loc 3 8589 10
fma.rn.f32 %f20, %f18, %f11, %f19;
mul.f32 %f21, %f10, 0f3F106EBB;
mul.f32 %f80, %f20, %f21;
bra.uni BB14_7;
BB14_6:
.loc 3 8589 10
add.f32 %f26, %f2, 0fC0800000;
mov.f32 %f27, 0fC0800000;
.loc 3 8589 10
add.f32 %f23, %f2, 0f40800000;
// inline asm
rcp.approx.ftz.f32 %f22,%f23;
// inline asm
mul.rn.f32 %f28, %f26, %f22;
add.f32 %f29, %f28, 0f3F800000;
mov.f32 %f30, 0f3F800000;
.loc 3 8589 10
fma.rn.f32 %f31, %f27, %f29, %f2;
neg.f32 %f32, %f28;
fma.rn.f32 %f33, %f32, %f2, %f31;
fma.rn.f32 %f34, %f22, %f33, %f28;
mov.f32 %f35, 0f3BE6E05B;
mov.f32 %f36, 0f3A69A091;
.loc 3 8589 10
fma.rn.f32 %f37, %f36, %f34, %f35;
mov.f32 %f38, 0fBC81FB4B;
.loc 3 8589 10
fma.rn.f32 %f39, %f37, %f34, %f38;
mov.f32 %f40, 0f3D15373B;
.loc 3 8589 10
fma.rn.f32 %f41, %f39, %f34, %f40;
mov.f32 %f42, 0fBD887C5A;
.loc 3 8589 10
fma.rn.f32 %f43, %f41, %f34, %f42;
mov.f32 %f44, 0f3DC021D5;
.loc 3 8589 10
fma.rn.f32 %f45, %f43, %f34, %f44;
mov.f32 %f46, 0fBDCED424;
.loc 3 8589 10
fma.rn.f32 %f47, %f45, %f34, %f46;
mov.f32 %f48, 0f3D8B74DE;
.loc 3 8589 10
fma.rn.f32 %f49, %f47, %f34, %f48;
mov.f32 %f50, 0f3C7BF170;
.loc 3 8589 10
fma.rn.f32 %f51, %f49, %f34, %f50;
mov.f32 %f52, 0fBE0EF8D4;
.loc 3 8589 10
fma.rn.f32 %f53, %f51, %f34, %f52;
mov.f32 %f54, 0f3F9DD2C9;
.loc 3 8589 10
fma.rn.f32 %f55, %f53, %f34, %f54;
mov.f32 %f56, 0f40000000;
.loc 3 8589 10
fma.rn.f32 %f25, %f56, %f2, %f30;
// inline asm
rcp.approx.ftz.f32 %f24,%f25;
// inline asm
mul.rn.f32 %f57, %f55, %f24;
mul.f32 %f58, %f57, 0fC0000000;
fma.rn.f32 %f59, %f2, %f58, %f55;
sub.f32 %f60, %f59, %f57;
fma.rn.f32 %f80, %f60, %f24, %f57;
BB14_7:
setp.geu.f32 %p4, %f1, 0f00000000;
@%p4 bra BB14_9;
mul.rz.f32 %f63, %f2, %f2;
neg.f32 %f64, %f63;
fma.rn.f32 %f65, %f2, %f2, %f64;
mul.f32 %f66, %f63, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f67, %f66;
mov.f32 %f68, 0fBF317200;
.loc 3 8589 10
fma.rn.f32 %f69, %f67, %f68, %f63;
mov.f32 %f70, 0fB5BFBE8E;
.loc 3 8589 10
fma.rn.f32 %f71, %f67, %f70, %f69;
mul.f32 %f62, %f71, 0f3FB8AA3B;
// inline asm
ex2.approx.ftz.f32 %f61,%f62;
// inline asm
add.f32 %f72, %f67, 0f00000000;
ex2.approx.f32 %f73, %f72;
mul.f32 %f74, %f61, %f73;
setp.lt.f32 %p5, %f63, 0fC2D20000;
selp.f32 %f75, 0f00000000, %f74, %p5;
setp.gt.f32 %p6, %f63, 0f42D20000;
selp.f32 %f76, 0f7F800000, %f75, %p6;
add.f32 %f77, %f76, %f76;
fma.rn.f32 %f78, %f77, %f65, %f77;
sub.f32 %f79, %f78, %f80;
setp.eq.f32 %p7, %f77, 0f7F800000;
selp.f32 %f80, %f77, %f79, %p7;
BB14_9:
.loc 2 17 92
add.s32 %r22, %r7, %r6;
mul.wide.s32 %rd7, %r22, 4;
add.s64 %rd8, %rd6, %rd7;
.loc 2 17 92
st.global.f32 [%rd8], %f80;
.loc 2 17 22
add.s32 %r8, %r3, %r7;
.loc 2 17 1
setp.lt.s32 %p8, %r8, %r10;
mov.u32 %r26, %r8;
@%p8 bra BB14_4;
BB14_10:
.loc 2 17 22
mov.u32 %r23, %nctaid.x;
mad.lo.s32 %r25, %r23, %r14, %r25;
.loc 2 17 1
setp.lt.s32 %p9, %r25, %r11;
@%p9 bra BB14_2;
BB14_11:
.loc 2 17 2
ret;
}
.visible .entry map_erf_float(
.param .u32 map_erf_float_param_0,
.param .u32 map_erf_float_param_1,
.param .u64 map_erf_float_param_2,
.param .u32 map_erf_float_param_3,
.param .u64 map_erf_float_param_4,
.param .u32 map_erf_float_param_5
)
{
.reg .pred %p<7>;
.reg .f32 %f<37>;
.reg .s32 %r<32>;
.reg .s64 %rd<9>;
ld.param.u32 %r10, [map_erf_float_param_0];
ld.param.u32 %r11, [map_erf_float_param_1];
ld.param.u64 %rd3, [map_erf_float_param_2];
ld.param.u32 %r12, [map_erf_float_param_3];
ld.param.u64 %rd4, [map_erf_float_param_4];
ld.param.u32 %r13, [map_erf_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 18 1
mov.u32 %r14, %ntid.x;
mov.u32 %r15, %ctaid.x;
mov.u32 %r16, %tid.x;
mad.lo.s32 %r30, %r14, %r15, %r16;
.loc 2 18 1
setp.ge.s32 %p1, %r30, %r11;
@%p1 bra BB15_9;
.loc 2 18 1
mov.u32 %r17, %tid.y;
mov.u32 %r18, %ntid.y;
mov.u32 %r19, %ctaid.y;
mad.lo.s32 %r2, %r18, %r19, %r17;
.loc 2 18 22
mov.u32 %r20, %nctaid.y;
mul.lo.s32 %r3, %r20, %r18;
BB15_2:
.loc 2 18 1
setp.ge.s32 %p2, %r2, %r10;
@%p2 bra BB15_8;
.loc 2 18 1
mul.lo.s32 %r5, %r30, %r13;
.loc 2 18 92
mul.lo.s32 %r6, %r30, %r12;
mov.u32 %r31, %r2;
BB15_4:
.loc 2 18 1
mov.u32 %r7, %r31;
add.s32 %r21, %r7, %r5;
mul.wide.s32 %rd5, %r21, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 18 1
ld.global.f32 %f1, [%rd6];
.loc 3 8557 10
abs.f32 %f2, %f1;
setp.ltu.f32 %p3, %f2, 0f3F800000;
@%p3 bra BB15_6;
mov.f32 %f8, 0f3A03BB71;
mov.f32 %f9, 0fB7B730FB;
.loc 3 8557 10
fma.rn.f32 %f10, %f9, %f2, %f8;
mov.f32 %f11, 0fBBACA3B3;
.loc 3 8557 10
fma.rn.f32 %f12, %f10, %f2, %f11;
mov.f32 %f13, 0f3D0A7445;
.loc 3 8557 10
fma.rn.f32 %f14, %f12, %f2, %f13;
mov.f32 %f15, 0fBE1B3B75;
.loc 3 8557 10
fma.rn.f32 %f16, %f14, %f2, %f15;
mov.f32 %f17, 0fBF6B385A;
.loc 3 8557 10
fma.rn.f32 %f18, %f16, %f2, %f17;
mov.f32 %f19, 0fBFD0316E;
.loc 3 8557 10
fma.rn.f32 %f20, %f18, %f2, %f19;
mov.f32 %f21, 0fBA031CCE;
.loc 3 8557 10
fma.rn.f32 %f7, %f20, %f2, %f21;
// inline asm
ex2.approx.ftz.f32 %f6,%f7;
// inline asm
mov.f32 %f22, 0f3F800000;
.loc 3 8557 10
sub.f32 %f23, %f22, %f6;
mov.b32 %r22, %f23;
setp.ltu.f32 %p4, %f2, 0f407AD445;
selp.b32 %r23, %r22, 1065353216, %p4;
mov.b32 %r24, %f1;
and.b32 %r25, %r24, -2147483648;
or.b32 %r26, %r23, %r25;
mov.b32 %f36, %r26;
bra.uni BB15_7;
BB15_6:
.loc 3 8557 10
mul.f32 %f24, %f1, %f1;
mov.f32 %f25, 0f3BA0C9F8;
mov.f32 %f26, 0fBA1268FB;
.loc 3 8557 10
fma.rn.f32 %f27, %f26, %f24, %f25;
mov.f32 %f28, 0fBCDABFD4;
.loc 3 8557 10
fma.rn.f32 %f29, %f27, %f24, %f28;
mov.f32 %f30, 0f3DE70331;
.loc 3 8557 10
fma.rn.f32 %f31, %f29, %f24, %f30;
mov.f32 %f32, 0fBEC09330;
.loc 3 8557 10
fma.rn.f32 %f33, %f31, %f24, %f32;
mov.f32 %f34, 0f3F906EBA;
.loc 3 8557 10
fma.rn.f32 %f35, %f33, %f24, %f34;
mul.f32 %f36, %f1, %f35;
BB15_7:
.loc 2 18 92
add.s32 %r27, %r7, %r6;
mul.wide.s32 %rd7, %r27, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 18 92
st.global.f32 [%rd8], %f36;
.loc 2 18 22
add.s32 %r8, %r3, %r7;
.loc 2 18 1
setp.lt.s32 %p5, %r8, %r10;
mov.u32 %r31, %r8;
@%p5 bra BB15_4;
BB15_8:
.loc 2 18 22
mov.u32 %r28, %nctaid.x;
mad.lo.s32 %r30, %r28, %r14, %r30;
.loc 2 18 1
setp.lt.s32 %p6, %r30, %r11;
@%p6 bra BB15_2;
BB15_9:
.loc 2 18 2
ret;
}
.visible .entry map_erfinv_float(
.param .u32 map_erfinv_float_param_0,
.param .u32 map_erfinv_float_param_1,
.param .u64 map_erfinv_float_param_2,
.param .u32 map_erfinv_float_param_3,
.param .u64 map_erfinv_float_param_4,
.param .u32 map_erfinv_float_param_5
)
{
.reg .pred %p<7>;
.reg .f32 %f<46>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r10, [map_erfinv_float_param_0];
ld.param.u32 %r11, [map_erfinv_float_param_1];
ld.param.u64 %rd3, [map_erfinv_float_param_2];
ld.param.u32 %r12, [map_erfinv_float_param_3];
ld.param.u64 %rd4, [map_erfinv_float_param_4];
ld.param.u32 %r13, [map_erfinv_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 19 1
mov.u32 %r14, %ntid.x;
mov.u32 %r15, %ctaid.x;
mov.u32 %r16, %tid.x;
mad.lo.s32 %r25, %r14, %r15, %r16;
.loc 2 19 1
setp.ge.s32 %p1, %r25, %r11;
@%p1 bra BB16_9;
.loc 2 19 1
mov.u32 %r17, %tid.y;
mov.u32 %r18, %ntid.y;
mov.u32 %r19, %ctaid.y;
mad.lo.s32 %r2, %r18, %r19, %r17;
.loc 2 19 22
mov.u32 %r20, %nctaid.y;
mul.lo.s32 %r3, %r20, %r18;
BB16_2:
.loc 2 19 1
setp.ge.s32 %p2, %r2, %r10;
@%p2 bra BB16_8;
.loc 2 19 1
mul.lo.s32 %r5, %r25, %r13;
.loc 2 19 92
mul.lo.s32 %r6, %r25, %r12;
mov.u32 %r26, %r2;
BB16_4:
.loc 2 19 1
mov.u32 %r7, %r26;
add.s32 %r21, %r7, %r5;
mul.wide.s32 %rd5, %r21, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 19 1
ld.global.f32 %f1, [%rd6];
.loc 3 8579 10
neg.f32 %f8, %f1;
mov.f32 %f9, 0f3F800000;
.loc 3 8579 10
fma.rn.f32 %f7, %f1, %f8, %f9;
// inline asm
lg2.approx.ftz.f32 %f6,%f7;
// inline asm
neg.f32 %f2, %f6;
setp.lt.f32 %p3, %f6, 0fC1033333;
@%p3 bra BB16_6;
mov.f32 %f10, 0f3221F645;
mov.f32 %f11, 0fAF8A6370;
.loc 3 8579 10
fma.rn.f32 %f12, %f11, %f2, %f10;
mov.f32 %f13, 0fB4016FDA;
.loc 3 8579 10
fma.rn.f32 %f14, %f12, %f2, %f13;
mov.f32 %f15, 0f3468F846;
.loc 3 8579 10
fma.rn.f32 %f16, %f14, %f2, %f15;
mov.f32 %f17, 0f370742AA;
.loc 3 8579 10
fma.rn.f32 %f18, %f16, %f2, %f17;
mov.f32 %f19, 0fB804DB4D;
.loc 3 8579 10
fma.rn.f32 %f20, %f18, %f2, %f19;
mov.f32 %f21, 0fBA4AFEA1;
.loc 3 8579 10
fma.rn.f32 %f22, %f20, %f2, %f21;
mov.f32 %f23, 0f3BB5C027;
.loc 3 8579 10
fma.rn.f32 %f24, %f22, %f2, %f23;
mov.f32 %f25, 0f3E24AE0F;
.loc 3 8579 10
fma.rn.f32 %f26, %f24, %f2, %f25;
mov.f32 %f27, 0f3F62DFC4;
.loc 3 8579 10
fma.rn.f32 %f28, %f26, %f2, %f27;
mul.f32 %f45, %f1, %f28;
bra.uni BB16_7;
BB16_6:
.loc 3 8579 10
// inline asm
rsqrt.approx.ftz.f32 %f29,%f2;
// inline asm
mov.f32 %f31, 0fBF29BAA5;
mov.f32 %f32, 0fBF1704A1;
.loc 3 8579 10
fma.rn.f32 %f33, %f32, %f29, %f31;
mov.f32 %f34, 0f3FCC6ADC;
.loc 3 8579 10
fma.rn.f32 %f35, %f33, %f29, %f34;
mov.f32 %f36, 0fBF2CDAED;
.loc 3 8579 10
fma.rn.f32 %f37, %f35, %f29, %f36;
mov.f32 %f38, 0fBDC30537;
.loc 3 8579 10
fma.rn.f32 %f39, %f37, %f29, %f38;
mov.f32 %f40, 0f3F55D9B9;
.loc 3 8579 10
fma.rn.f32 %f41, %f39, %f29, %f40;
rcp.rn.f32 %f42, %f29;
mul.f32 %f43, %f41, %f42;
neg.f32 %f44, %f43;
setp.lt.f32 %p4, %f1, 0f00000000;
selp.f32 %f45, %f44, %f43, %p4;
BB16_7:
.loc 2 19 92
add.s32 %r22, %r7, %r6;
mul.wide.s32 %rd7, %r22, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 19 92
st.global.f32 [%rd8], %f45;
.loc 2 19 22
add.s32 %r8, %r3, %r7;
.loc 2 19 1
setp.lt.s32 %p5, %r8, %r10;
mov.u32 %r26, %r8;
@%p5 bra BB16_4;
BB16_8:
.loc 2 19 22
mov.u32 %r23, %nctaid.x;
mad.lo.s32 %r25, %r23, %r14, %r25;
.loc 2 19 1
setp.lt.s32 %p6, %r25, %r11;
@%p6 bra BB16_2;
BB16_9:
.loc 2 19 2
ret;
}
.visible .entry map_exp10_float(
.param .u32 map_exp10_float_param_0,
.param .u32 map_exp10_float_param_1,
.param .u64 map_exp10_float_param_2,
.param .u32 map_exp10_float_param_3,
.param .u64 map_exp10_float_param_4,
.param .u32 map_exp10_float_param_5
)
{
.reg .pred %p<7>;
.reg .f32 %f<14>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map_exp10_float_param_0];
ld.param.u32 %r13, [map_exp10_float_param_1];
ld.param.u64 %rd3, [map_exp10_float_param_2];
ld.param.u32 %r14, [map_exp10_float_param_3];
ld.param.u64 %rd4, [map_exp10_float_param_4];
ld.param.u32 %r15, [map_exp10_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 20 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 20 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB17_6;
.loc 2 20 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 20 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 20 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB17_2:
.loc 2 20 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB17_5;
.loc 2 20 1
mul.lo.s32 %r7, %r25, %r15;
.loc 2 20 92
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB17_4:
.loc 2 20 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 20 1
ld.global.f32 %f3, [%rd6];
.loc 3 8428 10
mul.f32 %f4, %f3, 0f40549A78;
cvt.rzi.f32.f32 %f5, %f4;
mov.f32 %f6, 0fBE9A2080;
.loc 3 8428 10
fma.rn.f32 %f7, %f5, %f6, %f3;
mov.f32 %f8, 0fB55427DE;
.loc 3 8428 10
fma.rn.f32 %f9, %f5, %f8, %f7;
mul.f32 %f2, %f9, 0f40549A78;
// inline asm
ex2.approx.ftz.f32 %f1,%f2;
// inline asm
ex2.approx.f32 %f10, %f5;
mul.f32 %f11, %f1, %f10;
setp.lt.f32 %p3, %f3, 0fC2380000;
selp.f32 %f12, 0f00000000, %f11, %p3;
setp.gt.f32 %p4, %f3, 0f42380000;
selp.f32 %f13, 0f7F800000, %f12, %p4;
.loc 2 20 92
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 20 92
st.global.f32 [%rd8], %f13;
.loc 2 20 22
add.s32 %r10, %r5, %r9;
.loc 2 20 1
setp.lt.s32 %p5, %r10, %r12;
mov.u32 %r26, %r10;
@%p5 bra BB17_4;
BB17_5:
.loc 2 20 22
add.s32 %r25, %r4, %r25;
.loc 2 20 1
setp.lt.s32 %p6, %r25, %r13;
@%p6 bra BB17_2;
BB17_6:
.loc 2 20 2
ret;
}
.visible .entry map_exp2_float(
.param .u32 map_exp2_float_param_0,
.param .u32 map_exp2_float_param_1,
.param .u64 map_exp2_float_param_2,
.param .u32 map_exp2_float_param_3,
.param .u64 map_exp2_float_param_4,
.param .u32 map_exp2_float_param_5
)
{
.reg .pred %p<5>;
.reg .f32 %f<3>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map_exp2_float_param_0];
ld.param.u32 %r13, [map_exp2_float_param_1];
ld.param.u64 %rd3, [map_exp2_float_param_2];
ld.param.u32 %r14, [map_exp2_float_param_3];
ld.param.u64 %rd4, [map_exp2_float_param_4];
ld.param.u32 %r15, [map_exp2_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 21 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 21 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB18_6;
.loc 2 21 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 21 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 21 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB18_2:
.loc 2 21 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB18_5;
.loc 2 21 1
mul.lo.s32 %r7, %r25, %r15;
.loc 2 21 92
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB18_4:
.loc 2 21 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 21 1
ld.global.f32 %f1, [%rd6];
.loc 4 2805 10
ex2.approx.f32 %f2, %f1;
.loc 2 21 92
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 21 92
st.global.f32 [%rd8], %f2;
.loc 2 21 22
add.s32 %r10, %r5, %r9;
.loc 2 21 1
setp.lt.s32 %p3, %r10, %r12;
mov.u32 %r26, %r10;
@%p3 bra BB18_4;
BB18_5:
.loc 2 21 22
add.s32 %r25, %r4, %r25;
.loc 2 21 1
setp.lt.s32 %p4, %r25, %r13;
@%p4 bra BB18_2;
BB18_6:
.loc 2 21 2
ret;
}
.visible .entry map_exp_float(
.param .u32 map_exp_float_param_0,
.param .u32 map_exp_float_param_1,
.param .u64 map_exp_float_param_2,
.param .u32 map_exp_float_param_3,
.param .u64 map_exp_float_param_4,
.param .u32 map_exp_float_param_5
)
{
.reg .pred %p<7>;
.reg .f32 %f<15>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map_exp_float_param_0];
ld.param.u32 %r13, [map_exp_float_param_1];
ld.param.u64 %rd3, [map_exp_float_param_2];
ld.param.u32 %r14, [map_exp_float_param_3];
ld.param.u64 %rd4, [map_exp_float_param_4];
ld.param.u32 %r15, [map_exp_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 22 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 22 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB19_6;
.loc 2 22 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 22 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 22 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB19_2:
.loc 2 22 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB19_5;
.loc 2 22 1
mul.lo.s32 %r7, %r25, %r15;
.loc 2 22 100
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB19_4:
.loc 2 22 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 22 1
ld.global.f32 %f3, [%rd6];
.loc 3 8419 10
mul.f32 %f4, %f3, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f5, %f4;
mov.f32 %f6, 0fBF317200;
.loc 3 8419 10
fma.rn.f32 %f7, %f5, %f6, %f3;
mov.f32 %f8, 0fB5BFBE8E;
.loc 3 8419 10
fma.rn.f32 %f9, %f5, %f8, %f7;
mul.f32 %f2, %f9, 0f3FB8AA3B;
// inline asm
ex2.approx.ftz.f32 %f1,%f2;
// inline asm
add.f32 %f10, %f5, 0f00000000;
ex2.approx.f32 %f11, %f10;
mul.f32 %f12, %f1, %f11;
setp.lt.f32 %p3, %f3, 0fC2D20000;
selp.f32 %f13, 0f00000000, %f12, %p3;
setp.gt.f32 %p4, %f3, 0f42D20000;
selp.f32 %f14, 0f7F800000, %f13, %p4;
.loc 2 22 100
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 22 100
st.global.f32 [%rd8], %f14;
.loc 2 22 22
add.s32 %r10, %r5, %r9;
.loc 2 22 1
setp.lt.s32 %p5, %r10, %r12;
mov.u32 %r26, %r10;
@%p5 bra BB19_4;
BB19_5:
.loc 2 22 22
add.s32 %r25, %r4, %r25;
.loc 2 22 1
setp.lt.s32 %p6, %r25, %r13;
@%p6 bra BB19_2;
BB19_6:
.loc 2 22 2
ret;
}
.visible .entry map_expm1_float(
.param .u32 map_expm1_float_param_0,
.param .u32 map_expm1_float_param_1,
.param .u64 map_expm1_float_param_2,
.param .u32 map_expm1_float_param_3,
.param .u64 map_expm1_float_param_4,
.param .u32 map_expm1_float_param_5
)
{
.reg .pred %p<10>;
.reg .f32 %f<33>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map_expm1_float_param_0];
ld.param.u32 %r13, [map_expm1_float_param_1];
ld.param.u64 %rd3, [map_expm1_float_param_2];
ld.param.u32 %r14, [map_expm1_float_param_3];
ld.param.u64 %rd4, [map_expm1_float_param_4];
ld.param.u32 %r15, [map_expm1_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 23 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 23 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB20_6;
.loc 2 23 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 23 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 23 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB20_2:
.loc 2 23 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB20_5;
.loc 2 23 1
mul.lo.s32 %r7, %r25, %r15;
.loc 2 23 92
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB20_4:
.loc 2 23 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 23 1
ld.global.f32 %f1, [%rd6];
.loc 3 8507 10
mul.f32 %f2, %f1, 0f3FB8AA3B;
cvt.rni.f32.f32 %f3, %f2;
abs.f32 %f4, %f1;
setp.lt.f32 %p3, %f4, 0f3ED1EB85;
selp.f32 %f5, 0f00000000, %f3, %p3;
neg.f32 %f6, %f5;
mov.f32 %f7, 0f3F317200;
.loc 3 8507 10
fma.rn.f32 %f8, %f6, %f7, %f1;
mov.f32 %f9, 0f35BFBE8E;
.loc 3 8507 10
fma.rn.f32 %f10, %f6, %f9, %f8;
setp.eq.f32 %p4, %f5, 0f43000000;
add.f32 %f11, %f5, 0fBF800000;
selp.f32 %f12, %f11, %f5, %p4;
mov.f32 %f13, 0f3C095663;
mov.f32 %f14, 0f3AB5EBE6;
.loc 3 8507 10
fma.rn.f32 %f15, %f14, %f10, %f13;
mov.f32 %f16, 0f3D2AABE3;
.loc 3 8507 10
fma.rn.f32 %f17, %f15, %f10, %f16;
mov.f32 %f18, 0f3E2AA9F6;
.loc 3 8507 10
fma.rn.f32 %f19, %f17, %f10, %f18;
mov.f32 %f20, 0f3EFFFFFE;
.loc 3 8507 10
fma.rn.f32 %f21, %f19, %f10, %f20;
mul.f32 %f22, %f21, %f10;
fma.rn.f32 %f23, %f22, %f10, %f10;
ex2.approx.f32 %f24, %f12;
add.f32 %f25, %f24, 0fBF800000;
fma.rn.f32 %f26, %f23, %f24, %f25;
add.f32 %f27, %f26, %f26;
selp.f32 %f28, %f27, %f26, %p4;
setp.gt.f32 %p5, %f12, 0f43000000;
selp.f32 %f29, 0f7F800000, %f28, %p5;
setp.lt.f32 %p6, %f12, 0fC1C80000;
selp.f32 %f30, 0fBF800000, %f29, %p6;
setp.eq.f32 %p7, %f1, 0f00000000;
add.f32 %f31, %f1, %f1;
selp.f32 %f32, %f31, %f30, %p7;
.loc 2 23 92
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 23 92
st.global.f32 [%rd8], %f32;
.loc 2 23 22
add.s32 %r10, %r5, %r9;
.loc 2 23 1
setp.lt.s32 %p8, %r10, %r12;
mov.u32 %r26, %r10;
@%p8 bra BB20_4;
BB20_5:
.loc 2 23 22
add.s32 %r25, %r4, %r25;
.loc 2 23 1
setp.lt.s32 %p9, %r25, %r13;
@%p9 bra BB20_2;
BB20_6:
.loc 2 23 2
ret;
}
.visible .entry map_fabs_float(
.param .u32 map_fabs_float_param_0,
.param .u32 map_fabs_float_param_1,
.param .u64 map_fabs_float_param_2,
.param .u32 map_fabs_float_param_3,
.param .u64 map_fabs_float_param_4,
.param .u32 map_fabs_float_param_5
)
{
.reg .pred %p<5>;
.reg .f32 %f<3>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map_fabs_float_param_0];
ld.param.u32 %r13, [map_fabs_float_param_1];
ld.param.u64 %rd3, [map_fabs_float_param_2];
ld.param.u32 %r14, [map_fabs_float_param_3];
ld.param.u64 %rd4, [map_fabs_float_param_4];
ld.param.u32 %r15, [map_fabs_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 24 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 24 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB21_6;
.loc 2 24 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 24 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 24 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB21_2:
.loc 2 24 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB21_5;
.loc 2 24 1
mul.lo.s32 %r7, %r25, %r15;
.loc 2 24 100
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB21_4:
.loc 2 24 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 24 1
ld.global.f32 %f1, [%rd6];
.loc 4 2750 10
abs.f32 %f2, %f1;
.loc 2 24 100
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 24 100
st.global.f32 [%rd8], %f2;
.loc 2 24 22
add.s32 %r10, %r5, %r9;
.loc 2 24 1
setp.lt.s32 %p3, %r10, %r12;
mov.u32 %r26, %r10;
@%p3 bra BB21_4;
BB21_5:
.loc 2 24 22
add.s32 %r25, %r4, %r25;
.loc 2 24 1
setp.lt.s32 %p4, %r25, %r13;
@%p4 bra BB21_2;
BB21_6:
.loc 2 24 2
ret;
}
.visible .entry map_floor_float(
.param .u32 map_floor_float_param_0,
.param .u32 map_floor_float_param_1,
.param .u64 map_floor_float_param_2,
.param .u32 map_floor_float_param_3,
.param .u64 map_floor_float_param_4,
.param .u32 map_floor_float_param_5
)
{
.reg .pred %p<5>;
.reg .f32 %f<3>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map_floor_float_param_0];
ld.param.u32 %r13, [map_floor_float_param_1];
ld.param.u64 %rd3, [map_floor_float_param_2];
ld.param.u32 %r14, [map_floor_float_param_3];
ld.param.u64 %rd4, [map_floor_float_param_4];
ld.param.u32 %r15, [map_floor_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 25 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 25 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB22_6;
.loc 2 25 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 25 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 25 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB22_2:
.loc 2 25 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB22_5;
.loc 2 25 1
mul.lo.s32 %r7, %r25, %r15;
.loc 2 25 100
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB22_4:
.loc 2 25 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 25 1
ld.global.f32 %f1, [%rd6];
.loc 4 2740 10
cvt.rmi.f32.f32 %f2, %f1;
.loc 2 25 100
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 25 100
st.global.f32 [%rd8], %f2;
.loc 2 25 22
add.s32 %r10, %r5, %r9;
.loc 2 25 1
setp.lt.s32 %p3, %r10, %r12;
mov.u32 %r26, %r10;
@%p3 bra BB22_4;
BB22_5:
.loc 2 25 22
add.s32 %r25, %r4, %r25;
.loc 2 25 1
setp.lt.s32 %p4, %r25, %r13;
@%p4 bra BB22_2;
BB22_6:
.loc 2 25 2
ret;
}
.visible .entry map_j0_float(
.param .u32 map_j0_float_param_0,
.param .u32 map_j0_float_param_1,
.param .u64 map_j0_float_param_2,
.param .u32 map_j0_float_param_3,
.param .u64 map_j0_float_param_4,
.param .u32 map_j0_float_param_5
)
{
.local .align 4 .b8 __local_depot23[28];
.reg .b64 %SP;
.reg .b64 %SPL;
.reg .pred %p<28>;
.reg .f32 %f<129>;
.reg .s32 %r<207>;
.reg .s64 %rd<35>;
mov.u64 %SPL, __local_depot23;
cvta.local.u64 %SP, %SPL;
ld.param.u32 %r63, [map_j0_float_param_0];
ld.param.u32 %r64, [map_j0_float_param_1];
ld.param.u64 %rd13, [map_j0_float_param_2];
ld.param.u32 %r65, [map_j0_float_param_3];
ld.param.u64 %rd14, [map_j0_float_param_4];
ld.param.u32 %r66, [map_j0_float_param_5];
.loc 2 26 1
mov.u32 %r67, %ntid.x;
mov.u32 %r68, %ctaid.x;
mov.u32 %r69, %tid.x;
mad.lo.s32 %r189, %r67, %r68, %r69;
.loc 2 26 1
setp.ge.s32 %p1, %r189, %r64;
@%p1 bra BB23_38;
cvta.to.global.u64 %rd15, %rd14;
cvta.to.global.u64 %rd28, %rd13;
BB23_2:
.loc 2 26 1
mov.u32 %r70, %ctaid.y;
mov.u32 %r71, %ntid.y;
mov.u32 %r72, %tid.y;
mad.lo.s32 %r190, %r71, %r70, %r72;
.loc 2 26 1
setp.ge.s32 %p2, %r190, %r63;
@%p2 bra BB23_37;
BB23_3:
.loc 2 26 1
mad.lo.s32 %r77, %r189, %r66, %r190;
mul.wide.s32 %rd16, %r77, 4;
add.s64 %rd17, %rd15, %rd16;
.loc 2 26 1
ld.global.f32 %f28, [%rd17];
.loc 3 8527 10
abs.f32 %f1, %f28;
setp.gtu.f32 %p3, %f1, 0f41000000;
@%p3 bra BB23_5;
add.f32 %f29, %f1, 0fC019E8A9;
add.f32 %f30, %f29, 0fB3E971B3;
mov.f32 %f31, 0fA9ACA9B3;
mov.f32 %f32, 0fA6B3B8E7;
.loc 3 8527 10
fma.rn.f32 %f33, %f32, %f30, %f31;
mov.f32 %f34, 0f2C3F0E18;
.loc 3 8527 10
fma.rn.f32 %f35, %f33, %f30, %f34;
mov.f32 %f36, 0fACD41781;
.loc 3 8527 10
fma.rn.f32 %f37, %f35, %f30, %f36;
mov.f32 %f38, 0fAFE90F38;
.loc 3 8527 10
fma.rn.f32 %f39, %f37, %f30, %f38;
mov.f32 %f40, 0f3020305B;
.loc 3 8527 10
fma.rn.f32 %f41, %f39, %f30, %f40;
mov.f32 %f42, 0f33797143;
.loc 3 8527 10
fma.rn.f32 %f43, %f41, %f30, %f42;
mov.f32 %f44, 0f30F76F85;
.loc 3 8527 10
fma.rn.f32 %f45, %f43, %f30, %f44;
mov.f32 %f46, 0fB6B6DFC6;
.loc 3 8527 10
fma.rn.f32 %f47, %f45, %f30, %f46;
mov.f32 %f48, 0fB6F665C9;
.loc 3 8527 10
fma.rn.f32 %f49, %f47, %f30, %f48;
mov.f32 %f50, 0f399E2DEB;
.loc 3 8527 10
fma.rn.f32 %f51, %f49, %f30, %f50;
mov.f32 %f52, 0f3A4AE334;
.loc 3 8527 10
fma.rn.f32 %f53, %f51, %f30, %f52;
mov.f32 %f54, 0fBBEEAA1B;
.loc 3 8527 10
fma.rn.f32 %f55, %f53, %f30, %f54;
mov.f32 %f56, 0fBCDA7747;
.loc 3 8527 10
fma.rn.f32 %f57, %f55, %f30, %f56;
mul.f32 %f58, %f57, %f30;
add.f32 %f59, %f1, 0fC0B0A47B;
add.f32 %f60, %f59, 0f339A7A37;
mul.f32 %f61, %f58, %f60;
add.f32 %f62, %f1, 0fC10A75AB;
add.f32 %f63, %f62, 0fB4CCCDED;
mul.f32 %f128, %f61, %f63;
bra.uni BB23_36;
BB23_5:
.loc 3 8527 10
abs.f32 %f64, %f1;
setp.neu.f32 %p4, %f64, 0f7F800000;
@%p4 bra BB23_7;
mov.f32 %f128, 0f00000000;
bra.uni BB23_36;
BB23_7:
.loc 3 8527 10
// inline asm
rcp.approx.ftz.f32 %f66,%f1;
// inline asm
mul.f32 %f68, %f66, %f66;
mov.f32 %f69, 0fBF03B7C2;
mov.f32 %f70, 0f4056FE93;
.loc 3 8527 10
fma.rn.f32 %f71, %f70, %f68, %f69;
mov.f32 %f72, 0f3DD3B3F3;
.loc 3 8527 10
fma.rn.f32 %f73, %f71, %f68, %f72;
mov.f32 %f74, 0fBD7FFFB6;
.loc 3 8527 10
fma.rn.f32 %f75, %f73, %f68, %f74;
mov.f32 %f76, 0f3F800000;
.loc 3 8527 10
fma.rn.f32 %f77, %f75, %f68, %f76;
mov.f32 %f78, 0fBE52412D;
mov.f32 %f79, 0f3F91E009;
.loc 3 8527 10
fma.rn.f32 %f80, %f79, %f68, %f78;
mov.f32 %f81, 0f3D854ED1;
.loc 3 8527 10
fma.rn.f32 %f82, %f80, %f68, %f81;
mov.f32 %f83, 0fBDFFFFFF;
.loc 3 8527 10
fma.rn.f32 %f84, %f82, %f68, %f83;
fma.rn.f32 %f3, %f84, %f66, %f1;
rsqrt.approx.f32 %f85, %f1;
mul.f32 %f86, %f85, 0f3F4C422A;
mul.f32 %f4, %f86, %f77;
mul.f32 %f87, %f3, 0f3F22F983;
cvt.rni.s32.f32 %r198, %f87;
cvt.rn.f32.s32 %f88, %r198;
neg.f32 %f89, %f88;
mov.f32 %f90, 0f3FC90FDA;
.loc 3 8527 10
fma.rn.f32 %f91, %f89, %f90, %f3;
mov.f32 %f92, 0f33A22168;
.loc 3 8527 10
fma.rn.f32 %f93, %f89, %f92, %f91;
mov.f32 %f94, 0f27C234C5;
.loc 3 8527 10
fma.rn.f32 %f122, %f89, %f94, %f93;
abs.f32 %f95, %f3;
setp.leu.f32 %p5, %f95, 0f47CE4780;
@%p5 bra BB23_15;
add.u64 %rd19, %SP, 0;
.loc 3 8527 10
mov.b32 %r6, %f3;
shr.u32 %r7, %r6, 23;
and.b32 %r80, %r7, 255;
add.s32 %r81, %r80, -128;
shl.b32 %r82, %r6, 8;
or.b32 %r8, %r82, -2147483648;
shr.u32 %r9, %r81, 5;
cvta.to.local.u64 %rd31, %rd19;
mov.u32 %r192, 0;
mov.u32 %r191, %r192;
mov.u64 %rd32, __cudart_i2opi_f;
BB23_9:
.pragma "nounroll";
.loc 3 8527 10
ld.const.u32 %r85, [%rd32];
// inline asm
{
mad.lo.cc.u32 %r83, %r85, %r8, %r192;
madc.hi.u32 %r84, %r85, %r8, 0;
}
// inline asm
st.local.u32 [%rd31], %r83;
add.s64 %rd32, %rd32, 4;
add.s64 %rd31, %rd31, 4;
.loc 3 8527 10
add.s32 %r191, %r191, 1;
setp.ne.s32 %p6, %r191, 6;
mov.u32 %r192, %r84;
@%p6 bra BB23_9;
and.b32 %r196, %r6, -2147483648;
cvta.to.local.u64 %rd21, %rd19;
.loc 3 8527 10
st.local.u32 [%rd21+24], %r84;
mov.u32 %r88, 6;
.loc 3 8527 10
sub.s32 %r89, %r88, %r9;
mul.wide.s32 %rd22, %r89, 4;
add.s64 %rd6, %rd21, %rd22;
.loc 3 8527 10
ld.local.u32 %r193, [%rd6];
ld.local.u32 %r194, [%rd6+-4];
and.b32 %r17, %r7, 31;
setp.eq.s32 %p7, %r17, 0;
@%p7 bra BB23_12;
mov.u32 %r90, 32;
.loc 3 8527 10
sub.s32 %r91, %r90, %r17;
shr.u32 %r92, %r194, %r91;
shl.b32 %r93, %r193, %r17;
add.s32 %r193, %r92, %r93;
ld.local.u32 %r94, [%rd6+-8];
shr.u32 %r95, %r94, %r91;
shl.b32 %r96, %r194, %r17;
add.s32 %r194, %r95, %r96;
BB23_12:
shr.u32 %r97, %r194, 30;
shl.b32 %r98, %r193, 2;
add.s32 %r195, %r97, %r98;
shl.b32 %r23, %r194, 2;
shr.u32 %r99, %r195, 31;
shr.u32 %r100, %r193, 30;
add.s32 %r101, %r99, %r100;
neg.s32 %r102, %r101;
setp.eq.s32 %p8, %r196, 0;
selp.b32 %r198, %r101, %r102, %p8;
setp.eq.s32 %p9, %r99, 0;
mov.u32 %r197, %r23;
@%p9 bra BB23_14;
not.b32 %r103, %r195;
neg.s32 %r25, %r23;
setp.eq.s32 %p10, %r23, 0;
selp.u32 %r104, 1, 0, %p10;
add.s32 %r195, %r104, %r103;
xor.b32 %r196, %r196, -2147483648;
mov.u32 %r197, %r25;
BB23_14:
.loc 3 8527 10
clz.b32 %r105, %r195;
setp.eq.s32 %p11, %r105, 0;
shl.b32 %r106, %r195, %r105;
mov.u32 %r107, 32;
.loc 3 8527 10
sub.s32 %r108, %r107, %r105;
shr.u32 %r109, %r197, %r108;
add.s32 %r110, %r109, %r106;
selp.b32 %r111, %r195, %r110, %p11;
mul.lo.s32 %r112, %r111, -921707870;
mov.u32 %r113, -921707870;
.loc 3 8527 10
mul.hi.u32 %r114, %r111, %r113;
setp.gt.s32 %p12, %r114, 0;
shl.b32 %r115, %r114, 1;
shr.u32 %r116, %r112, 31;
add.s32 %r117, %r116, %r115;
selp.b32 %r118, %r117, %r114, %p12;
selp.b32 %r119, -1, 0, %p12;
mov.u32 %r120, 126;
.loc 3 8527 10
sub.s32 %r121, %r120, %r105;
add.s32 %r122, %r121, %r119;
shl.b32 %r123, %r122, 23;
add.s32 %r124, %r118, 1;
shr.u32 %r125, %r124, 7;
add.s32 %r126, %r125, 1;
shr.u32 %r127, %r126, 1;
add.s32 %r128, %r127, %r123;
or.b32 %r129, %r128, %r196;
mov.b32 %f122, %r129;
BB23_15:
and.b32 %r130, %r198, 3;
cvt.rn.f32.s32 %f96, %r130;
add.f32 %f97, %f122, 0fBF490FDB;
fma.rn.f32 %f123, %f96, 0f3FC90FDB, %f97;
abs.f32 %f98, %f123;
setp.neu.f32 %p13, %f98, 0f7F800000;
@%p13 bra BB23_17;
mov.f32 %f99, 0f00000000;
.loc 3 8527 10
mul.rn.f32 %f123, %f123, %f99;
BB23_17:
mul.f32 %f100, %f123, 0f3F22F983;
cvt.rni.s32.f32 %r206, %f100;
cvt.rn.f32.s32 %f101, %r206;
neg.f32 %f102, %f101;
fma.rn.f32 %f104, %f102, %f90, %f123;
fma.rn.f32 %f106, %f102, %f92, %f104;
fma.rn.f32 %f124, %f102, %f94, %f106;
abs.f32 %f108, %f123;
setp.leu.f32 %p14, %f108, 0f47CE4780;
@%p14 bra BB23_25;
add.u64 %rd24, %SP, 0;
.loc 3 8527 10
mov.b32 %r33, %f123;
shr.u32 %r34, %r33, 23;
and.b32 %r133, %r34, 255;
add.s32 %r134, %r133, -128;
shl.b32 %r135, %r33, 8;
or.b32 %r35, %r135, -2147483648;
shr.u32 %r36, %r134, 5;
cvta.to.local.u64 %rd33, %rd24;
mov.u32 %r200, 0;
mov.u32 %r199, %r200;
mov.u64 %rd34, __cudart_i2opi_f;
BB23_19:
.pragma "nounroll";
.loc 3 8527 10
ld.const.u32 %r138, [%rd34];
// inline asm
{
mad.lo.cc.u32 %r136, %r138, %r35, %r200;
madc.hi.u32 %r137, %r138, %r35, 0;
}
// inline asm
st.local.u32 [%rd33], %r136;
add.s64 %rd34, %rd34, 4;
add.s64 %rd33, %rd33, 4;
.loc 3 8527 10
add.s32 %r199, %r199, 1;
setp.ne.s32 %p15, %r199, 6;
mov.u32 %r200, %r137;
@%p15 bra BB23_19;
and.b32 %r204, %r33, -2147483648;
cvta.to.local.u64 %rd26, %rd24;
.loc 3 8527 10
st.local.u32 [%rd26+24], %r137;
mov.u32 %r141, 6;
.loc 3 8527 10
sub.s32 %r142, %r141, %r36;
mul.wide.s32 %rd27, %r142, 4;
add.s64 %rd12, %rd26, %rd27;
.loc 3 8527 10
ld.local.u32 %r201, [%rd12];
ld.local.u32 %r202, [%rd12+-4];
and.b32 %r44, %r34, 31;
setp.eq.s32 %p16, %r44, 0;
@%p16 bra BB23_22;
mov.u32 %r143, 32;
.loc 3 8527 10
sub.s32 %r144, %r143, %r44;
shr.u32 %r145, %r202, %r144;
shl.b32 %r146, %r201, %r44;
add.s32 %r201, %r145, %r146;
ld.local.u32 %r147, [%rd12+-8];
shr.u32 %r148, %r147, %r144;
shl.b32 %r149, %r202, %r44;
add.s32 %r202, %r148, %r149;
BB23_22:
shr.u32 %r150, %r202, 30;
shl.b32 %r151, %r201, 2;
add.s32 %r203, %r150, %r151;
shl.b32 %r50, %r202, 2;
shr.u32 %r152, %r203, 31;
shr.u32 %r153, %r201, 30;
add.s32 %r154, %r152, %r153;
neg.s32 %r155, %r154;
setp.eq.s32 %p17, %r204, 0;
selp.b32 %r206, %r154, %r155, %p17;
setp.eq.s32 %p18, %r152, 0;
mov.u32 %r205, %r50;
@%p18 bra BB23_24;
not.b32 %r156, %r203;
neg.s32 %r52, %r50;
setp.eq.s32 %p19, %r50, 0;
selp.u32 %r157, 1, 0, %p19;
add.s32 %r203, %r157, %r156;
xor.b32 %r204, %r204, -2147483648;
mov.u32 %r205, %r52;
BB23_24:
.loc 3 8527 10
clz.b32 %r158, %r203;
setp.eq.s32 %p20, %r158, 0;
shl.b32 %r159, %r203, %r158;
mov.u32 %r160, 32;
.loc 3 8527 10
sub.s32 %r161, %r160, %r158;
shr.u32 %r162, %r205, %r161;
add.s32 %r163, %r162, %r159;
selp.b32 %r164, %r203, %r163, %p20;
mul.lo.s32 %r165, %r164, -921707870;
mov.u32 %r166, -921707870;
.loc 3 8527 10
mul.hi.u32 %r167, %r164, %r166;
setp.gt.s32 %p21, %r167, 0;
shl.b32 %r168, %r167, 1;
shr.u32 %r169, %r165, 31;
add.s32 %r170, %r169, %r168;
selp.b32 %r171, %r170, %r167, %p21;
selp.b32 %r172, -1, 0, %p21;
mov.u32 %r173, 126;
.loc 3 8527 10
sub.s32 %r174, %r173, %r158;
add.s32 %r175, %r174, %r172;
shl.b32 %r176, %r175, 23;
add.s32 %r177, %r171, 1;
shr.u32 %r178, %r177, 7;
add.s32 %r179, %r178, 1;
shr.u32 %r180, %r179, 1;
add.s32 %r181, %r180, %r176;
or.b32 %r182, %r181, %r204;
mov.b32 %f124, %r182;
BB23_25:
mul.rn.f32 %f14, %f124, %f124;
add.s32 %r59, %r206, 1;
and.b32 %r60, %r59, 1;
setp.eq.s32 %p22, %r60, 0;
@%p22 bra BB23_27;
mov.f32 %f109, 0fBAB6061A;
mov.f32 %f110, 0f37CCF5CE;
.loc 3 8527 10
fma.rn.f32 %f125, %f110, %f14, %f109;
bra.uni BB23_28;
BB23_27:
mov.f32 %f111, 0f3C08839E;
mov.f32 %f112, 0fB94CA1F9;
.loc 3 8527 10
fma.rn.f32 %f125, %f112, %f14, %f111;
BB23_28:
@%p22 bra BB23_30;
mov.f32 %f113, 0f3D2AAAA5;
.loc 3 8527 10
fma.rn.f32 %f114, %f125, %f14, %f113;
mov.f32 %f115, 0fBF000000;
.loc 3 8527 10
fma.rn.f32 %f126, %f114, %f14, %f115;
bra.uni BB23_31;
BB23_30:
mov.f32 %f116, 0fBE2AAAA3;
.loc 3 8527 10
fma.rn.f32 %f117, %f125, %f14, %f116;
mov.f32 %f118, 0f00000000;
.loc 3 8527 10
fma.rn.f32 %f126, %f117, %f14, %f118;
BB23_31:
fma.rn.f32 %f127, %f126, %f124, %f124;
@%p22 bra BB23_33;
fma.rn.f32 %f127, %f126, %f14, %f76;
BB23_33:
and.b32 %r183, %r59, 2;
setp.eq.s32 %p25, %r183, 0;
@%p25 bra BB23_35;
mov.f32 %f120, 0f00000000;
mov.f32 %f121, 0fBF800000;
.loc 3 8527 10
fma.rn.f32 %f127, %f127, %f121, %f120;
BB23_35:
mul.f32 %f128, %f4, %f127;
BB23_36:
.loc 2 26 92
mad.lo.s32 %r184, %r189, %r65, %r190;
mul.wide.s32 %rd29, %r184, 4;
add.s64 %rd30, %rd28, %rd29;
.loc 2 26 92
st.global.f32 [%rd30], %f128;
.loc 2 26 22
mov.u32 %r186, %nctaid.y;
mad.lo.s32 %r190, %r186, %r71, %r190;
.loc 2 26 1
setp.lt.s32 %p26, %r190, %r63;
@%p26 bra BB23_3;
BB23_37:
.loc 2 26 22
mov.u32 %r187, %nctaid.x;
mad.lo.s32 %r189, %r187, %r67, %r189;
.loc 2 26 1
setp.lt.s32 %p27, %r189, %r64;
@%p27 bra BB23_2;
BB23_38:
.loc 2 26 2
ret;
}
.visible .entry map_j1_float(
.param .u32 map_j1_float_param_0,
.param .u32 map_j1_float_param_1,
.param .u64 map_j1_float_param_2,
.param .u32 map_j1_float_param_3,
.param .u64 map_j1_float_param_4,
.param .u32 map_j1_float_param_5
)
{
.local .align 4 .b8 __local_depot24[28];
.reg .b64 %SP;
.reg .b64 %SPL;
.reg .pred %p<30>;
.reg .f32 %f<129>;
.reg .s32 %r<212>;
.reg .s64 %rd<35>;
mov.u64 %SPL, __local_depot24;
cvta.local.u64 %SP, %SPL;
ld.param.u32 %r63, [map_j1_float_param_0];
ld.param.u32 %r64, [map_j1_float_param_1];
ld.param.u64 %rd13, [map_j1_float_param_2];
ld.param.u32 %r65, [map_j1_float_param_3];
ld.param.u64 %rd14, [map_j1_float_param_4];
ld.param.u32 %r66, [map_j1_float_param_5];
.loc 2 27 1
mov.u32 %r67, %ntid.x;
mov.u32 %r68, %ctaid.x;
mov.u32 %r69, %tid.x;
mad.lo.s32 %r194, %r67, %r68, %r69;
.loc 2 27 1
setp.ge.s32 %p1, %r194, %r64;
@%p1 bra BB24_38;
cvta.to.global.u64 %rd15, %rd14;
cvta.to.global.u64 %rd28, %rd13;
BB24_2:
.loc 2 27 1
mov.u32 %r70, %ctaid.y;
mov.u32 %r71, %ntid.y;
mov.u32 %r72, %tid.y;
mad.lo.s32 %r195, %r71, %r70, %r72;
.loc 2 27 1
setp.ge.s32 %p2, %r195, %r63;
@%p2 bra BB24_37;
BB24_3:
.loc 2 27 1
mad.lo.s32 %r77, %r194, %r66, %r195;
mul.wide.s32 %rd16, %r77, 4;
add.s64 %rd17, %rd15, %rd16;
.loc 2 27 1
ld.global.f32 %f1, [%rd17];
.loc 3 8532 10
abs.f32 %f2, %f1;
setp.gtu.f32 %p3, %f2, 0f40FB3333;
@%p3 bra BB24_5;
add.f32 %f29, %f2, 0fC0753AAC;
add.f32 %f30, %f29, 0f33A5090F;
mov.f32 %f31, 0f2B81BF42;
mov.f32 %f32, 0f29AF3463;
.loc 3 8532 10
fma.rn.f32 %f33, %f32, %f30, %f31;
mov.f32 %f34, 0fADE21EC1;
.loc 3 8532 10
fma.rn.f32 %f35, %f33, %f30, %f34;
mov.f32 %f36, 0fAF5DDEFF;
.loc 3 8532 10
fma.rn.f32 %f37, %f35, %f30, %f36;
mov.f32 %f38, 0f319B0C9D;
.loc 3 8532 10
fma.rn.f32 %f39, %f37, %f30, %f38;
mov.f32 %f40, 0f32E81173;
.loc 3 8532 10
fma.rn.f32 %f41, %f39, %f30, %f40;
mov.f32 %f42, 0fB50F8DC8;
.loc 3 8532 10
fma.rn.f32 %f43, %f41, %f30, %f42;
mov.f32 %f44, 0fB61E653D;
.loc 3 8532 10
fma.rn.f32 %f45, %f43, %f30, %f44;
mov.f32 %f46, 0f382CD9C5;
.loc 3 8532 10
fma.rn.f32 %f47, %f45, %f30, %f46;
mov.f32 %f48, 0f38F9EB10;
.loc 3 8532 10
fma.rn.f32 %f49, %f47, %f30, %f48;
mov.f32 %f50, 0fBAECEB9C;
.loc 3 8532 10
fma.rn.f32 %f51, %f49, %f30, %f50;
mov.f32 %f52, 0fBB276FFD;
.loc 3 8532 10
fma.rn.f32 %f53, %f51, %f30, %f52;
mov.f32 %f54, 0f3D073993;
.loc 3 8532 10
fma.rn.f32 %f55, %f53, %f30, %f54;
add.f32 %f56, %f2, 0fC0E07FB0;
add.f32 %f57, %f56, 0f3444B8DB;
mul.f32 %f58, %f55, %f57;
mul.f32 %f59, %f58, %f30;
mul.f32 %f128, %f59, %f2;
bra.uni BB24_36;
BB24_5:
.loc 3 8532 10
abs.f32 %f60, %f2;
setp.neu.f32 %p4, %f60, 0f7F800000;
@%p4 bra BB24_7;
mov.f32 %f128, 0f00000000;
bra.uni BB24_36;
BB24_7:
.loc 3 8532 10
// inline asm
rcp.approx.ftz.f32 %f62,%f2;
// inline asm
mul.f32 %f64, %f62, %f62;
mov.f32 %f65, 0f3F3FF7E9;
mov.f32 %f66, 0fC082CB37;
.loc 3 8532 10
fma.rn.f32 %f67, %f66, %f64, %f65;
mov.f32 %f68, 0fBE458BAE;
.loc 3 8532 10
fma.rn.f32 %f69, %f67, %f64, %f68;
mov.f32 %f70, 0f3E3FFF8B;
.loc 3 8532 10
fma.rn.f32 %f71, %f69, %f64, %f70;
mov.f32 %f72, 0f3F800000;
.loc 3 8532 10
fma.rn.f32 %f73, %f71, %f64, %f72;
mov.f32 %f74, 0f3EB914AD;
mov.f32 %f75, 0fBFCA3BA2;
.loc 3 8532 10
fma.rn.f32 %f76, %f75, %f64, %f74;
mov.f32 %f77, 0fBE27F2EC;
.loc 3 8532 10
fma.rn.f32 %f78, %f76, %f64, %f77;
mov.f32 %f79, 0f3EBFFFFD;
.loc 3 8532 10
fma.rn.f32 %f80, %f78, %f64, %f79;
fma.rn.f32 %f4, %f80, %f62, %f2;
rsqrt.approx.f32 %f81, %f2;
mul.f32 %f82, %f81, 0f3F4C422A;
mul.f32 %f5, %f82, %f73;
mul.f32 %f83, %f4, 0f3F22F983;
cvt.rni.s32.f32 %r203, %f83;
cvt.rn.f32.s32 %f84, %r203;
neg.f32 %f85, %f84;
mov.f32 %f86, 0f3FC90FDA;
.loc 3 8532 10
fma.rn.f32 %f87, %f85, %f86, %f4;
mov.f32 %f88, 0f33A22168;
.loc 3 8532 10
fma.rn.f32 %f89, %f85, %f88, %f87;
mov.f32 %f90, 0f27C234C5;
.loc 3 8532 10
fma.rn.f32 %f122, %f85, %f90, %f89;
abs.f32 %f91, %f4;
setp.leu.f32 %p5, %f91, 0f47CE4780;
@%p5 bra BB24_15;
add.u64 %rd19, %SP, 0;
.loc 3 8532 10
mov.b32 %r6, %f4;
shr.u32 %r7, %r6, 23;
and.b32 %r80, %r7, 255;
add.s32 %r81, %r80, -128;
shl.b32 %r82, %r6, 8;
or.b32 %r8, %r82, -2147483648;
shr.u32 %r9, %r81, 5;
cvta.to.local.u64 %rd31, %rd19;
mov.u32 %r197, 0;
mov.u32 %r196, %r197;
mov.u64 %rd32, __cudart_i2opi_f;
BB24_9:
.pragma "nounroll";
.loc 3 8532 10
ld.const.u32 %r85, [%rd32];
// inline asm
{
mad.lo.cc.u32 %r83, %r85, %r8, %r197;
madc.hi.u32 %r84, %r85, %r8, 0;
}
// inline asm
st.local.u32 [%rd31], %r83;
add.s64 %rd32, %rd32, 4;
add.s64 %rd31, %rd31, 4;
.loc 3 8532 10
add.s32 %r196, %r196, 1;
setp.ne.s32 %p6, %r196, 6;
mov.u32 %r197, %r84;
@%p6 bra BB24_9;
and.b32 %r201, %r6, -2147483648;
cvta.to.local.u64 %rd21, %rd19;
.loc 3 8532 10
st.local.u32 [%rd21+24], %r84;
mov.u32 %r88, 6;
.loc 3 8532 10
sub.s32 %r89, %r88, %r9;
mul.wide.s32 %rd22, %r89, 4;
add.s64 %rd6, %rd21, %rd22;
.loc 3 8532 10
ld.local.u32 %r198, [%rd6];
ld.local.u32 %r199, [%rd6+-4];
and.b32 %r17, %r7, 31;
setp.eq.s32 %p7, %r17, 0;
@%p7 bra BB24_12;
mov.u32 %r90, 32;
.loc 3 8532 10
sub.s32 %r91, %r90, %r17;
shr.u32 %r92, %r199, %r91;
shl.b32 %r93, %r198, %r17;
add.s32 %r198, %r92, %r93;
ld.local.u32 %r94, [%rd6+-8];
shr.u32 %r95, %r94, %r91;
shl.b32 %r96, %r199, %r17;
add.s32 %r199, %r95, %r96;
BB24_12:
shr.u32 %r97, %r199, 30;
shl.b32 %r98, %r198, 2;
add.s32 %r200, %r97, %r98;
shl.b32 %r23, %r199, 2;
shr.u32 %r99, %r200, 31;
shr.u32 %r100, %r198, 30;
add.s32 %r101, %r99, %r100;
neg.s32 %r102, %r101;
setp.eq.s32 %p8, %r201, 0;
selp.b32 %r203, %r101, %r102, %p8;
setp.eq.s32 %p9, %r99, 0;
mov.u32 %r202, %r23;
@%p9 bra BB24_14;
not.b32 %r103, %r200;
neg.s32 %r25, %r23;
setp.eq.s32 %p10, %r23, 0;
selp.u32 %r104, 1, 0, %p10;
add.s32 %r200, %r104, %r103;
xor.b32 %r201, %r201, -2147483648;
mov.u32 %r202, %r25;
BB24_14:
.loc 3 8532 10
clz.b32 %r105, %r200;
setp.eq.s32 %p11, %r105, 0;
shl.b32 %r106, %r200, %r105;
mov.u32 %r107, 32;
.loc 3 8532 10
sub.s32 %r108, %r107, %r105;
shr.u32 %r109, %r202, %r108;
add.s32 %r110, %r109, %r106;
selp.b32 %r111, %r200, %r110, %p11;
mul.lo.s32 %r112, %r111, -921707870;
mov.u32 %r113, -921707870;
.loc 3 8532 10
mul.hi.u32 %r114, %r111, %r113;
setp.gt.s32 %p12, %r114, 0;
shl.b32 %r115, %r114, 1;
shr.u32 %r116, %r112, 31;
add.s32 %r117, %r116, %r115;
selp.b32 %r118, %r117, %r114, %p12;
selp.b32 %r119, -1, 0, %p12;
mov.u32 %r120, 126;
.loc 3 8532 10
sub.s32 %r121, %r120, %r105;
add.s32 %r122, %r121, %r119;
shl.b32 %r123, %r122, 23;
add.s32 %r124, %r118, 1;
shr.u32 %r125, %r124, 7;
add.s32 %r126, %r125, 1;
shr.u32 %r127, %r126, 1;
add.s32 %r128, %r127, %r123;
or.b32 %r129, %r128, %r201;
mov.b32 %f122, %r129;
BB24_15:
and.b32 %r130, %r203, 3;
cvt.rn.f32.s32 %f92, %r130;
add.f32 %f93, %f122, 0fC016CBE4;
fma.rn.f32 %f123, %f92, 0f3FC90FDB, %f93;
abs.f32 %f94, %f123;
setp.neu.f32 %p13, %f94, 0f7F800000;
@%p13 bra BB24_17;
mov.f32 %f95, 0f00000000;
.loc 3 8532 10
mul.rn.f32 %f123, %f123, %f95;
BB24_17:
mul.f32 %f96, %f123, 0f3F22F983;
cvt.rni.s32.f32 %r211, %f96;
cvt.rn.f32.s32 %f97, %r211;
neg.f32 %f98, %f97;
fma.rn.f32 %f100, %f98, %f86, %f123;
fma.rn.f32 %f102, %f98, %f88, %f100;
fma.rn.f32 %f124, %f98, %f90, %f102;
abs.f32 %f104, %f123;
setp.leu.f32 %p14, %f104, 0f47CE4780;
@%p14 bra BB24_25;
add.u64 %rd24, %SP, 0;
.loc 3 8532 10
mov.b32 %r33, %f123;
shr.u32 %r34, %r33, 23;
and.b32 %r133, %r34, 255;
add.s32 %r134, %r133, -128;
shl.b32 %r135, %r33, 8;
or.b32 %r35, %r135, -2147483648;
shr.u32 %r36, %r134, 5;
cvta.to.local.u64 %rd33, %rd24;
mov.u32 %r205, 0;
mov.u32 %r204, %r205;
mov.u64 %rd34, __cudart_i2opi_f;
BB24_19:
.pragma "nounroll";
.loc 3 8532 10
ld.const.u32 %r138, [%rd34];
// inline asm
{
mad.lo.cc.u32 %r136, %r138, %r35, %r205;
madc.hi.u32 %r137, %r138, %r35, 0;
}
// inline asm
st.local.u32 [%rd33], %r136;
add.s64 %rd34, %rd34, 4;
add.s64 %rd33, %rd33, 4;
.loc 3 8532 10
add.s32 %r204, %r204, 1;
setp.ne.s32 %p15, %r204, 6;
mov.u32 %r205, %r137;
@%p15 bra BB24_19;
and.b32 %r209, %r33, -2147483648;
cvta.to.local.u64 %rd26, %rd24;
.loc 3 8532 10
st.local.u32 [%rd26+24], %r137;
mov.u32 %r141, 6;
.loc 3 8532 10
sub.s32 %r142, %r141, %r36;
mul.wide.s32 %rd27, %r142, 4;
add.s64 %rd12, %rd26, %rd27;
.loc 3 8532 10
ld.local.u32 %r206, [%rd12];
ld.local.u32 %r207, [%rd12+-4];
and.b32 %r44, %r34, 31;
setp.eq.s32 %p16, %r44, 0;
@%p16 bra BB24_22;
mov.u32 %r143, 32;
.loc 3 8532 10
sub.s32 %r144, %r143, %r44;
shr.u32 %r145, %r207, %r144;
shl.b32 %r146, %r206, %r44;
add.s32 %r206, %r145, %r146;
ld.local.u32 %r147, [%rd12+-8];
shr.u32 %r148, %r147, %r144;
shl.b32 %r149, %r207, %r44;
add.s32 %r207, %r148, %r149;
BB24_22:
shr.u32 %r150, %r207, 30;
shl.b32 %r151, %r206, 2;
add.s32 %r208, %r150, %r151;
shl.b32 %r50, %r207, 2;
shr.u32 %r152, %r208, 31;
shr.u32 %r153, %r206, 30;
add.s32 %r154, %r152, %r153;
neg.s32 %r155, %r154;
setp.eq.s32 %p17, %r209, 0;
selp.b32 %r211, %r154, %r155, %p17;
setp.eq.s32 %p18, %r152, 0;
mov.u32 %r210, %r50;
@%p18 bra BB24_24;
not.b32 %r156, %r208;
neg.s32 %r52, %r50;
setp.eq.s32 %p19, %r50, 0;
selp.u32 %r157, 1, 0, %p19;
add.s32 %r208, %r157, %r156;
xor.b32 %r209, %r209, -2147483648;
mov.u32 %r210, %r52;
BB24_24:
.loc 3 8532 10
clz.b32 %r158, %r208;
setp.eq.s32 %p20, %r158, 0;
shl.b32 %r159, %r208, %r158;
mov.u32 %r160, 32;
.loc 3 8532 10
sub.s32 %r161, %r160, %r158;
shr.u32 %r162, %r210, %r161;
add.s32 %r163, %r162, %r159;
selp.b32 %r164, %r208, %r163, %p20;
mul.lo.s32 %r165, %r164, -921707870;
mov.u32 %r166, -921707870;
.loc 3 8532 10
mul.hi.u32 %r167, %r164, %r166;
setp.gt.s32 %p21, %r167, 0;
shl.b32 %r168, %r167, 1;
shr.u32 %r169, %r165, 31;
add.s32 %r170, %r169, %r168;
selp.b32 %r171, %r170, %r167, %p21;
selp.b32 %r172, -1, 0, %p21;
mov.u32 %r173, 126;
.loc 3 8532 10
sub.s32 %r174, %r173, %r158;
add.s32 %r175, %r174, %r172;
shl.b32 %r176, %r175, 23;
add.s32 %r177, %r171, 1;
shr.u32 %r178, %r177, 7;
add.s32 %r179, %r178, 1;
shr.u32 %r180, %r179, 1;
add.s32 %r181, %r180, %r176;
or.b32 %r182, %r181, %r209;
mov.b32 %f124, %r182;
BB24_25:
mul.rn.f32 %f15, %f124, %f124;
add.s32 %r59, %r211, 1;
and.b32 %r60, %r59, 1;
setp.eq.s32 %p22, %r60, 0;
@%p22 bra BB24_27;
mov.f32 %f105, 0fBAB6061A;
mov.f32 %f106, 0f37CCF5CE;
.loc 3 8532 10
fma.rn.f32 %f125, %f106, %f15, %f105;
bra.uni BB24_28;
BB24_27:
mov.f32 %f107, 0f3C08839E;
mov.f32 %f108, 0fB94CA1F9;
.loc 3 8532 10
fma.rn.f32 %f125, %f108, %f15, %f107;
BB24_28:
@%p22 bra BB24_30;
mov.f32 %f109, 0f3D2AAAA5;
.loc 3 8532 10
fma.rn.f32 %f110, %f125, %f15, %f109;
mov.f32 %f111, 0fBF000000;
.loc 3 8532 10
fma.rn.f32 %f126, %f110, %f15, %f111;
bra.uni BB24_31;
BB24_30:
mov.f32 %f112, 0fBE2AAAA3;
.loc 3 8532 10
fma.rn.f32 %f113, %f125, %f15, %f112;
mov.f32 %f114, 0f00000000;
.loc 3 8532 10
fma.rn.f32 %f126, %f113, %f15, %f114;
BB24_31:
fma.rn.f32 %f127, %f126, %f124, %f124;
@%p22 bra BB24_33;
fma.rn.f32 %f127, %f126, %f15, %f72;
BB24_33:
and.b32 %r183, %r59, 2;
setp.eq.s32 %p25, %r183, 0;
@%p25 bra BB24_35;
mov.f32 %f116, 0f00000000;
mov.f32 %f117, 0fBF800000;
.loc 3 8532 10
fma.rn.f32 %f127, %f127, %f117, %f116;
BB24_35:
mul.f32 %f128, %f5, %f127;
BB24_36:
neg.f32 %f118, %f128;
setp.lt.f32 %p26, %f1, 0f00000000;
selp.f32 %f119, %f118, %f128, %p26;
mov.b32 %r184, %f1;
and.b32 %r185, %r184, -2147483648;
mov.b32 %r186, %f119;
and.b32 %r187, %r186, 2147483647;
or.b32 %r188, %r187, %r185;
mov.b32 %f120, %r188;
setp.lt.f32 %p27, %f2, 0f0DA24260;
selp.f32 %f121, %f120, %f119, %p27;
.loc 2 27 92
mad.lo.s32 %r189, %r194, %r65, %r195;
mul.wide.s32 %rd29, %r189, 4;
add.s64 %rd30, %rd28, %rd29;
.loc 2 27 92
st.global.f32 [%rd30], %f121;
.loc 2 27 22
mov.u32 %r191, %nctaid.y;
mad.lo.s32 %r195, %r191, %r71, %r195;
.loc 2 27 1
setp.lt.s32 %p28, %r195, %r63;
@%p28 bra BB24_3;
BB24_37:
.loc 2 27 22
mov.u32 %r192, %nctaid.x;
mad.lo.s32 %r194, %r192, %r67, %r194;
.loc 2 27 1
setp.lt.s32 %p29, %r194, %r64;
@%p29 bra BB24_2;
BB24_38:
.loc 2 27 2
ret;
}
.visible .entry map_lgamma_float(
.param .u32 map_lgamma_float_param_0,
.param .u32 map_lgamma_float_param_1,
.param .u64 map_lgamma_float_param_2,
.param .u32 map_lgamma_float_param_3,
.param .u64 map_lgamma_float_param_4,
.param .u32 map_lgamma_float_param_5
)
{
.reg .pred %p<37>;
.reg .f32 %f<269>;
.reg .s32 %r<48>;
.reg .s64 %rd<9>;
ld.param.u32 %r9, [map_lgamma_float_param_0];
ld.param.u32 %r10, [map_lgamma_float_param_1];
ld.param.u64 %rd1, [map_lgamma_float_param_2];
ld.param.u32 %r11, [map_lgamma_float_param_3];
ld.param.u64 %rd2, [map_lgamma_float_param_4];
ld.param.u32 %r12, [map_lgamma_float_param_5];
.loc 2 28 1
mov.u32 %r13, %tid.x;
mov.u32 %r14, %ntid.x;
mov.u32 %r15, %ctaid.x;
mad.lo.s32 %r46, %r14, %r15, %r13;
.loc 2 28 1
setp.ge.s32 %p1, %r46, %r10;
@%p1 bra BB25_42;
cvta.to.global.u64 %rd3, %rd2;
cvta.to.global.u64 %rd6, %rd1;
BB25_2:
.loc 2 28 1
mov.u32 %r16, %ctaid.y;
mov.u32 %r17, %ntid.y;
mov.u32 %r18, %tid.y;
mad.lo.s32 %r47, %r17, %r16, %r18;
.loc 2 28 1
setp.ge.s32 %p2, %r47, %r9;
@%p2 bra BB25_41;
BB25_3:
.loc 2 28 1
mad.lo.s32 %r23, %r46, %r12, %r47;
mul.wide.s32 %rd4, %r23, 4;
add.s64 %rd5, %rd3, %rd4;
.loc 2 28 1
ld.global.f32 %f1, [%rd5];
.loc 3 8613 10
abs.f32 %f2, %f1;
setp.ltu.f32 %p3, %f2, 0f40400000;
@%p3 bra BB25_10;
setp.ltu.f32 %p4, %f2, 0f40F9999A;
@%p4 bra BB25_9;
// inline asm
rcp.approx.ftz.f32 %f40,%f2;
// inline asm
mul.f32 %f42, %f40, %f40;
mov.f32 %f43, 0fBB360953;
mov.f32 %f44, 0f3A4BE755;
.loc 3 8613 10
fma.rn.f32 %f45, %f44, %f42, %f43;
mov.f32 %f46, 0f3DAAAAA3;
.loc 3 8613 10
fma.rn.f32 %f47, %f45, %f42, %f46;
mov.f32 %f48, 0f3F6B3F8E;
.loc 3 8613 10
fma.rn.f32 %f3, %f47, %f40, %f48;
setp.lt.f32 %p5, %f2, 0f7F800000;
setp.gt.f32 %p6, %f2, 0f00000000;
and.pred %p7, %p6, %p5;
@%p7 bra BB25_7;
lg2.approx.f32 %f261, %f2;
bra.uni BB25_8;
BB25_7:
.loc 3 8613 10
setp.lt.f32 %p8, %f2, 0f00800000;
mul.f32 %f51, %f2, 0f4B800000;
selp.f32 %f52, %f51, %f2, %p8;
selp.f32 %f53, 0fC3170000, 0fC2FE0000, %p8;
mov.b32 %r24, %f52;
and.b32 %r25, %r24, 8388607;
or.b32 %r26, %r25, 1065353216;
mov.b32 %f54, %r26;
shr.u32 %r27, %r24, 23;
cvt.rn.f32.u32 %f55, %r27;
add.f32 %f56, %f53, %f55;
setp.gt.f32 %p9, %f54, 0f3FB504F3;
mul.f32 %f57, %f54, 0f3F000000;
add.f32 %f58, %f56, 0f3F800000;
selp.f32 %f59, %f57, %f54, %p9;
selp.f32 %f60, %f58, %f56, %p9;
add.f32 %f61, %f59, 0fBF800000;
add.f32 %f50, %f59, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f49,%f50;
// inline asm
neg.f32 %f62, %f61;
mul.f32 %f63, %f61, %f62;
mul.rn.f32 %f64, %f49, %f63;
add.rn.f32 %f65, %f61, %f64;
mul.f32 %f66, %f65, %f65;
mov.f32 %f67, 0f3C4C4BE0;
mov.f32 %f68, 0f3B2063C3;
.loc 3 8613 10
fma.rn.f32 %f69, %f68, %f66, %f67;
mov.f32 %f70, 0f3DAAAB50;
.loc 3 8613 10
fma.rn.f32 %f71, %f69, %f66, %f70;
mul.f32 %f72, %f71, %f66;
fma.rn.f32 %f73, %f72, %f65, %f64;
add.f32 %f74, %f73, %f61;
mov.f32 %f75, 0f3F317218;
.loc 3 8613 10
fma.rn.f32 %f261, %f60, %f75, %f74;
BB25_8:
add.f32 %f76, %f2, 0fBF000000;
mul.f32 %f77, %f261, 0f3F000000;
mul.rn.f32 %f78, %f77, %f76;
sub.f32 %f79, %f78, %f2;
add.rn.f32 %f80, %f78, %f3;
add.f32 %f81, %f79, %f80;
setp.eq.f32 %p10, %f2, 0f7F800000;
selp.f32 %f268, %f2, %f81, %p10;
bra.uni BB25_18;
BB25_9:
.loc 3 8613 10
add.f32 %f84, %f2, 0fC0400000;
mov.f32 %f85, 0fC640F6F8;
mov.f32 %f86, 0fC43B38FB;
.loc 3 8613 10
fma.rn.f32 %f87, %f86, %f84, %f85;
mov.f32 %f88, 0fC7206560;
.loc 3 8613 10
fma.rn.f32 %f89, %f87, %f84, %f88;
mov.f32 %f90, 0fC73CB6AA;
.loc 3 8613 10
fma.rn.f32 %f91, %f89, %f84, %f90;
mov.f32 %f92, 0fC80BAE5A;
.loc 3 8613 10
fma.rn.f32 %f93, %f91, %f84, %f92;
add.f32 %f94, %f84, 0fC381A020;
mov.f32 %f95, 0fC62864B8;
.loc 3 8613 10
fma.rn.f32 %f96, %f94, %f84, %f95;
mov.f32 %f97, 0fC7B50686;
.loc 3 8613 10
fma.rn.f32 %f98, %f96, %f84, %f97;
mov.f32 %f99, 0fC8498465;
.loc 3 8613 10
fma.rn.f32 %f83, %f98, %f84, %f99;
// inline asm
rcp.approx.ftz.f32 %f82,%f83;
// inline asm
fma.rn.f32 %f268, %f93, %f82, %f84;
bra.uni BB25_18;
BB25_10:
.loc 3 8613 10
setp.ltu.f32 %p11, %f2, 0f3FC00000;
@%p11 bra BB25_12;
add.f32 %f100, %f2, 0fC0000000;
mov.f32 %f101, 0fB967A002;
mov.f32 %f102, 0f385007FA;
.loc 3 8613 10
fma.rn.f32 %f103, %f102, %f100, %f101;
mov.f32 %f104, 0f3A0DE6FC;
.loc 3 8613 10
fma.rn.f32 %f105, %f103, %f100, %f104;
mov.f32 %f106, 0fBA9DE0E2;
.loc 3 8613 10
fma.rn.f32 %f107, %f105, %f100, %f106;
mov.f32 %f108, 0f3B3D05B7;
.loc 3 8613 10
fma.rn.f32 %f109, %f107, %f100, %f108;
mov.f32 %f110, 0fBBF1EB10;
.loc 3 8613 10
fma.rn.f32 %f111, %f109, %f100, %f110;
mov.f32 %f112, 0f3CA89A28;
.loc 3 8613 10
fma.rn.f32 %f113, %f111, %f100, %f112;
mov.f32 %f114, 0fBD89F01A;
.loc 3 8613 10
fma.rn.f32 %f115, %f113, %f100, %f114;
mov.f32 %f116, 0f3EA51A66;
.loc 3 8613 10
fma.rn.f32 %f117, %f115, %f100, %f116;
mov.f32 %f118, 0f3ED87730;
.loc 3 8613 10
fma.rn.f32 %f119, %f117, %f100, %f118;
mul.f32 %f268, %f119, %f100;
bra.uni BB25_18;
BB25_12:
.loc 3 8613 10
setp.ltu.f32 %p12, %f2, 0f3F333333;
@%p12 bra BB25_14;
mov.f32 %f120, 0f3F800000;
.loc 3 8613 10
sub.f32 %f121, %f120, %f2;
mov.f32 %f122, 0f3DD47577;
mov.f32 %f123, 0f3D3BEF76;
.loc 3 8613 10
fma.rn.f32 %f124, %f123, %f121, %f122;
mov.f32 %f125, 0f3DFB8079;
.loc 3 8613 10
fma.rn.f32 %f126, %f124, %f121, %f125;
mov.f32 %f127, 0f3E0295B5;
.loc 3 8613 10
fma.rn.f32 %f128, %f126, %f121, %f127;
mov.f32 %f129, 0f3E12A765;
.loc 3 8613 10
fma.rn.f32 %f130, %f128, %f121, %f129;
mov.f32 %f131, 0f3E2D6867;
.loc 3 8613 10
fma.rn.f32 %f132, %f130, %f121, %f131;
mov.f32 %f133, 0f3E5462BF;
.loc 3 8613 10
fma.rn.f32 %f134, %f132, %f121, %f133;
mov.f32 %f135, 0f3E8A8A72;
.loc 3 8613 10
fma.rn.f32 %f136, %f134, %f121, %f135;
mov.f32 %f137, 0f3ECD26A4;
.loc 3 8613 10
fma.rn.f32 %f138, %f136, %f121, %f137;
mov.f32 %f139, 0f3F528D32;
.loc 3 8613 10
fma.rn.f32 %f140, %f138, %f121, %f139;
mov.f32 %f141, 0f3F13C468;
.loc 3 8613 10
fma.rn.f32 %f142, %f140, %f121, %f141;
mul.f32 %f268, %f142, %f121;
bra.uni BB25_18;
BB25_14:
mov.f32 %f143, 0fBBB34878;
mov.f32 %f144, 0f3B6B1C86;
.loc 3 8613 10
fma.rn.f32 %f145, %f144, %f2, %f143;
mov.f32 %f146, 0fBD36CAEF;
.loc 3 8613 10
fma.rn.f32 %f147, %f145, %f2, %f146;
mov.f32 %f148, 0f3E2B5555;
.loc 3 8613 10
fma.rn.f32 %f149, %f147, %f2, %f148;
mov.f32 %f150, 0fBD2C96C7;
.loc 3 8613 10
fma.rn.f32 %f151, %f149, %f2, %f150;
mov.f32 %f152, 0fBF27E6EB;
.loc 3 8613 10
fma.rn.f32 %f153, %f151, %f2, %f152;
mov.f32 %f154, 0f3F13C463;
.loc 3 8613 10
fma.rn.f32 %f155, %f153, %f2, %f154;
mul.f32 %f156, %f155, %f2;
fma.rn.f32 %f11, %f156, %f2, %f2;
setp.gt.f32 %p13, %f11, 0f00000000;
setp.lt.f32 %p14, %f11, 0f7F800000;
and.pred %p15, %p13, %p14;
@%p15 bra BB25_16;
lg2.approx.f32 %f262, %f11;
bra.uni BB25_17;
BB25_16:
.loc 3 8613 10
setp.lt.f32 %p16, %f11, 0f00800000;
mul.f32 %f159, %f11, 0f4B800000;
selp.f32 %f160, %f159, %f11, %p16;
selp.f32 %f161, 0fC3170000, 0fC2FE0000, %p16;
mov.b32 %r28, %f160;
and.b32 %r29, %r28, 8388607;
or.b32 %r30, %r29, 1065353216;
mov.b32 %f162, %r30;
shr.u32 %r31, %r28, 23;
cvt.rn.f32.u32 %f163, %r31;
add.f32 %f164, %f161, %f163;
setp.gt.f32 %p17, %f162, 0f3FB504F3;
mul.f32 %f165, %f162, 0f3F000000;
add.f32 %f166, %f164, 0f3F800000;
selp.f32 %f167, %f165, %f162, %p17;
selp.f32 %f168, %f166, %f164, %p17;
add.f32 %f169, %f167, 0fBF800000;
add.f32 %f158, %f167, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f157,%f158;
// inline asm
neg.f32 %f170, %f169;
mul.f32 %f171, %f169, %f170;
mul.rn.f32 %f172, %f157, %f171;
add.rn.f32 %f173, %f169, %f172;
mul.f32 %f174, %f173, %f173;
mov.f32 %f175, 0f3C4C4BE0;
mov.f32 %f176, 0f3B2063C3;
.loc 3 8613 10
fma.rn.f32 %f177, %f176, %f174, %f175;
mov.f32 %f178, 0f3DAAAB50;
.loc 3 8613 10
fma.rn.f32 %f179, %f177, %f174, %f178;
mul.f32 %f180, %f179, %f174;
fma.rn.f32 %f181, %f180, %f173, %f172;
add.f32 %f182, %f181, %f169;
mov.f32 %f183, 0f3F317218;
.loc 3 8613 10
fma.rn.f32 %f262, %f168, %f183, %f182;
BB25_17:
neg.f32 %f268, %f262;
BB25_18:
setp.ge.f32 %p18, %f1, 0f00000000;
@%p18 bra BB25_40;
cvt.rmi.f32.f32 %f184, %f2;
setp.neu.f32 %p19, %f2, %f184;
@%p19 bra BB25_21;
mov.f32 %f268, 0f7F800000;
bra.uni BB25_40;
BB25_21:
.loc 3 8613 10
setp.lt.f32 %p20, %f2, 0f1FEC1E4A;
@%p20 bra BB25_36;
add.f32 %f185, %f2, %f2;
cvt.rni.f32.f32 %f186, %f185;
cvt.rzi.s32.f32 %r5, %f186;
neg.f32 %f187, %f186;
mov.f32 %f188, 0f3F000000;
.loc 3 8613 10
fma.rn.f32 %f189, %f187, %f188, %f2;
mul.f32 %f17, %f189, 0f40490FDB;
mul.rn.f32 %f18, %f17, %f17;
and.b32 %r6, %r5, 1;
setp.eq.s32 %p21, %r6, 0;
@%p21 bra BB25_24;
mov.f32 %f190, 0fBAB6061A;
mov.f32 %f191, 0f37CCF5CE;
.loc 3 8613 10
fma.rn.f32 %f263, %f191, %f18, %f190;
bra.uni BB25_25;
BB25_24:
mov.f32 %f192, 0f3C08839E;
mov.f32 %f193, 0fB94CA1F9;
.loc 3 8613 10
fma.rn.f32 %f263, %f193, %f18, %f192;
BB25_25:
@%p21 bra BB25_27;
mov.f32 %f194, 0f3D2AAAA5;
.loc 3 8613 10
fma.rn.f32 %f195, %f263, %f18, %f194;
mov.f32 %f196, 0fBF000000;
.loc 3 8613 10
fma.rn.f32 %f264, %f195, %f18, %f196;
bra.uni BB25_28;
BB25_27:
mov.f32 %f197, 0fBE2AAAA3;
.loc 3 8613 10
fma.rn.f32 %f198, %f263, %f18, %f197;
mov.f32 %f199, 0f00000000;
.loc 3 8613 10
fma.rn.f32 %f264, %f198, %f18, %f199;
BB25_28:
fma.rn.f32 %f265, %f264, %f17, %f17;
@%p21 bra BB25_30;
mov.f32 %f200, 0f3F800000;
.loc 3 8613 10
fma.rn.f32 %f265, %f264, %f18, %f200;
BB25_30:
and.b32 %r32, %r5, 2;
setp.eq.s32 %p24, %r32, 0;
@%p24 bra BB25_32;
mov.f32 %f201, 0f00000000;
mov.f32 %f202, 0fBF800000;
.loc 3 8613 10
fma.rn.f32 %f265, %f265, %f202, %f201;
BB25_32:
abs.f32 %f203, %f265;
mul.f32 %f30, %f203, %f2;
setp.gt.f32 %p25, %f30, 0f00000000;
setp.lt.f32 %p26, %f30, 0f7F800000;
and.pred %p27, %p25, %p26;
@%p27 bra BB25_34;
lg2.approx.f32 %f266, %f30;
bra.uni BB25_35;
BB25_34:
.loc 3 8613 10
setp.lt.f32 %p28, %f30, 0f00800000;
mul.f32 %f206, %f30, 0f4B800000;
selp.f32 %f207, %f206, %f30, %p28;
selp.f32 %f208, 0fC3170000, 0fC2FE0000, %p28;
mov.b32 %r33, %f207;
and.b32 %r34, %r33, 8388607;
or.b32 %r35, %r34, 1065353216;
mov.b32 %f209, %r35;
shr.u32 %r36, %r33, 23;
cvt.rn.f32.u32 %f210, %r36;
add.f32 %f211, %f208, %f210;
setp.gt.f32 %p29, %f209, 0f3FB504F3;
mul.f32 %f212, %f209, 0f3F000000;
add.f32 %f213, %f211, 0f3F800000;
selp.f32 %f214, %f212, %f209, %p29;
selp.f32 %f215, %f213, %f211, %p29;
add.f32 %f216, %f214, 0fBF800000;
add.f32 %f205, %f214, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f204,%f205;
// inline asm
neg.f32 %f217, %f216;
mul.f32 %f218, %f216, %f217;
mul.rn.f32 %f219, %f204, %f218;
add.rn.f32 %f220, %f216, %f219;
mul.f32 %f221, %f220, %f220;
mov.f32 %f222, 0f3C4C4BE0;
mov.f32 %f223, 0f3B2063C3;
.loc 3 8613 10
fma.rn.f32 %f224, %f223, %f221, %f222;
mov.f32 %f225, 0f3DAAAB50;
.loc 3 8613 10
fma.rn.f32 %f226, %f224, %f221, %f225;
mul.f32 %f227, %f226, %f221;
fma.rn.f32 %f228, %f227, %f220, %f219;
add.f32 %f229, %f228, %f216;
mov.f32 %f230, 0f3F317218;
.loc 3 8613 10
fma.rn.f32 %f266, %f215, %f230, %f229;
BB25_35:
mov.f32 %f231, 0f3F928682;
.loc 3 8613 10
sub.f32 %f232, %f231, %f266;
sub.f32 %f268, %f232, %f268;
bra.uni BB25_40;
BB25_36:
.loc 3 8613 10
setp.gt.f32 %p30, %f2, 0f00000000;
setp.lt.f32 %p31, %f2, 0f7F800000;
and.pred %p32, %p30, %p31;
@%p32 bra BB25_38;
lg2.approx.f32 %f267, %f2;
bra.uni BB25_39;
BB25_38:
.loc 3 8613 10
setp.lt.f32 %p33, %f2, 0f00800000;
mul.f32 %f235, %f2, 0f4B800000;
selp.f32 %f236, %f235, %f2, %p33;
selp.f32 %f237, 0fC3170000, 0fC2FE0000, %p33;
mov.b32 %r37, %f236;
and.b32 %r38, %r37, 8388607;
or.b32 %r39, %r38, 1065353216;
mov.b32 %f238, %r39;
shr.u32 %r40, %r37, 23;
cvt.rn.f32.u32 %f239, %r40;
add.f32 %f240, %f237, %f239;
setp.gt.f32 %p34, %f238, 0f3FB504F3;
mul.f32 %f241, %f238, 0f3F000000;
add.f32 %f242, %f240, 0f3F800000;
selp.f32 %f243, %f241, %f238, %p34;
selp.f32 %f244, %f242, %f240, %p34;
add.f32 %f245, %f243, 0fBF800000;
add.f32 %f234, %f243, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f233,%f234;
// inline asm
neg.f32 %f246, %f245;
mul.f32 %f247, %f245, %f246;
mul.rn.f32 %f248, %f233, %f247;
add.rn.f32 %f249, %f245, %f248;
mul.f32 %f250, %f249, %f249;
mov.f32 %f251, 0f3C4C4BE0;
mov.f32 %f252, 0f3B2063C3;
.loc 3 8613 10
fma.rn.f32 %f253, %f252, %f250, %f251;
mov.f32 %f254, 0f3DAAAB50;
.loc 3 8613 10
fma.rn.f32 %f255, %f253, %f250, %f254;
mul.f32 %f256, %f255, %f250;
fma.rn.f32 %f257, %f256, %f249, %f248;
add.f32 %f258, %f257, %f245;
mov.f32 %f259, 0f3F317218;
.loc 3 8613 10
fma.rn.f32 %f267, %f244, %f259, %f258;
BB25_39:
neg.f32 %f268, %f267;
BB25_40:
.loc 2 28 92
mad.lo.s32 %r41, %r46, %r11, %r47;
mul.wide.s32 %rd7, %r41, 4;
add.s64 %rd8, %rd6, %rd7;
.loc 2 28 92
st.global.f32 [%rd8], %f268;
.loc 2 28 22
mov.u32 %r43, %nctaid.y;
mad.lo.s32 %r47, %r43, %r17, %r47;
.loc 2 28 1
setp.lt.s32 %p35, %r47, %r9;
@%p35 bra BB25_3;
BB25_41:
.loc 2 28 22
mov.u32 %r44, %nctaid.x;
mad.lo.s32 %r46, %r44, %r14, %r46;
.loc 2 28 1
setp.lt.s32 %p36, %r46, %r10;
@%p36 bra BB25_2;
BB25_42:
.loc 2 28 2
ret;
}
.visible .entry map_log10_float(
.param .u32 map_log10_float_param_0,
.param .u32 map_log10_float_param_1,
.param .u64 map_log10_float_param_2,
.param .u32 map_log10_float_param_3,
.param .u64 map_log10_float_param_4,
.param .u32 map_log10_float_param_5
)
{
.reg .pred %p<10>;
.reg .f32 %f<34>;
.reg .s32 %r<31>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map_log10_float_param_0];
ld.param.u32 %r13, [map_log10_float_param_1];
ld.param.u64 %rd3, [map_log10_float_param_2];
ld.param.u32 %r14, [map_log10_float_param_3];
ld.param.u64 %rd4, [map_log10_float_param_4];
ld.param.u32 %r15, [map_log10_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 29 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r29, %r1, %r16, %r17;
.loc 2 29 1
setp.ge.s32 %p1, %r29, %r13;
@%p1 bra BB26_9;
.loc 2 29 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 29 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 29 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB26_2:
.loc 2 29 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB26_8;
.loc 2 29 1
mul.lo.s32 %r7, %r29, %r15;
.loc 2 29 100
mul.lo.s32 %r8, %r29, %r14;
mov.u32 %r30, %r3;
BB26_4:
.loc 2 29 1
mov.u32 %r9, %r30;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 29 1
ld.global.f32 %f1, [%rd6];
.loc 3 8481 10
setp.gt.f32 %p3, %f1, 0f00000000;
setp.lt.f32 %p4, %f1, 0f7F800000;
and.pred %p5, %p3, %p4;
@%p5 bra BB26_6;
lg2.approx.f32 %f33, %f1;
bra.uni BB26_7;
BB26_6:
.loc 3 8481 10
setp.lt.f32 %p6, %f1, 0f00800000;
mul.f32 %f7, %f1, 0f4B800000;
selp.f32 %f8, %f7, %f1, %p6;
selp.f32 %f9, 0fC3170000, 0fC2FE0000, %p6;
mov.b32 %r24, %f8;
and.b32 %r25, %r24, 8388607;
or.b32 %r26, %r25, 1065353216;
mov.b32 %f10, %r26;
shr.u32 %r27, %r24, 23;
cvt.rn.f32.u32 %f11, %r27;
add.f32 %f12, %f9, %f11;
setp.gt.f32 %p7, %f10, 0f3FB504F3;
mul.f32 %f13, %f10, 0f3F000000;
add.f32 %f14, %f12, 0f3F800000;
selp.f32 %f15, %f13, %f10, %p7;
selp.f32 %f16, %f14, %f12, %p7;
add.f32 %f17, %f15, 0fBF800000;
add.f32 %f6, %f15, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f5,%f6;
// inline asm
neg.f32 %f18, %f17;
mul.f32 %f19, %f17, %f18;
mul.rn.f32 %f20, %f5, %f19;
add.rn.f32 %f21, %f17, %f20;
mul.f32 %f22, %f21, %f21;
mov.f32 %f23, 0f3C4C4BE0;
mov.f32 %f24, 0f3B2063C3;
.loc 3 8481 10
fma.rn.f32 %f25, %f24, %f22, %f23;
mov.f32 %f26, 0f3DAAAB50;
.loc 3 8481 10
fma.rn.f32 %f27, %f25, %f22, %f26;
mul.f32 %f28, %f27, %f22;
fma.rn.f32 %f29, %f28, %f21, %f20;
add.f32 %f30, %f29, %f17;
mov.f32 %f31, 0f3F317218;
.loc 3 8481 10
fma.rn.f32 %f33, %f16, %f31, %f30;
BB26_7:
.loc 2 29 100
add.s32 %r28, %r9, %r8;
mul.wide.s32 %rd7, %r28, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 3 8481 10
mul.f32 %f32, %f33, 0f3EDE5BD9;
.loc 2 29 100
st.global.f32 [%rd8], %f32;
.loc 2 29 22
add.s32 %r10, %r5, %r9;
.loc 2 29 1
setp.lt.s32 %p8, %r10, %r12;
mov.u32 %r30, %r10;
@%p8 bra BB26_4;
BB26_8:
.loc 2 29 22
add.s32 %r29, %r4, %r29;
.loc 2 29 1
setp.lt.s32 %p9, %r29, %r13;
@%p9 bra BB26_2;
BB26_9:
.loc 2 29 2
ret;
}
.visible .entry map_log1p_float(
.param .u32 map_log1p_float_param_0,
.param .u32 map_log1p_float_param_1,
.param .u64 map_log1p_float_param_2,
.param .u32 map_log1p_float_param_3,
.param .u64 map_log1p_float_param_4,
.param .u32 map_log1p_float_param_5
)
{
.reg .pred %p<13>;
.reg .f32 %f<48>;
.reg .s32 %r<31>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map_log1p_float_param_0];
ld.param.u32 %r13, [map_log1p_float_param_1];
ld.param.u64 %rd3, [map_log1p_float_param_2];
ld.param.u32 %r14, [map_log1p_float_param_3];
ld.param.u64 %rd4, [map_log1p_float_param_4];
ld.param.u32 %r15, [map_log1p_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 30 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r29, %r1, %r16, %r17;
.loc 2 30 1
setp.ge.s32 %p1, %r29, %r13;
@%p1 bra BB27_11;
.loc 2 30 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 30 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 30 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB27_2:
.loc 2 30 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB27_10;
.loc 2 30 1
mul.lo.s32 %r7, %r29, %r15;
.loc 2 30 92
mul.lo.s32 %r8, %r29, %r14;
mov.u32 %r30, %r3;
BB27_4:
.loc 2 30 1
mov.u32 %r9, %r30;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 30 1
ld.global.f32 %f1, [%rd6];
.loc 3 8487 10
setp.le.f32 %p3, %f1, 0f3F266666;
setp.ge.f32 %p4, %f1, 0fBEC9BA5E;
and.pred %p5, %p4, %p3;
@%p5 bra BB27_8;
add.f32 %f2, %f1, 0f3F800000;
setp.gt.f32 %p6, %f2, 0f00000000;
setp.lt.f32 %p7, %f2, 0f7F800000;
and.pred %p8, %p6, %p7;
@%p8 bra BB27_7;
lg2.approx.f32 %f47, %f2;
bra.uni BB27_9;
BB27_7:
.loc 3 8487 10
setp.lt.f32 %p9, %f2, 0f00800000;
mul.f32 %f9, %f2, 0f4B800000;
selp.f32 %f10, %f9, %f2, %p9;
selp.f32 %f11, 0fC3170000, 0fC2FE0000, %p9;
mov.b32 %r24, %f10;
and.b32 %r25, %r24, 8388607;
or.b32 %r26, %r25, 1065353216;
mov.b32 %f12, %r26;
shr.u32 %r27, %r24, 23;
cvt.rn.f32.u32 %f13, %r27;
add.f32 %f14, %f11, %f13;
setp.gt.f32 %p10, %f12, 0f3FB504F3;
mul.f32 %f15, %f12, 0f3F000000;
add.f32 %f16, %f14, 0f3F800000;
selp.f32 %f17, %f15, %f12, %p10;
selp.f32 %f18, %f16, %f14, %p10;
add.f32 %f19, %f17, 0fBF800000;
add.f32 %f8, %f17, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f7,%f8;
// inline asm
neg.f32 %f20, %f19;
mul.f32 %f21, %f19, %f20;
mul.rn.f32 %f22, %f7, %f21;
add.rn.f32 %f23, %f19, %f22;
mul.f32 %f24, %f23, %f23;
mov.f32 %f25, 0f3C4C4BE0;
mov.f32 %f26, 0f3B2063C3;
.loc 3 8487 10
fma.rn.f32 %f27, %f26, %f24, %f25;
mov.f32 %f28, 0f3DAAAB50;
.loc 3 8487 10
fma.rn.f32 %f29, %f27, %f24, %f28;
mul.f32 %f30, %f29, %f24;
fma.rn.f32 %f31, %f30, %f23, %f22;
add.f32 %f32, %f31, %f19;
mov.f32 %f33, 0f3F317218;
.loc 3 8487 10
fma.rn.f32 %f47, %f18, %f33, %f32;
bra.uni BB27_9;
BB27_8:
.loc 3 8487 10
add.f32 %f34, %f1, 0f40000000;
div.approx.f32 %f35, %f1, %f34;
neg.f32 %f36, %f1;
mul.rn.f32 %f37, %f36, %f35;
add.rn.f32 %f38, %f1, %f37;
mul.f32 %f39, %f38, %f38;
mov.f32 %f40, 0f3C4C4BE0;
mov.f32 %f41, 0f3B2063C3;
.loc 3 8487 10
fma.rn.f32 %f42, %f41, %f39, %f40;
mov.f32 %f43, 0f3DAAAB50;
.loc 3 8487 10
fma.rn.f32 %f44, %f42, %f39, %f43;
mul.f32 %f45, %f44, %f39;
fma.rn.f32 %f46, %f45, %f38, %f37;
add.f32 %f47, %f46, %f1;
BB27_9:
.loc 2 30 92
add.s32 %r28, %r9, %r8;
mul.wide.s32 %rd7, %r28, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 30 92
st.global.f32 [%rd8], %f47;
.loc 2 30 22
add.s32 %r10, %r5, %r9;
.loc 2 30 1
setp.lt.s32 %p11, %r10, %r12;
mov.u32 %r30, %r10;
@%p11 bra BB27_4;
BB27_10:
.loc 2 30 22
add.s32 %r29, %r4, %r29;
.loc 2 30 1
setp.lt.s32 %p12, %r29, %r13;
@%p12 bra BB27_2;
BB27_11:
.loc 2 30 2
ret;
}
.visible .entry map_log2_float(
.param .u32 map_log2_float_param_0,
.param .u32 map_log2_float_param_1,
.param .u64 map_log2_float_param_2,
.param .u32 map_log2_float_param_3,
.param .u64 map_log2_float_param_4,
.param .u32 map_log2_float_param_5
)
{
.reg .pred %p<10>;
.reg .f32 %f<34>;
.reg .s32 %r<31>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map_log2_float_param_0];
ld.param.u32 %r13, [map_log2_float_param_1];
ld.param.u64 %rd3, [map_log2_float_param_2];
ld.param.u32 %r14, [map_log2_float_param_3];
ld.param.u64 %rd4, [map_log2_float_param_4];
ld.param.u32 %r15, [map_log2_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 31 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r29, %r1, %r16, %r17;
.loc 2 31 1
setp.ge.s32 %p1, %r29, %r13;
@%p1 bra BB28_9;
.loc 2 31 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 31 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 31 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB28_2:
.loc 2 31 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB28_8;
.loc 2 31 1
mul.lo.s32 %r7, %r29, %r15;
.loc 2 31 92
mul.lo.s32 %r8, %r29, %r14;
mov.u32 %r30, %r3;
BB28_4:
.loc 2 31 1
mov.u32 %r9, %r30;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 31 1
ld.global.f32 %f1, [%rd6];
.loc 3 8410 10
setp.gt.f32 %p3, %f1, 0f00000000;
setp.lt.f32 %p4, %f1, 0f7F800000;
and.pred %p5, %p3, %p4;
@%p5 bra BB28_6;
lg2.approx.f32 %f33, %f1;
bra.uni BB28_7;
BB28_6:
.loc 3 8410 10
setp.lt.f32 %p6, %f1, 0f00800000;
mul.f32 %f7, %f1, 0f4B800000;
selp.f32 %f8, %f7, %f1, %p6;
selp.f32 %f9, 0fC3170000, 0fC2FE0000, %p6;
mov.b32 %r24, %f8;
and.b32 %r25, %r24, 8388607;
or.b32 %r26, %r25, 1065353216;
mov.b32 %f10, %r26;
shr.u32 %r27, %r24, 23;
cvt.rn.f32.u32 %f11, %r27;
add.f32 %f12, %f9, %f11;
setp.gt.f32 %p7, %f10, 0f3FB504F3;
mul.f32 %f13, %f10, 0f3F000000;
add.f32 %f14, %f12, 0f3F800000;
selp.f32 %f15, %f13, %f10, %p7;
selp.f32 %f16, %f14, %f12, %p7;
add.f32 %f17, %f15, 0fBF800000;
add.f32 %f6, %f15, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f5,%f6;
// inline asm
neg.f32 %f18, %f17;
mul.f32 %f19, %f17, %f18;
mul.rn.f32 %f20, %f5, %f19;
add.rn.f32 %f21, %f17, %f20;
mul.f32 %f22, %f21, %f21;
mov.f32 %f23, 0f3C4C4BE0;
mov.f32 %f24, 0f3B2063C3;
.loc 3 8410 10
fma.rn.f32 %f25, %f24, %f22, %f23;
mov.f32 %f26, 0f3DAAAB50;
.loc 3 8410 10
fma.rn.f32 %f27, %f25, %f22, %f26;
mul.f32 %f28, %f27, %f22;
fma.rn.f32 %f29, %f28, %f21, %f20;
add.f32 %f30, %f29, %f17;
mov.f32 %f31, 0f3F317218;
.loc 3 8410 10
fma.rn.f32 %f33, %f16, %f31, %f30;
BB28_7:
.loc 2 31 92
add.s32 %r28, %r9, %r8;
mul.wide.s32 %rd7, %r28, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 3 8410 10
mul.f32 %f32, %f33, 0f3FB8AA3B;
.loc 2 31 92
st.global.f32 [%rd8], %f32;
.loc 2 31 22
add.s32 %r10, %r5, %r9;
.loc 2 31 1
setp.lt.s32 %p8, %r10, %r12;
mov.u32 %r30, %r10;
@%p8 bra BB28_4;
BB28_8:
.loc 2 31 22
add.s32 %r29, %r4, %r29;
.loc 2 31 1
setp.lt.s32 %p9, %r29, %r13;
@%p9 bra BB28_2;
BB28_9:
.loc 2 31 2
ret;
}
.visible .entry map_logb_float(
.param .u32 map_logb_float_param_0,
.param .u32 map_logb_float_param_1,
.param .u64 map_logb_float_param_2,
.param .u32 map_logb_float_param_3,
.param .u64 map_logb_float_param_4,
.param .u32 map_logb_float_param_5
)
{
.reg .pred %p<8>;
.reg .f32 %f<10>;
.reg .s32 %r<34>;
.reg .s64 %rd<9>;
ld.param.u32 %r11, [map_logb_float_param_0];
ld.param.u32 %r12, [map_logb_float_param_1];
ld.param.u64 %rd3, [map_logb_float_param_2];
ld.param.u32 %r13, [map_logb_float_param_3];
ld.param.u64 %rd4, [map_logb_float_param_4];
ld.param.u32 %r14, [map_logb_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 32 1
mov.u32 %r15, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r32, %r15, %r16, %r17;
.loc 2 32 1
setp.ge.s32 %p1, %r32, %r12;
@%p1 bra BB29_9;
.loc 2 32 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r2, %r19, %r20, %r18;
.loc 2 32 22
mov.u32 %r21, %nctaid.y;
mul.lo.s32 %r3, %r21, %r19;
BB29_2:
.loc 2 32 1
setp.ge.s32 %p2, %r2, %r11;
@%p2 bra BB29_8;
.loc 2 32 1
mul.lo.s32 %r5, %r32, %r14;
.loc 2 32 92
mul.lo.s32 %r6, %r32, %r13;
mov.u32 %r33, %r2;
BB29_4:
.loc 2 32 1
mov.u32 %r7, %r33;
add.s32 %r22, %r7, %r5;
mul.wide.s32 %rd5, %r22, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 32 1
ld.global.f32 %f1, [%rd6];
.loc 3 8728 10
abs.f32 %f5, %f1;
mov.b32 %r8, %f5;
setp.lt.u32 %p3, %r8, 8388608;
@%p3 bra BB29_6;
shr.u32 %r23, %r8, 23;
and.b32 %r24, %r23, 255;
add.s32 %r25, %r24, -127;
cvt.rn.f32.s32 %f6, %r25;
mul.f32 %f7, %f1, %f1;
setp.gt.u32 %p4, %r8, 2139095039;
selp.f32 %f9, %f7, %f6, %p4;
bra.uni BB29_7;
BB29_6:
.loc 3 8728 10
clz.b32 %r26, %r8;
mov.u32 %r27, -118;
.loc 3 8728 10
sub.s32 %r28, %r27, %r26;
cvt.rn.f32.s32 %f8, %r28;
setp.eq.f32 %p5, %f1, 0f00000000;
selp.f32 %f9, 0fFF800000, %f8, %p5;
BB29_7:
.loc 2 32 92
add.s32 %r29, %r7, %r6;
mul.wide.s32 %rd7, %r29, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 32 92
st.global.f32 [%rd8], %f9;
.loc 2 32 22
add.s32 %r9, %r3, %r7;
.loc 2 32 1
setp.lt.s32 %p6, %r9, %r11;
mov.u32 %r33, %r9;
@%p6 bra BB29_4;
BB29_8:
.loc 2 32 22
mov.u32 %r30, %nctaid.x;
mad.lo.s32 %r32, %r30, %r15, %r32;
.loc 2 32 1
setp.lt.s32 %p7, %r32, %r12;
@%p7 bra BB29_2;
BB29_9:
.loc 2 32 2
ret;
}
.visible .entry map_log_float(
.param .u32 map_log_float_param_0,
.param .u32 map_log_float_param_1,
.param .u64 map_log_float_param_2,
.param .u32 map_log_float_param_3,
.param .u64 map_log_float_param_4,
.param .u32 map_log_float_param_5
)
{
.reg .pred %p<10>;
.reg .f32 %f<33>;
.reg .s32 %r<31>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map_log_float_param_0];
ld.param.u32 %r13, [map_log_float_param_1];
ld.param.u64 %rd3, [map_log_float_param_2];
ld.param.u32 %r14, [map_log_float_param_3];
ld.param.u64 %rd4, [map_log_float_param_4];
ld.param.u32 %r15, [map_log_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 33 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r29, %r1, %r16, %r17;
.loc 2 33 1
setp.ge.s32 %p1, %r29, %r13;
@%p1 bra BB30_9;
.loc 2 33 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 33 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 33 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB30_2:
.loc 2 33 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB30_8;
.loc 2 33 1
mul.lo.s32 %r7, %r29, %r15;
.loc 2 33 100
mul.lo.s32 %r8, %r29, %r14;
mov.u32 %r30, %r3;
BB30_4:
.loc 2 33 1
mov.u32 %r9, %r30;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 33 1
ld.global.f32 %f1, [%rd6];
.loc 3 8472 10
setp.gt.f32 %p3, %f1, 0f00000000;
setp.lt.f32 %p4, %f1, 0f7F800000;
and.pred %p5, %p3, %p4;
@%p5 bra BB30_6;
lg2.approx.f32 %f32, %f1;
bra.uni BB30_7;
BB30_6:
.loc 3 8472 10
setp.lt.f32 %p6, %f1, 0f00800000;
mul.f32 %f7, %f1, 0f4B800000;
selp.f32 %f8, %f7, %f1, %p6;
selp.f32 %f9, 0fC3170000, 0fC2FE0000, %p6;
mov.b32 %r24, %f8;
and.b32 %r25, %r24, 8388607;
or.b32 %r26, %r25, 1065353216;
mov.b32 %f10, %r26;
shr.u32 %r27, %r24, 23;
cvt.rn.f32.u32 %f11, %r27;
add.f32 %f12, %f9, %f11;
setp.gt.f32 %p7, %f10, 0f3FB504F3;
mul.f32 %f13, %f10, 0f3F000000;
add.f32 %f14, %f12, 0f3F800000;
selp.f32 %f15, %f13, %f10, %p7;
selp.f32 %f16, %f14, %f12, %p7;
add.f32 %f17, %f15, 0fBF800000;
add.f32 %f6, %f15, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f5,%f6;
// inline asm
neg.f32 %f18, %f17;
mul.f32 %f19, %f17, %f18;
mul.rn.f32 %f20, %f5, %f19;
add.rn.f32 %f21, %f17, %f20;
mul.f32 %f22, %f21, %f21;
mov.f32 %f23, 0f3C4C4BE0;
mov.f32 %f24, 0f3B2063C3;
.loc 3 8472 10
fma.rn.f32 %f25, %f24, %f22, %f23;
mov.f32 %f26, 0f3DAAAB50;
.loc 3 8472 10
fma.rn.f32 %f27, %f25, %f22, %f26;
mul.f32 %f28, %f27, %f22;
fma.rn.f32 %f29, %f28, %f21, %f20;
add.f32 %f30, %f29, %f17;
mov.f32 %f31, 0f3F317218;
.loc 3 8472 10
fma.rn.f32 %f32, %f16, %f31, %f30;
BB30_7:
.loc 2 33 100
add.s32 %r28, %r9, %r8;
mul.wide.s32 %rd7, %r28, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 33 100
st.global.f32 [%rd8], %f32;
.loc 2 33 22
add.s32 %r10, %r5, %r9;
.loc 2 33 1
setp.lt.s32 %p8, %r10, %r12;
mov.u32 %r30, %r10;
@%p8 bra BB30_4;
BB30_8:
.loc 2 33 22
add.s32 %r29, %r4, %r29;
.loc 2 33 1
setp.lt.s32 %p9, %r29, %r13;
@%p9 bra BB30_2;
BB30_9:
.loc 2 33 2
ret;
}
.visible .entry map_nearbyint_float(
.param .u32 map_nearbyint_float_param_0,
.param .u32 map_nearbyint_float_param_1,
.param .u64 map_nearbyint_float_param_2,
.param .u32 map_nearbyint_float_param_3,
.param .u64 map_nearbyint_float_param_4,
.param .u32 map_nearbyint_float_param_5
)
{
.reg .pred %p<5>;
.reg .f32 %f<3>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map_nearbyint_float_param_0];
ld.param.u32 %r13, [map_nearbyint_float_param_1];
ld.param.u64 %rd3, [map_nearbyint_float_param_2];
ld.param.u32 %r14, [map_nearbyint_float_param_3];
ld.param.u64 %rd4, [map_nearbyint_float_param_4];
ld.param.u32 %r15, [map_nearbyint_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 34 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 34 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB31_6;
.loc 2 34 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 34 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 34 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB31_2:
.loc 2 34 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB31_5;
.loc 2 34 1
mul.lo.s32 %r7, %r25, %r15;
.loc 2 34 92
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB31_4:
.loc 2 34 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 34 1
ld.global.f32 %f1, [%rd6];
.loc 3 8292 10
cvt.rni.f32.f32 %f2, %f1;
.loc 2 34 92
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 34 92
st.global.f32 [%rd8], %f2;
.loc 2 34 22
add.s32 %r10, %r5, %r9;
.loc 2 34 1
setp.lt.s32 %p3, %r10, %r12;
mov.u32 %r26, %r10;
@%p3 bra BB31_4;
BB31_5:
.loc 2 34 22
add.s32 %r25, %r4, %r25;
.loc 2 34 1
setp.lt.s32 %p4, %r25, %r13;
@%p4 bra BB31_2;
BB31_6:
.loc 2 34 2
ret;
}
.visible .entry map_normcdf_float(
.param .u32 map_normcdf_float_param_0,
.param .u32 map_normcdf_float_param_1,
.param .u64 map_normcdf_float_param_2,
.param .u32 map_normcdf_float_param_3,
.param .u64 map_normcdf_float_param_4,
.param .u32 map_normcdf_float_param_5
)
{
.reg .pred %p<9>;
.reg .f32 %f<81>;
.reg .s32 %r<32>;
.reg .s64 %rd<9>;
ld.param.u32 %r10, [map_normcdf_float_param_0];
ld.param.u32 %r11, [map_normcdf_float_param_1];
ld.param.u64 %rd1, [map_normcdf_float_param_2];
ld.param.u32 %r12, [map_normcdf_float_param_3];
ld.param.u64 %rd2, [map_normcdf_float_param_4];
ld.param.u32 %r13, [map_normcdf_float_param_5];
.loc 2 35 1
mov.u32 %r14, %tid.x;
mov.u32 %r15, %ntid.x;
mov.u32 %r16, %ctaid.x;
mad.lo.s32 %r30, %r15, %r16, %r14;
.loc 2 35 1
setp.ge.s32 %p1, %r30, %r11;
@%p1 bra BB32_8;
.loc 2 35 1
mov.u32 %r17, %tid.y;
mov.u32 %r18, %ntid.y;
mov.u32 %r19, %ctaid.y;
mad.lo.s32 %r2, %r18, %r19, %r17;
.loc 2 35 22
mov.u32 %r20, %nctaid.y;
mul.lo.s32 %r3, %r20, %r18;
cvta.to.global.u64 %rd3, %rd2;
cvta.to.global.u64 %rd6, %rd1;
BB32_2:
.loc 2 35 1
setp.ge.s32 %p2, %r2, %r10;
@%p2 bra BB32_7;
mov.u32 %r31, %r2;
BB32_4:
.loc 2 35 1
mov.u32 %r7, %r31;
mul.lo.s32 %r28, %r30, %r13;
add.s32 %r21, %r7, %r28;
mul.wide.s32 %rd4, %r21, 4;
add.s64 %rd5, %rd3, %rd4;
.loc 2 35 1
ld.global.f32 %f13, [%rd5];
.loc 3 8608 10
abs.f32 %f14, %f13;
setp.gt.f32 %p3, %f14, 0f41680000;
mov.b32 %r22, %f13;
and.b32 %r23, %r22, -2147483648;
or.b32 %r24, %r23, 1097334784;
mov.b32 %f15, %r24;
selp.f32 %f16, %f15, %f13, %p3;
mov.f32 %f17, 0fBF3504F3;
.loc 3 8608 10
mul.rn.f32 %f1, %f16, %f17;
neg.f32 %f18, %f1;
fma.rn.f32 %f19, %f16, %f17, %f18;
mov.f32 %f20, 0fB24FE77A;
.loc 3 8608 10
fma.rn.f32 %f2, %f16, %f20, %f19;
add.rn.f32 %f3, %f1, %f2;
abs.f32 %f21, %f3;
add.f32 %f22, %f21, 0fC0800000;
mov.f32 %f23, 0fC0800000;
.loc 3 8608 10
add.f32 %f8, %f21, 0f40800000;
// inline asm
rcp.approx.ftz.f32 %f7,%f8;
// inline asm
mul.rn.f32 %f24, %f22, %f7;
add.f32 %f25, %f24, 0f3F800000;
mov.f32 %f26, 0f3F800000;
.loc 3 8608 10
fma.rn.f32 %f27, %f23, %f25, %f21;
neg.f32 %f28, %f24;
fma.rn.f32 %f29, %f28, %f21, %f27;
fma.rn.f32 %f30, %f7, %f29, %f24;
mov.f32 %f31, 0f3BE6E05B;
mov.f32 %f32, 0f3A69A091;
.loc 3 8608 10
fma.rn.f32 %f33, %f32, %f30, %f31;
mov.f32 %f34, 0fBC81FB4B;
.loc 3 8608 10
fma.rn.f32 %f35, %f33, %f30, %f34;
mov.f32 %f36, 0f3D15373B;
.loc 3 8608 10
fma.rn.f32 %f37, %f35, %f30, %f36;
mov.f32 %f38, 0fBD887C5A;
.loc 3 8608 10
fma.rn.f32 %f39, %f37, %f30, %f38;
mov.f32 %f40, 0f3DC021D5;
.loc 3 8608 10
fma.rn.f32 %f41, %f39, %f30, %f40;
mov.f32 %f42, 0fBDCED424;
.loc 3 8608 10
fma.rn.f32 %f43, %f41, %f30, %f42;
mov.f32 %f44, 0f3D8B74DE;
.loc 3 8608 10
fma.rn.f32 %f45, %f43, %f30, %f44;
mov.f32 %f46, 0f3C7BF170;
.loc 3 8608 10
fma.rn.f32 %f47, %f45, %f30, %f46;
mov.f32 %f48, 0fBE0EF8D4;
.loc 3 8608 10
fma.rn.f32 %f49, %f47, %f30, %f48;
mov.f32 %f50, 0f3F9DD2C9;
.loc 3 8608 10
fma.rn.f32 %f51, %f49, %f30, %f50;
mov.f32 %f52, 0f40000000;
.loc 3 8608 10
fma.rn.f32 %f10, %f52, %f21, %f26;
// inline asm
rcp.approx.ftz.f32 %f9,%f10;
// inline asm
mul.rn.f32 %f53, %f51, %f9;
mul.f32 %f54, %f53, 0fC0000000;
fma.rn.f32 %f55, %f21, %f54, %f51;
sub.f32 %f56, %f55, %f53;
fma.rn.f32 %f57, %f56, %f9, %f53;
neg.f32 %f58, %f21;
mul.f32 %f59, %f21, %f58;
mul.f32 %f60, %f59, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f61, %f60;
mov.f32 %f62, 0fBF317200;
.loc 3 8608 10
fma.rn.f32 %f63, %f61, %f62, %f59;
mov.f32 %f64, 0fB5BFBE8E;
.loc 3 8608 10
fma.rn.f32 %f65, %f61, %f64, %f63;
mul.f32 %f12, %f65, 0f3FB8AA3B;
// inline asm
ex2.approx.ftz.f32 %f11,%f12;
// inline asm
add.f32 %f66, %f61, 0f00000000;
ex2.approx.f32 %f67, %f66;
mul.f32 %f68, %f11, %f67;
neg.f32 %f69, %f59;
fma.rn.f32 %f70, %f58, %f21, %f69;
fma.rn.f32 %f71, %f68, %f70, %f68;
mul.f32 %f72, %f57, %f71;
setp.gt.f32 %p4, %f21, 0f4120E148;
selp.f32 %f73, 0f00000000, %f72, %p4;
setp.lt.f32 %p5, %f3, 0f00000000;
sub.f32 %f74, %f52, %f73;
selp.f32 %f80, %f74, %f73, %p5;
setp.geu.f32 %p6, %f16, 0fBF800000;
@%p6 bra BB32_6;
sub.f32 %f75, %f1, %f3;
add.rn.f32 %f76, %f75, %f2;
mul.f32 %f77, %f3, 0fC0000000;
mul.f32 %f78, %f77, %f80;
fma.rn.f32 %f80, %f78, %f76, %f80;
BB32_6:
.loc 2 35 92
mul.lo.s32 %r29, %r30, %r12;
add.s32 %r25, %r7, %r29;
mul.wide.s32 %rd7, %r25, 4;
add.s64 %rd8, %rd6, %rd7;
.loc 3 8608 10
mul.f32 %f79, %f80, 0f3F000000;
.loc 2 35 92
st.global.f32 [%rd8], %f79;
.loc 2 35 22
add.s32 %r8, %r3, %r7;
.loc 2 35 1
setp.lt.s32 %p7, %r8, %r10;
mov.u32 %r31, %r8;
@%p7 bra BB32_4;
BB32_7:
.loc 2 35 22
mov.u32 %r26, %nctaid.x;
mad.lo.s32 %r30, %r26, %r15, %r30;
.loc 2 35 1
setp.lt.s32 %p8, %r30, %r11;
@%p8 bra BB32_2;
BB32_8:
.loc 2 35 2
ret;
}
.visible .entry map_normcdfinv_float(
.param .u32 map_normcdfinv_float_param_0,
.param .u32 map_normcdfinv_float_param_1,
.param .u64 map_normcdfinv_float_param_2,
.param .u32 map_normcdfinv_float_param_3,
.param .u64 map_normcdfinv_float_param_4,
.param .u32 map_normcdfinv_float_param_5
)
{
.reg .pred %p<9>;
.reg .f32 %f<58>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r10, [map_normcdfinv_float_param_0];
ld.param.u32 %r11, [map_normcdfinv_float_param_1];
ld.param.u64 %rd2, [map_normcdfinv_float_param_2];
ld.param.u32 %r12, [map_normcdfinv_float_param_3];
ld.param.u64 %rd3, [map_normcdfinv_float_param_4];
ld.param.u32 %r13, [map_normcdfinv_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
.loc 2 36 1
mov.u32 %r14, %ntid.x;
mov.u32 %r15, %ctaid.x;
mov.u32 %r16, %tid.x;
mad.lo.s32 %r25, %r14, %r15, %r16;
.loc 2 36 1
setp.ge.s32 %p1, %r25, %r11;
@%p1 bra BB33_9;
.loc 2 36 1
mov.u32 %r17, %tid.y;
mov.u32 %r18, %ntid.y;
mov.u32 %r19, %ctaid.y;
mad.lo.s32 %r2, %r18, %r19, %r17;
.loc 2 36 22
mov.u32 %r20, %nctaid.y;
mul.lo.s32 %r3, %r20, %r18;
cvta.to.global.u64 %rd6, %rd2;
BB33_2:
.loc 2 36 1
setp.ge.s32 %p2, %r2, %r10;
@%p2 bra BB33_8;
.loc 2 36 1
mul.lo.s32 %r5, %r25, %r13;
.loc 2 36 92
mul.lo.s32 %r6, %r25, %r12;
mov.u32 %r26, %r2;
BB33_4:
.loc 2 36 1
mov.u32 %r7, %r26;
add.s32 %r21, %r7, %r5;
mul.wide.s32 %rd4, %r21, 4;
add.s64 %rd5, %rd1, %rd4;
.loc 2 36 1
ld.global.f32 %f7, [%rd5];
.loc 3 8599 10
add.f32 %f1, %f7, %f7;
neg.f32 %f2, %f1;
mov.f32 %f8, 0f40000000;
.loc 3 8599 10
add.rn.f32 %f3, %f8, %f2;
setp.le.f32 %p3, %f1, 0f3FFF9097;
setp.ge.f32 %p4, %f1, 0f3B5ED289;
and.pred %p5, %p4, %p3;
@%p5 bra BB33_6;
setp.gt.f32 %p6, %f1, 0f3F800000;
selp.f32 %f13, %f3, %f1, %p6;
lg2.approx.f32 %f14, %f13;
neg.f32 %f10, %f14;
// inline asm
rsqrt.approx.ftz.f32 %f9,%f10;
// inline asm
mov.f32 %f15, 0f42FEF829;
mov.f32 %f16, 0fC27C73F1;
.loc 3 8599 10
fma.rn.f32 %f17, %f16, %f9, %f15;
mov.f32 %f18, 0fC2E4361C;
.loc 3 8599 10
fma.rn.f32 %f19, %f17, %f9, %f18;
mov.f32 %f20, 0f42714D9B;
.loc 3 8599 10
fma.rn.f32 %f21, %f19, %f9, %f20;
mov.f32 %f22, 0fC1AE51B3;
.loc 3 8599 10
fma.rn.f32 %f23, %f21, %f9, %f22;
mov.f32 %f24, 0f40CEF504;
.loc 3 8599 10
fma.rn.f32 %f25, %f23, %f9, %f24;
mov.f32 %f26, 0fBFEA9E05;
.loc 3 8599 10
fma.rn.f32 %f27, %f25, %f9, %f26;
mov.f32 %f28, 0fBCF871F4;
.loc 3 8599 10
fma.rn.f32 %f29, %f27, %f9, %f28;
mov.f32 %f30, 0f3F553775;
.loc 3 8599 10
fma.rn.f32 %f31, %f29, %f9, %f30;
// inline asm
rcp.approx.ftz.f32 %f11,%f9;
// inline asm
mul.rn.f32 %f32, %f31, %f11;
neg.f32 %f33, %f32;
selp.f32 %f57, %f33, %f32, %p6;
bra.uni BB33_7;
BB33_6:
.loc 3 8599 10
mul.rn.f32 %f35, %f3, %f1;
// inline asm
lg2.approx.ftz.f32 %f34,%f35;
// inline asm
neg.f32 %f36, %f34;
mov.f32 %f37, 0f3221F645;
mov.f32 %f38, 0fAF8A6370;
.loc 3 8599 10
fma.rn.f32 %f39, %f38, %f36, %f37;
mov.f32 %f40, 0fB4016FDA;
.loc 3 8599 10
fma.rn.f32 %f41, %f39, %f36, %f40;
mov.f32 %f42, 0f3468F846;
.loc 3 8599 10
fma.rn.f32 %f43, %f41, %f36, %f42;
mov.f32 %f44, 0f370742AA;
.loc 3 8599 10
fma.rn.f32 %f45, %f43, %f36, %f44;
mov.f32 %f46, 0fB804DB4D;
.loc 3 8599 10
fma.rn.f32 %f47, %f45, %f36, %f46;
mov.f32 %f48, 0fBA4AFEA1;
.loc 3 8599 10
fma.rn.f32 %f49, %f47, %f36, %f48;
mov.f32 %f50, 0f3BB5C027;
.loc 3 8599 10
fma.rn.f32 %f51, %f49, %f36, %f50;
mov.f32 %f52, 0f3E24AE0F;
.loc 3 8599 10
fma.rn.f32 %f53, %f51, %f36, %f52;
mov.f32 %f54, 0f3F62DFC4;
.loc 3 8599 10
fma.rn.f32 %f55, %f53, %f36, %f54;
fma.rn.f32 %f57, %f55, %f2, %f55;
BB33_7:
.loc 2 36 92
add.s32 %r22, %r7, %r6;
mul.wide.s32 %rd7, %r22, 4;
add.s64 %rd8, %rd6, %rd7;
.loc 3 8599 10
mul.f32 %f56, %f57, 0fBFB504F3;
.loc 2 36 92
st.global.f32 [%rd8], %f56;
.loc 2 36 22
add.s32 %r8, %r3, %r7;
.loc 2 36 1
setp.lt.s32 %p7, %r8, %r10;
mov.u32 %r26, %r8;
@%p7 bra BB33_4;
BB33_8:
.loc 2 36 22
mov.u32 %r23, %nctaid.x;
mad.lo.s32 %r25, %r23, %r14, %r25;
.loc 2 36 1
setp.lt.s32 %p8, %r25, %r11;
@%p8 bra BB33_2;
BB33_9:
.loc 2 36 2
ret;
}
.visible .entry map_rcbrt_float(
.param .u32 map_rcbrt_float_param_0,
.param .u32 map_rcbrt_float_param_1,
.param .u64 map_rcbrt_float_param_2,
.param .u32 map_rcbrt_float_param_3,
.param .u64 map_rcbrt_float_param_4,
.param .u32 map_rcbrt_float_param_5
)
{
.reg .pred %p<7>;
.reg .f32 %f<21>;
.reg .s32 %r<28>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map_rcbrt_float_param_0];
ld.param.u32 %r13, [map_rcbrt_float_param_1];
ld.param.u64 %rd3, [map_rcbrt_float_param_2];
ld.param.u32 %r14, [map_rcbrt_float_param_3];
ld.param.u64 %rd4, [map_rcbrt_float_param_4];
ld.param.u32 %r15, [map_rcbrt_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 37 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r26, %r1, %r16, %r17;
.loc 2 37 1
setp.ge.s32 %p1, %r26, %r13;
@%p1 bra BB34_8;
.loc 2 37 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 37 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 37 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB34_2:
.loc 2 37 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB34_7;
.loc 2 37 1
mul.lo.s32 %r7, %r26, %r15;
.loc 2 37 92
mul.lo.s32 %r8, %r26, %r14;
mov.u32 %r27, %r3;
BB34_4:
.loc 2 37 1
mov.u32 %r9, %r27;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 37 1
ld.global.f32 %f1, [%rd6];
.loc 3 8522 10
abs.f32 %f7, %f1;
lg2.approx.f32 %f8, %f7;
mul.f32 %f6, %f8, 0fBEAAAAAB;
// inline asm
ex2.approx.ftz.f32 %f5,%f6;
// inline asm
mul.f32 %f9, %f5, %f5;
neg.f32 %f10, %f7;
mul.f32 %f11, %f5, %f10;
mov.f32 %f12, 0f3F800000;
.loc 3 8522 10
fma.rn.f32 %f13, %f9, %f11, %f12;
mul.f32 %f14, %f5, 0f3EAAAAAB;
fma.rn.f32 %f15, %f13, %f14, %f5;
mov.b32 %r24, %f1;
setp.lt.s32 %p3, %r24, 0;
neg.f32 %f16, %f15;
selp.f32 %f20, %f16, %f15, %p3;
add.f32 %f17, %f1, %f1;
setp.neu.f32 %p4, %f17, %f1;
@%p4 bra BB34_6;
// inline asm
rcp.approx.ftz.f32 %f18,%f1;
// inline asm
mov.f32 %f20, %f18;
BB34_6:
.loc 2 37 92
add.s32 %r25, %r9, %r8;
mul.wide.s32 %rd7, %r25, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 37 92
st.global.f32 [%rd8], %f20;
.loc 2 37 22
add.s32 %r10, %r5, %r9;
.loc 2 37 1
setp.lt.s32 %p5, %r10, %r12;
mov.u32 %r27, %r10;
@%p5 bra BB34_4;
BB34_7:
.loc 2 37 22
add.s32 %r26, %r4, %r26;
.loc 2 37 1
setp.lt.s32 %p6, %r26, %r13;
@%p6 bra BB34_2;
BB34_8:
.loc 2 37 2
ret;
}
.visible .entry map_rint_float(
.param .u32 map_rint_float_param_0,
.param .u32 map_rint_float_param_1,
.param .u64 map_rint_float_param_2,
.param .u32 map_rint_float_param_3,
.param .u64 map_rint_float_param_4,
.param .u32 map_rint_float_param_5
)
{
.reg .pred %p<5>;
.reg .f32 %f<3>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map_rint_float_param_0];
ld.param.u32 %r13, [map_rint_float_param_1];
ld.param.u64 %rd3, [map_rint_float_param_2];
ld.param.u32 %r14, [map_rint_float_param_3];
ld.param.u64 %rd4, [map_rint_float_param_4];
ld.param.u32 %r15, [map_rint_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 38 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 38 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB35_6;
.loc 2 38 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 38 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 38 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB35_2:
.loc 2 38 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB35_5;
.loc 2 38 1
mul.lo.s32 %r7, %r25, %r15;
.loc 2 38 92
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB35_4:
.loc 2 38 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 38 1
ld.global.f32 %f1, [%rd6];
.loc 3 8273 10
cvt.rni.f32.f32 %f2, %f1;
.loc 2 38 92
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 38 92
st.global.f32 [%rd8], %f2;
.loc 2 38 22
add.s32 %r10, %r5, %r9;
.loc 2 38 1
setp.lt.s32 %p3, %r10, %r12;
mov.u32 %r26, %r10;
@%p3 bra BB35_4;
BB35_5:
.loc 2 38 22
add.s32 %r25, %r4, %r25;
.loc 2 38 1
setp.lt.s32 %p4, %r25, %r13;
@%p4 bra BB35_2;
BB35_6:
.loc 2 38 2
ret;
}
.visible .entry map_round_float(
.param .u32 map_round_float_param_0,
.param .u32 map_round_float_param_1,
.param .u64 map_round_float_param_2,
.param .u32 map_round_float_param_3,
.param .u64 map_round_float_param_4,
.param .u32 map_round_float_param_5
)
{
.reg .pred %p<7>;
.reg .f32 %f<10>;
.reg .s32 %r<30>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map_round_float_param_0];
ld.param.u32 %r13, [map_round_float_param_1];
ld.param.u64 %rd3, [map_round_float_param_2];
ld.param.u32 %r14, [map_round_float_param_3];
ld.param.u64 %rd4, [map_round_float_param_4];
ld.param.u32 %r15, [map_round_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 39 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r28, %r1, %r16, %r17;
.loc 2 39 1
setp.ge.s32 %p1, %r28, %r13;
@%p1 bra BB36_8;
.loc 2 39 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 39 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 39 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB36_2:
.loc 2 39 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB36_7;
.loc 2 39 1
mul.lo.s32 %r7, %r28, %r15;
.loc 2 39 92
mul.lo.s32 %r8, %r28, %r14;
mov.u32 %r29, %r3;
BB36_4:
.loc 2 39 1
mov.u32 %r9, %r29;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 39 1
ld.global.f32 %f1, [%rd6];
.loc 3 8699 10
abs.f32 %f5, %f1;
mov.b32 %r24, %f1;
and.b32 %r25, %r24, -2147483648;
or.b32 %r26, %r25, 1056964608;
mov.b32 %f6, %r26;
add.f32 %f7, %f1, %f6;
cvt.rzi.f32.f32 %f8, %f7;
setp.gt.f32 %p3, %f5, 0f4B000000;
selp.f32 %f9, %f1, %f8, %p3;
setp.geu.f32 %p4, %f5, 0f3F000000;
@%p4 bra BB36_6;
cvt.rzi.f32.f32 %f9, %f1;
BB36_6:
.loc 2 39 92
add.s32 %r27, %r9, %r8;
mul.wide.s32 %rd7, %r27, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 39 92
st.global.f32 [%rd8], %f9;
.loc 2 39 22
add.s32 %r10, %r5, %r9;
.loc 2 39 1
setp.lt.s32 %p5, %r10, %r12;
mov.u32 %r29, %r10;
@%p5 bra BB36_4;
BB36_7:
.loc 2 39 22
add.s32 %r28, %r4, %r28;
.loc 2 39 1
setp.lt.s32 %p6, %r28, %r13;
@%p6 bra BB36_2;
BB36_8:
.loc 2 39 2
ret;
}
.visible .entry map_rsqrt_float(
.param .u32 map_rsqrt_float_param_0,
.param .u32 map_rsqrt_float_param_1,
.param .u64 map_rsqrt_float_param_2,
.param .u32 map_rsqrt_float_param_3,
.param .u64 map_rsqrt_float_param_4,
.param .u32 map_rsqrt_float_param_5
)
{
.reg .pred %p<5>;
.reg .f32 %f<3>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map_rsqrt_float_param_0];
ld.param.u32 %r13, [map_rsqrt_float_param_1];
ld.param.u64 %rd3, [map_rsqrt_float_param_2];
ld.param.u32 %r14, [map_rsqrt_float_param_3];
ld.param.u64 %rd4, [map_rsqrt_float_param_4];
ld.param.u32 %r15, [map_rsqrt_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 40 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 40 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB37_6;
.loc 2 40 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 40 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 40 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB37_2:
.loc 2 40 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB37_5;
.loc 2 40 1
mul.lo.s32 %r7, %r25, %r15;
.loc 2 40 92
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB37_4:
.loc 2 40 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 40 1
ld.global.f32 %f1, [%rd6];
.loc 4 2775 10
rsqrt.approx.f32 %f2, %f1;
.loc 2 40 92
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 40 92
st.global.f32 [%rd8], %f2;
.loc 2 40 22
add.s32 %r10, %r5, %r9;
.loc 2 40 1
setp.lt.s32 %p3, %r10, %r12;
mov.u32 %r26, %r10;
@%p3 bra BB37_4;
BB37_5:
.loc 2 40 22
add.s32 %r25, %r4, %r25;
.loc 2 40 1
setp.lt.s32 %p4, %r25, %r13;
@%p4 bra BB37_2;
BB37_6:
.loc 2 40 2
ret;
}
.visible .entry map_sin_float(
.param .u32 map_sin_float_param_0,
.param .u32 map_sin_float_param_1,
.param .u64 map_sin_float_param_2,
.param .u32 map_sin_float_param_3,
.param .u64 map_sin_float_param_4,
.param .u32 map_sin_float_param_5
)
{
.local .align 4 .b8 __local_depot38[28];
.reg .b64 %SP;
.reg .b64 %SPL;
.reg .pred %p<18>;
.reg .f32 %f<48>;
.reg .s32 %r<119>;
.reg .s64 %rd<22>;
mov.u64 %SPL, __local_depot38;
cvta.local.u64 %SP, %SPL;
ld.param.u32 %r36, [map_sin_float_param_0];
ld.param.u32 %r37, [map_sin_float_param_1];
ld.param.u64 %rd7, [map_sin_float_param_2];
ld.param.u32 %r38, [map_sin_float_param_3];
ld.param.u64 %rd8, [map_sin_float_param_4];
ld.param.u32 %r39, [map_sin_float_param_5];
.loc 2 41 1
mov.u32 %r40, %ntid.x;
mov.u32 %r41, %ctaid.x;
mov.u32 %r42, %tid.x;
mad.lo.s32 %r109, %r40, %r41, %r42;
.loc 2 41 1
setp.ge.s32 %p1, %r109, %r37;
@%p1 bra BB38_25;
.loc 2 41 1
mov.u32 %r43, %ntid.y;
.loc 2 41 22
mov.u32 %r44, %nctaid.y;
mul.lo.s32 %r2, %r44, %r43;
cvta.to.global.u64 %rd9, %rd8;
cvta.to.global.u64 %rd17, %rd7;
BB38_2:
.loc 2 41 1
mov.u32 %r45, %ctaid.y;
mov.u32 %r47, %tid.y;
mad.lo.s32 %r110, %r43, %r45, %r47;
.loc 2 41 1
setp.ge.s32 %p2, %r110, %r36;
@%p2 bra BB38_24;
BB38_3:
.loc 2 41 1
mad.lo.s32 %r52, %r109, %r39, %r110;
mul.wide.s32 %rd10, %r52, 4;
add.s64 %rd11, %rd9, %rd10;
.loc 2 41 1
ld.global.f32 %f43, [%rd11];
.loc 3 8359 10
abs.f32 %f19, %f43;
setp.neu.f32 %p3, %f19, 0f7F800000;
@%p3 bra BB38_5;
mov.f32 %f20, 0f00000000;
.loc 3 8359 10
mul.rn.f32 %f43, %f43, %f20;
BB38_5:
mul.f32 %f21, %f43, 0f3F22F983;
cvt.rni.s32.f32 %r118, %f21;
cvt.rn.f32.s32 %f22, %r118;
neg.f32 %f23, %f22;
mov.f32 %f24, 0f3FC90FDA;
.loc 3 8359 10
fma.rn.f32 %f25, %f23, %f24, %f43;
mov.f32 %f26, 0f33A22168;
.loc 3 8359 10
fma.rn.f32 %f27, %f23, %f26, %f25;
mov.f32 %f28, 0f27C234C5;
.loc 3 8359 10
fma.rn.f32 %f44, %f23, %f28, %f27;
abs.f32 %f29, %f43;
setp.leu.f32 %p4, %f29, 0f47CE4780;
@%p4 bra BB38_13;
add.u64 %rd13, %SP, 0;
.loc 3 8359 10
mov.b32 %r7, %f43;
shr.u32 %r8, %r7, 23;
and.b32 %r55, %r8, 255;
add.s32 %r56, %r55, -128;
shl.b32 %r57, %r7, 8;
or.b32 %r9, %r57, -2147483648;
shr.u32 %r10, %r56, 5;
cvta.to.local.u64 %rd20, %rd13;
mov.u32 %r112, 0;
mov.u32 %r111, %r112;
mov.u64 %rd21, __cudart_i2opi_f;
BB38_7:
.pragma "nounroll";
.loc 3 8359 10
ld.const.u32 %r60, [%rd21];
// inline asm
{
mad.lo.cc.u32 %r58, %r60, %r9, %r112;
madc.hi.u32 %r59, %r60, %r9, 0;
}
// inline asm
st.local.u32 [%rd20], %r58;
add.s64 %rd21, %rd21, 4;
add.s64 %rd20, %rd20, 4;
.loc 3 8359 10
add.s32 %r111, %r111, 1;
setp.ne.s32 %p5, %r111, 6;
mov.u32 %r112, %r59;
@%p5 bra BB38_7;
and.b32 %r116, %r7, -2147483648;
cvta.to.local.u64 %rd15, %rd13;
.loc 3 8359 10
st.local.u32 [%rd15+24], %r59;
mov.u32 %r63, 6;
.loc 3 8359 10
sub.s32 %r64, %r63, %r10;
mul.wide.s32 %rd16, %r64, 4;
add.s64 %rd6, %rd15, %rd16;
.loc 3 8359 10
ld.local.u32 %r113, [%rd6];
ld.local.u32 %r114, [%rd6+-4];
and.b32 %r18, %r8, 31;
setp.eq.s32 %p6, %r18, 0;
@%p6 bra BB38_10;
mov.u32 %r65, 32;
.loc 3 8359 10
sub.s32 %r66, %r65, %r18;
shr.u32 %r67, %r114, %r66;
shl.b32 %r68, %r113, %r18;
add.s32 %r113, %r67, %r68;
ld.local.u32 %r69, [%rd6+-8];
shr.u32 %r70, %r69, %r66;
shl.b32 %r71, %r114, %r18;
add.s32 %r114, %r70, %r71;
BB38_10:
shr.u32 %r72, %r114, 30;
shl.b32 %r73, %r113, 2;
add.s32 %r115, %r72, %r73;
shl.b32 %r24, %r114, 2;
shr.u32 %r74, %r115, 31;
shr.u32 %r75, %r113, 30;
add.s32 %r76, %r74, %r75;
neg.s32 %r77, %r76;
setp.eq.s32 %p7, %r116, 0;
selp.b32 %r118, %r76, %r77, %p7;
setp.eq.s32 %p8, %r74, 0;
mov.u32 %r117, %r24;
@%p8 bra BB38_12;
not.b32 %r78, %r115;
neg.s32 %r26, %r24;
setp.eq.s32 %p9, %r24, 0;
selp.u32 %r79, 1, 0, %p9;
add.s32 %r115, %r79, %r78;
xor.b32 %r116, %r116, -2147483648;
mov.u32 %r117, %r26;
BB38_12:
.loc 3 8359 10
clz.b32 %r80, %r115;
setp.eq.s32 %p10, %r80, 0;
shl.b32 %r81, %r115, %r80;
mov.u32 %r82, 32;
.loc 3 8359 10
sub.s32 %r83, %r82, %r80;
shr.u32 %r84, %r117, %r83;
add.s32 %r85, %r84, %r81;
selp.b32 %r86, %r115, %r85, %p10;
mul.lo.s32 %r87, %r86, -921707870;
mov.u32 %r88, -921707870;
.loc 3 8359 10
mul.hi.u32 %r89, %r86, %r88;
setp.gt.s32 %p11, %r89, 0;
shl.b32 %r90, %r89, 1;
shr.u32 %r91, %r87, 31;
add.s32 %r92, %r91, %r90;
selp.b32 %r93, %r92, %r89, %p11;
selp.b32 %r94, -1, 0, %p11;
mov.u32 %r95, 126;
.loc 3 8359 10
sub.s32 %r96, %r95, %r80;
add.s32 %r97, %r96, %r94;
shl.b32 %r98, %r97, 23;
add.s32 %r99, %r93, 1;
shr.u32 %r100, %r99, 7;
add.s32 %r101, %r100, 1;
shr.u32 %r102, %r101, 1;
add.s32 %r103, %r102, %r98;
or.b32 %r104, %r103, %r116;
mov.b32 %f44, %r104;
BB38_13:
mul.rn.f32 %f7, %f44, %f44;
and.b32 %r33, %r118, 1;
setp.eq.s32 %p12, %r33, 0;
@%p12 bra BB38_15;
mov.f32 %f30, 0fBAB6061A;
mov.f32 %f31, 0f37CCF5CE;
.loc 3 8359 10
fma.rn.f32 %f45, %f31, %f7, %f30;
bra.uni BB38_16;
BB38_15:
mov.f32 %f32, 0f3C08839E;
mov.f32 %f33, 0fB94CA1F9;
.loc 3 8359 10
fma.rn.f32 %f45, %f33, %f7, %f32;
BB38_16:
@%p12 bra BB38_18;
mov.f32 %f34, 0f3D2AAAA5;
.loc 3 8359 10
fma.rn.f32 %f35, %f45, %f7, %f34;
mov.f32 %f36, 0fBF000000;
.loc 3 8359 10
fma.rn.f32 %f46, %f35, %f7, %f36;
bra.uni BB38_19;
BB38_18:
mov.f32 %f37, 0fBE2AAAA3;
.loc 3 8359 10
fma.rn.f32 %f38, %f45, %f7, %f37;
mov.f32 %f39, 0f00000000;
.loc 3 8359 10
fma.rn.f32 %f46, %f38, %f7, %f39;
BB38_19:
fma.rn.f32 %f47, %f46, %f44, %f44;
@%p12 bra BB38_21;
mov.f32 %f40, 0f3F800000;
.loc 3 8359 10
fma.rn.f32 %f47, %f46, %f7, %f40;
BB38_21:
and.b32 %r105, %r118, 2;
setp.eq.s32 %p15, %r105, 0;
@%p15 bra BB38_23;
mov.f32 %f41, 0f00000000;
mov.f32 %f42, 0fBF800000;
.loc 3 8359 10
fma.rn.f32 %f47, %f47, %f42, %f41;
BB38_23:
.loc 2 41 100
mad.lo.s32 %r106, %r109, %r38, %r110;
mul.wide.s32 %rd18, %r106, 4;
add.s64 %rd19, %rd17, %rd18;
.loc 2 41 100
st.global.f32 [%rd19], %f47;
.loc 2 41 22
add.s32 %r110, %r2, %r110;
.loc 2 41 1
setp.lt.s32 %p16, %r110, %r36;
@%p16 bra BB38_3;
BB38_24:
.loc 2 41 22
mov.u32 %r107, %nctaid.x;
mad.lo.s32 %r109, %r107, %r40, %r109;
.loc 2 41 1
setp.lt.s32 %p17, %r109, %r37;
@%p17 bra BB38_2;
BB38_25:
.loc 2 41 2
ret;
}
.visible .entry map_sinh_float(
.param .u32 map_sinh_float_param_0,
.param .u32 map_sinh_float_param_1,
.param .u64 map_sinh_float_param_2,
.param .u32 map_sinh_float_param_3,
.param .u64 map_sinh_float_param_4,
.param .u32 map_sinh_float_param_5
)
{
.reg .pred %p<7>;
.reg .f32 %f<32>;
.reg .s32 %r<32>;
.reg .s64 %rd<9>;
ld.param.u32 %r10, [map_sinh_float_param_0];
ld.param.u32 %r11, [map_sinh_float_param_1];
ld.param.u64 %rd3, [map_sinh_float_param_2];
ld.param.u32 %r12, [map_sinh_float_param_3];
ld.param.u64 %rd4, [map_sinh_float_param_4];
ld.param.u32 %r13, [map_sinh_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 42 1
mov.u32 %r14, %ntid.x;
mov.u32 %r15, %ctaid.x;
mov.u32 %r16, %tid.x;
mad.lo.s32 %r30, %r14, %r15, %r16;
.loc 2 42 1
setp.ge.s32 %p1, %r30, %r11;
@%p1 bra BB39_9;
.loc 2 42 1
mov.u32 %r17, %tid.y;
mov.u32 %r18, %ntid.y;
mov.u32 %r19, %ctaid.y;
mad.lo.s32 %r2, %r18, %r19, %r17;
.loc 2 42 22
mov.u32 %r20, %nctaid.y;
mul.lo.s32 %r3, %r20, %r18;
BB39_2:
.loc 2 42 1
setp.ge.s32 %p2, %r2, %r10;
@%p2 bra BB39_8;
.loc 2 42 1
mul.lo.s32 %r5, %r30, %r13;
.loc 2 42 100
mul.lo.s32 %r6, %r30, %r12;
mov.u32 %r31, %r2;
BB39_4:
.loc 2 42 1
mov.u32 %r7, %r31;
add.s32 %r21, %r7, %r5;
mul.wide.s32 %rd5, %r21, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 42 1
ld.global.f32 %f1, [%rd6];
.loc 3 8439 10
abs.f32 %f2, %f1;
setp.ltu.f32 %p3, %f2, 0f3F800000;
@%p3 bra BB39_6;
mul.f32 %f8, %f2, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f9, %f8;
mov.f32 %f10, 0fBF317200;
.loc 3 8439 10
fma.rn.f32 %f11, %f9, %f10, %f2;
mov.f32 %f12, 0fB5BFBE8E;
.loc 3 8439 10
fma.rn.f32 %f13, %f9, %f12, %f11;
mul.f32 %f7, %f13, 0f3FB8AA3B;
// inline asm
ex2.approx.ftz.f32 %f6,%f7;
// inline asm
add.f32 %f14, %f9, 0fC0000000;
ex2.approx.f32 %f15, %f14;
mul.f32 %f16, %f6, %f15;
mov.f32 %f17, 0f3E000000;
.loc 3 8439 10
div.approx.f32 %f18, %f17, %f16;
neg.f32 %f19, %f18;
mov.f32 %f20, 0f40000000;
.loc 3 8439 10
fma.rn.f32 %f21, %f20, %f16, %f19;
mov.b32 %r22, %f21;
setp.ltu.f32 %p4, %f2, 0f42B40000;
selp.b32 %r23, %r22, 2139095040, %p4;
mov.b32 %r24, %f1;
and.b32 %r25, %r24, -2147483648;
or.b32 %r26, %r23, %r25;
mov.b32 %f31, %r26;
bra.uni BB39_7;
BB39_6:
.loc 3 8439 10
mul.f32 %f22, %f1, %f1;
mov.f32 %f23, 0f394FFF49;
mov.f32 %f24, 0f363D0ADA;
.loc 3 8439 10
fma.rn.f32 %f25, %f24, %f22, %f23;
mov.f32 %f26, 0f3C08889A;
.loc 3 8439 10
fma.rn.f32 %f27, %f25, %f22, %f26;
mov.f32 %f28, 0f3E2AAAAB;
.loc 3 8439 10
fma.rn.f32 %f29, %f27, %f22, %f28;
mul.f32 %f30, %f29, %f22;
fma.rn.f32 %f31, %f30, %f1, %f1;
BB39_7:
.loc 2 42 100
add.s32 %r27, %r7, %r6;
mul.wide.s32 %rd7, %r27, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 42 100
st.global.f32 [%rd8], %f31;
.loc 2 42 22
add.s32 %r8, %r3, %r7;
.loc 2 42 1
setp.lt.s32 %p5, %r8, %r10;
mov.u32 %r31, %r8;
@%p5 bra BB39_4;
BB39_8:
.loc 2 42 22
mov.u32 %r28, %nctaid.x;
mad.lo.s32 %r30, %r28, %r14, %r30;
.loc 2 42 1
setp.lt.s32 %p6, %r30, %r11;
@%p6 bra BB39_2;
BB39_9:
.loc 2 42 2
ret;
}
.visible .entry map_sinpi_float(
.param .u32 map_sinpi_float_param_0,
.param .u32 map_sinpi_float_param_1,
.param .u64 map_sinpi_float_param_2,
.param .u32 map_sinpi_float_param_3,
.param .u64 map_sinpi_float_param_4,
.param .u32 map_sinpi_float_param_5
)
{
.reg .pred %p<10>;
.reg .f32 %f<42>;
.reg .s32 %r<32>;
.reg .s64 %rd<9>;
ld.param.u32 %r9, [map_sinpi_float_param_0];
ld.param.u32 %r10, [map_sinpi_float_param_1];
ld.param.u64 %rd1, [map_sinpi_float_param_2];
ld.param.u32 %r11, [map_sinpi_float_param_3];
ld.param.u64 %rd2, [map_sinpi_float_param_4];
ld.param.u32 %r12, [map_sinpi_float_param_5];
.loc 2 43 1
mov.u32 %r13, %tid.x;
mov.u32 %r14, %ntid.x;
mov.u32 %r15, %ctaid.x;
mad.lo.s32 %r30, %r14, %r15, %r13;
.loc 2 43 1
setp.ge.s32 %p1, %r30, %r10;
@%p1 bra BB40_17;
cvta.to.global.u64 %rd3, %rd2;
cvta.to.global.u64 %rd6, %rd1;
BB40_2:
.loc 2 43 1
mov.u32 %r16, %ctaid.y;
mov.u32 %r17, %ntid.y;
mov.u32 %r18, %tid.y;
mad.lo.s32 %r31, %r17, %r16, %r18;
.loc 2 43 1
setp.ge.s32 %p2, %r31, %r9;
@%p2 bra BB40_16;
BB40_3:
.loc 2 43 1
mad.lo.s32 %r23, %r30, %r12, %r31;
mul.wide.s32 %rd4, %r23, 4;
add.s64 %rd5, %rd3, %rd4;
.loc 2 43 1
ld.global.f32 %f1, [%rd5];
.loc 3 8383 10
add.f32 %f17, %f1, %f1;
cvt.rni.f32.f32 %f18, %f17;
cvt.rzi.s32.f32 %r5, %f18;
neg.f32 %f19, %f18;
mov.f32 %f20, 0f3F000000;
.loc 3 8383 10
fma.rn.f32 %f21, %f19, %f20, %f1;
mul.f32 %f22, %f21, 0f34222169;
mov.f32 %f23, 0f40490FDA;
.loc 3 8383 10
fma.rn.f32 %f2, %f21, %f23, %f22;
mul.rn.f32 %f3, %f2, %f2;
and.b32 %r6, %r5, 1;
setp.eq.s32 %p3, %r6, 0;
@%p3 bra BB40_5;
mov.f32 %f24, 0fBAB6061A;
mov.f32 %f25, 0f37CCF5CE;
.loc 3 8383 10
fma.rn.f32 %f39, %f25, %f3, %f24;
bra.uni BB40_6;
BB40_5:
mov.f32 %f26, 0f3C08839E;
mov.f32 %f27, 0fB94CA1F9;
.loc 3 8383 10
fma.rn.f32 %f39, %f27, %f3, %f26;
BB40_6:
@%p3 bra BB40_8;
mov.f32 %f28, 0f3D2AAAA5;
.loc 3 8383 10
fma.rn.f32 %f29, %f39, %f3, %f28;
mov.f32 %f30, 0fBF000000;
.loc 3 8383 10
fma.rn.f32 %f40, %f29, %f3, %f30;
bra.uni BB40_9;
BB40_8:
mov.f32 %f31, 0fBE2AAAA3;
.loc 3 8383 10
fma.rn.f32 %f32, %f39, %f3, %f31;
mov.f32 %f33, 0f00000000;
.loc 3 8383 10
fma.rn.f32 %f40, %f32, %f3, %f33;
BB40_9:
fma.rn.f32 %f41, %f40, %f2, %f2;
@%p3 bra BB40_11;
mov.f32 %f34, 0f3F800000;
.loc 3 8383 10
fma.rn.f32 %f41, %f40, %f3, %f34;
BB40_11:
and.b32 %r24, %r5, 2;
setp.eq.s32 %p6, %r24, 0;
@%p6 bra BB40_13;
mov.f32 %f35, 0f00000000;
mov.f32 %f36, 0fBF800000;
.loc 3 8383 10
fma.rn.f32 %f41, %f41, %f36, %f35;
BB40_13:
cvt.rzi.f32.f32 %f37, %f1;
setp.neu.f32 %p7, %f1, %f37;
@%p7 bra BB40_15;
mov.f32 %f38, 0f00000000;
.loc 3 8383 10
mul.rn.f32 %f41, %f1, %f38;
BB40_15:
.loc 2 43 92
mad.lo.s32 %r25, %r30, %r11, %r31;
mul.wide.s32 %rd7, %r25, 4;
add.s64 %rd8, %rd6, %rd7;
.loc 2 43 92
st.global.f32 [%rd8], %f41;
.loc 2 43 22
mov.u32 %r27, %nctaid.y;
mad.lo.s32 %r31, %r27, %r17, %r31;
.loc 2 43 1
setp.lt.s32 %p8, %r31, %r9;
@%p8 bra BB40_3;
BB40_16:
.loc 2 43 22
mov.u32 %r28, %nctaid.x;
mad.lo.s32 %r30, %r28, %r14, %r30;
.loc 2 43 1
setp.lt.s32 %p9, %r30, %r10;
@%p9 bra BB40_2;
BB40_17:
.loc 2 43 2
ret;
}
.visible .entry map_sqrt_float(
.param .u32 map_sqrt_float_param_0,
.param .u32 map_sqrt_float_param_1,
.param .u64 map_sqrt_float_param_2,
.param .u32 map_sqrt_float_param_3,
.param .u64 map_sqrt_float_param_4,
.param .u32 map_sqrt_float_param_5
)
{
.reg .pred %p<5>;
.reg .f32 %f<3>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map_sqrt_float_param_0];
ld.param.u32 %r13, [map_sqrt_float_param_1];
ld.param.u64 %rd3, [map_sqrt_float_param_2];
ld.param.u32 %r14, [map_sqrt_float_param_3];
ld.param.u64 %rd4, [map_sqrt_float_param_4];
ld.param.u32 %r15, [map_sqrt_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 44 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 44 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB41_6;
.loc 2 44 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 44 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 44 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB41_2:
.loc 2 44 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB41_5;
.loc 2 44 1
mul.lo.s32 %r7, %r25, %r15;
.loc 2 44 100
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB41_4:
.loc 2 44 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 44 1
ld.global.f32 %f1, [%rd6];
.loc 4 3055 10
sqrt.rn.f32 %f2, %f1;
.loc 2 44 100
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 44 100
st.global.f32 [%rd8], %f2;
.loc 2 44 22
add.s32 %r10, %r5, %r9;
.loc 2 44 1
setp.lt.s32 %p3, %r10, %r12;
mov.u32 %r26, %r10;
@%p3 bra BB41_4;
BB41_5:
.loc 2 44 22
add.s32 %r25, %r4, %r25;
.loc 2 44 1
setp.lt.s32 %p4, %r25, %r13;
@%p4 bra BB41_2;
BB41_6:
.loc 2 44 2
ret;
}
.visible .entry map_tan_float(
.param .u32 map_tan_float_param_0,
.param .u32 map_tan_float_param_1,
.param .u64 map_tan_float_param_2,
.param .u32 map_tan_float_param_3,
.param .u64 map_tan_float_param_4,
.param .u32 map_tan_float_param_5
)
{
.local .align 4 .b8 __local_depot42[28];
.reg .b64 %SP;
.reg .b64 %SPL;
.reg .pred %p<15>;
.reg .f32 %f<33>;
.reg .s32 %r<119>;
.reg .s64 %rd<22>;
mov.u64 %SPL, __local_depot42;
cvta.local.u64 %SP, %SPL;
ld.param.u32 %r36, [map_tan_float_param_0];
ld.param.u32 %r37, [map_tan_float_param_1];
ld.param.u64 %rd7, [map_tan_float_param_2];
ld.param.u32 %r38, [map_tan_float_param_3];
ld.param.u64 %rd8, [map_tan_float_param_4];
ld.param.u32 %r39, [map_tan_float_param_5];
.loc 2 45 1
mov.u32 %r40, %ntid.x;
mov.u32 %r41, %ctaid.x;
mov.u32 %r42, %tid.x;
mad.lo.s32 %r109, %r40, %r41, %r42;
.loc 2 45 1
setp.ge.s32 %p1, %r109, %r37;
@%p1 bra BB42_18;
.loc 2 45 1
mov.u32 %r43, %ntid.y;
.loc 2 45 22
mov.u32 %r44, %nctaid.y;
mul.lo.s32 %r2, %r44, %r43;
cvta.to.global.u64 %rd9, %rd8;
cvta.to.global.u64 %rd17, %rd7;
BB42_2:
.loc 2 45 1
mov.u32 %r45, %ctaid.y;
mov.u32 %r47, %tid.y;
mad.lo.s32 %r110, %r43, %r45, %r47;
.loc 2 45 1
setp.ge.s32 %p2, %r110, %r36;
@%p2 bra BB42_17;
.loc 2 45 100
mul.lo.s32 %r4, %r109, %r38;
BB42_4:
.loc 2 45 1
mad.lo.s32 %r52, %r109, %r39, %r110;
mul.wide.s32 %rd10, %r52, 4;
add.s64 %rd11, %rd9, %rd10;
.loc 2 45 1
ld.global.f32 %f30, [%rd11];
.loc 3 8401 10
abs.f32 %f10, %f30;
setp.neu.f32 %p3, %f10, 0f7F800000;
@%p3 bra BB42_6;
mov.f32 %f11, 0f00000000;
.loc 3 8401 10
mul.rn.f32 %f30, %f30, %f11;
BB42_6:
mul.f32 %f12, %f30, 0f3F22F983;
cvt.rni.s32.f32 %r118, %f12;
cvt.rn.f32.s32 %f13, %r118;
neg.f32 %f14, %f13;
mov.f32 %f15, 0f3FC90FDA;
.loc 3 8401 10
fma.rn.f32 %f16, %f14, %f15, %f30;
mov.f32 %f17, 0f33A22168;
.loc 3 8401 10
fma.rn.f32 %f18, %f14, %f17, %f16;
mov.f32 %f19, 0f27C234C5;
.loc 3 8401 10
fma.rn.f32 %f31, %f14, %f19, %f18;
abs.f32 %f20, %f30;
setp.leu.f32 %p4, %f20, 0f47CE4780;
@%p4 bra BB42_14;
add.u64 %rd13, %SP, 0;
.loc 3 8401 10
mov.b32 %r8, %f30;
shr.u32 %r9, %r8, 23;
and.b32 %r55, %r9, 255;
add.s32 %r56, %r55, -128;
shl.b32 %r57, %r8, 8;
or.b32 %r10, %r57, -2147483648;
shr.u32 %r11, %r56, 5;
cvta.to.local.u64 %rd20, %rd13;
mov.u32 %r112, 0;
mov.u32 %r111, %r112;
mov.u64 %rd21, __cudart_i2opi_f;
BB42_8:
.pragma "nounroll";
.loc 3 8401 10
ld.const.u32 %r60, [%rd21];
// inline asm
{
mad.lo.cc.u32 %r58, %r60, %r10, %r112;
madc.hi.u32 %r59, %r60, %r10, 0;
}
// inline asm
st.local.u32 [%rd20], %r58;
add.s64 %rd21, %rd21, 4;
add.s64 %rd20, %rd20, 4;
.loc 3 8401 10
add.s32 %r111, %r111, 1;
setp.ne.s32 %p5, %r111, 6;
mov.u32 %r112, %r59;
@%p5 bra BB42_8;
and.b32 %r116, %r8, -2147483648;
cvta.to.local.u64 %rd15, %rd13;
.loc 3 8401 10
st.local.u32 [%rd15+24], %r59;
mov.u32 %r63, 6;
.loc 3 8401 10
sub.s32 %r64, %r63, %r11;
mul.wide.s32 %rd16, %r64, 4;
add.s64 %rd6, %rd15, %rd16;
.loc 3 8401 10
ld.local.u32 %r113, [%rd6];
ld.local.u32 %r114, [%rd6+-4];
and.b32 %r19, %r9, 31;
setp.eq.s32 %p6, %r19, 0;
@%p6 bra BB42_11;
mov.u32 %r65, 32;
.loc 3 8401 10
sub.s32 %r66, %r65, %r19;
shr.u32 %r67, %r114, %r66;
shl.b32 %r68, %r113, %r19;
add.s32 %r113, %r67, %r68;
ld.local.u32 %r69, [%rd6+-8];
shr.u32 %r70, %r69, %r66;
shl.b32 %r71, %r114, %r19;
add.s32 %r114, %r70, %r71;
BB42_11:
shr.u32 %r72, %r114, 30;
shl.b32 %r73, %r113, 2;
add.s32 %r115, %r72, %r73;
shl.b32 %r25, %r114, 2;
shr.u32 %r74, %r115, 31;
shr.u32 %r75, %r113, 30;
add.s32 %r76, %r74, %r75;
neg.s32 %r77, %r76;
setp.eq.s32 %p7, %r116, 0;
selp.b32 %r118, %r76, %r77, %p7;
setp.eq.s32 %p8, %r74, 0;
mov.u32 %r117, %r25;
@%p8 bra BB42_13;
not.b32 %r78, %r115;
neg.s32 %r27, %r25;
setp.eq.s32 %p9, %r25, 0;
selp.u32 %r79, 1, 0, %p9;
add.s32 %r115, %r79, %r78;
xor.b32 %r116, %r116, -2147483648;
mov.u32 %r117, %r27;
BB42_13:
.loc 3 8401 10
clz.b32 %r80, %r115;
setp.eq.s32 %p10, %r80, 0;
shl.b32 %r81, %r115, %r80;
mov.u32 %r82, 32;
.loc 3 8401 10
sub.s32 %r83, %r82, %r80;
shr.u32 %r84, %r117, %r83;
add.s32 %r85, %r84, %r81;
selp.b32 %r86, %r115, %r85, %p10;
mul.lo.s32 %r87, %r86, -921707870;
mov.u32 %r88, -921707870;
.loc 3 8401 10
mul.hi.u32 %r89, %r86, %r88;
setp.gt.s32 %p11, %r89, 0;
shl.b32 %r90, %r89, 1;
shr.u32 %r91, %r87, 31;
add.s32 %r92, %r91, %r90;
selp.b32 %r93, %r92, %r89, %p11;
selp.b32 %r94, -1, 0, %p11;
mov.u32 %r95, 126;
.loc 3 8401 10
sub.s32 %r96, %r95, %r80;
add.s32 %r97, %r96, %r94;
shl.b32 %r98, %r97, 23;
add.s32 %r99, %r93, 1;
shr.u32 %r100, %r99, 7;
add.s32 %r101, %r100, 1;
shr.u32 %r102, %r101, 1;
add.s32 %r103, %r102, %r98;
or.b32 %r104, %r103, %r116;
mov.b32 %f31, %r104;
BB42_14:
mul.f32 %f21, %f31, %f31;
mov.f32 %f22, 0fBF52B7F4;
mov.f32 %f23, 0f3B86D46D;
.loc 3 8401 10
fma.rn.f32 %f24, %f23, %f21, %f22;
add.f32 %f25, %f21, 0fC01E09D0;
rcp.rn.f32 %f26, %f25;
mul.f32 %f27, %f24, %f26;
mul.f32 %f28, %f27, %f21;
fma.rn.f32 %f32, %f28, %f31, %f31;
and.b32 %r105, %r118, 1;
setp.eq.b32 %p12, %r105, 1;
@!%p12 bra BB42_16;
bra.uni BB42_15;
BB42_15:
mov.f32 %f29, 0fBF800000;
.loc 3 8401 10
div.rn.f32 %f32, %f29, %f32;
BB42_16:
.loc 2 45 100
add.s32 %r106, %r110, %r4;
mul.wide.s32 %rd18, %r106, 4;
add.s64 %rd19, %rd17, %rd18;
.loc 2 45 100
st.global.f32 [%rd19], %f32;
.loc 2 45 22
add.s32 %r110, %r2, %r110;
.loc 2 45 1
setp.lt.s32 %p13, %r110, %r36;
@%p13 bra BB42_4;
BB42_17:
.loc 2 45 22
mov.u32 %r107, %nctaid.x;
mad.lo.s32 %r109, %r107, %r40, %r109;
.loc 2 45 1
setp.lt.s32 %p14, %r109, %r37;
@%p14 bra BB42_2;
BB42_18:
.loc 2 45 2
ret;
}
.visible .entry map_tanh_float(
.param .u32 map_tanh_float_param_0,
.param .u32 map_tanh_float_param_1,
.param .u64 map_tanh_float_param_2,
.param .u32 map_tanh_float_param_3,
.param .u64 map_tanh_float_param_4,
.param .u32 map_tanh_float_param_5
)
{
.reg .pred %p<8>;
.reg .f32 %f<33>;
.reg .s32 %r<32>;
.reg .s64 %rd<9>;
ld.param.u32 %r10, [map_tanh_float_param_0];
ld.param.u32 %r11, [map_tanh_float_param_1];
ld.param.u64 %rd3, [map_tanh_float_param_2];
ld.param.u32 %r12, [map_tanh_float_param_3];
ld.param.u64 %rd4, [map_tanh_float_param_4];
ld.param.u32 %r13, [map_tanh_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 46 1
mov.u32 %r14, %ntid.x;
mov.u32 %r15, %ctaid.x;
mov.u32 %r16, %tid.x;
mad.lo.s32 %r30, %r14, %r15, %r16;
.loc 2 46 1
setp.ge.s32 %p1, %r30, %r11;
@%p1 bra BB43_9;
.loc 2 46 1
mov.u32 %r17, %tid.y;
mov.u32 %r18, %ntid.y;
mov.u32 %r19, %ctaid.y;
mad.lo.s32 %r2, %r18, %r19, %r17;
.loc 2 46 22
mov.u32 %r20, %nctaid.y;
mul.lo.s32 %r3, %r20, %r18;
BB43_2:
.loc 2 46 1
setp.ge.s32 %p2, %r2, %r10;
@%p2 bra BB43_8;
.loc 2 46 1
mul.lo.s32 %r5, %r30, %r13;
.loc 2 46 100
mul.lo.s32 %r6, %r30, %r12;
mov.u32 %r31, %r2;
BB43_4:
.loc 2 46 1
mov.u32 %r7, %r31;
add.s32 %r21, %r7, %r5;
mul.wide.s32 %rd5, %r21, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 46 1
ld.global.f32 %f1, [%rd6];
.loc 3 8444 10
abs.f32 %f2, %f1;
setp.ltu.f32 %p3, %f2, 0f3F0CCCCD;
@%p3 bra BB43_6;
add.f32 %f10, %f2, %f2;
mul.f32 %f11, %f10, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f12, %f11;
mov.f32 %f13, 0fBF317200;
.loc 3 8444 10
fma.rn.f32 %f14, %f12, %f13, %f10;
mov.f32 %f15, 0fB5BFBE8E;
.loc 3 8444 10
fma.rn.f32 %f16, %f12, %f15, %f14;
mul.f32 %f7, %f16, 0f3FB8AA3B;
// inline asm
ex2.approx.ftz.f32 %f6,%f7;
// inline asm
ex2.approx.f32 %f17, %f12;
mov.f32 %f18, 0f3F800000;
.loc 3 8444 10
fma.rn.f32 %f9, %f6, %f17, %f18;
// inline asm
rcp.approx.ftz.f32 %f8,%f9;
// inline asm
mov.f32 %f19, 0fC0000000;
.loc 3 8444 10
fma.rn.f32 %f20, %f8, %f19, %f18;
mov.b32 %r22, %f20;
setp.ltu.f32 %p4, %f2, 0f42B00000;
selp.b32 %r23, %r22, 1065353216, %p4;
mov.b32 %r24, %f1;
and.b32 %r25, %r24, -2147483648;
or.b32 %r26, %r23, %r25;
mov.b32 %f32, %r26;
bra.uni BB43_7;
BB43_6:
.loc 3 8444 10
mul.f32 %f21, %f1, %f1;
mov.f32 %f22, 0fBD57BE66;
mov.f32 %f23, 0f3C86A81B;
.loc 3 8444 10
fma.rn.f32 %f24, %f23, %f21, %f22;
mov.f32 %f25, 0f3E08677B;
.loc 3 8444 10
fma.rn.f32 %f26, %f24, %f21, %f25;
mov.f32 %f27, 0fBEAAAA29;
.loc 3 8444 10
fma.rn.f32 %f28, %f26, %f21, %f27;
mul.f32 %f29, %f28, %f21;
fma.rn.f32 %f30, %f29, %f1, %f1;
add.f32 %f31, %f1, %f1;
setp.eq.f32 %p5, %f1, 0f00000000;
selp.f32 %f32, %f31, %f30, %p5;
BB43_7:
.loc 2 46 100
add.s32 %r27, %r7, %r6;
mul.wide.s32 %rd7, %r27, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 46 100
st.global.f32 [%rd8], %f32;
.loc 2 46 22
add.s32 %r8, %r3, %r7;
.loc 2 46 1
setp.lt.s32 %p6, %r8, %r10;
mov.u32 %r31, %r8;
@%p6 bra BB43_4;
BB43_8:
.loc 2 46 22
mov.u32 %r28, %nctaid.x;
mad.lo.s32 %r30, %r28, %r14, %r30;
.loc 2 46 1
setp.lt.s32 %p7, %r30, %r11;
@%p7 bra BB43_2;
BB43_9:
.loc 2 46 2
ret;
}
.visible .entry map_tgamma_float(
.param .u32 map_tgamma_float_param_0,
.param .u32 map_tgamma_float_param_1,
.param .u64 map_tgamma_float_param_2,
.param .u32 map_tgamma_float_param_3,
.param .u64 map_tgamma_float_param_4,
.param .u32 map_tgamma_float_param_5
)
{
.reg .pred %p<21>;
.reg .f32 %f<93>;
.reg .s32 %r<29>;
.reg .s64 %rd<9>;
ld.param.u32 %r10, [map_tgamma_float_param_0];
ld.param.u32 %r11, [map_tgamma_float_param_1];
ld.param.u64 %rd2, [map_tgamma_float_param_2];
ld.param.u32 %r12, [map_tgamma_float_param_3];
ld.param.u64 %rd3, [map_tgamma_float_param_4];
ld.param.u32 %r13, [map_tgamma_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
.loc 2 47 1
mov.u32 %r14, %ntid.x;
mov.u32 %r15, %ctaid.x;
mov.u32 %r16, %tid.x;
mad.lo.s32 %r27, %r14, %r15, %r16;
.loc 2 47 1
setp.ge.s32 %p1, %r27, %r11;
@%p1 bra BB44_16;
.loc 2 47 1
mov.u32 %r17, %tid.y;
mov.u32 %r18, %ntid.y;
mov.u32 %r19, %ctaid.y;
mad.lo.s32 %r2, %r18, %r19, %r17;
.loc 2 47 22
mov.u32 %r20, %nctaid.y;
mul.lo.s32 %r3, %r20, %r18;
cvta.to.global.u64 %rd6, %rd2;
BB44_2:
.loc 2 47 1
setp.ge.s32 %p2, %r2, %r10;
@%p2 bra BB44_15;
.loc 2 47 1
mul.lo.s32 %r5, %r27, %r13;
.loc 2 47 92
mul.lo.s32 %r6, %r27, %r12;
mov.u32 %r28, %r2;
BB44_4:
.loc 2 47 1
mov.u32 %r7, %r28;
add.s32 %r21, %r7, %r5;
mul.wide.s32 %rd4, %r21, 4;
add.s64 %rd5, %rd1, %rd4;
.loc 2 47 1
ld.global.f32 %f1, [%rd5];
.loc 3 8694 10
setp.ltu.f32 %p3, %f1, 0f00000000;
@%p3 bra BB44_8;
setp.gt.f32 %p4, %f1, 0f42100000;
selp.f32 %f2, 0f42100000, %f1, %p4;
setp.gt.f32 %p5, %f2, 0f42081EB8;
add.f32 %f3, %f2, 0fBF800000;
selp.f32 %f82, %f3, %f2, %p5;
mov.f32 %f81, 0f3F800000;
.loc 3 8694 10
setp.gt.f32 %p6, %f82, 0f3FC00000;
@%p6 bra BB44_6;
bra.uni BB44_7;
BB44_6:
add.f32 %f82, %f82, 0fBF800000;
mul.f32 %f81, %f81, %f82;
setp.gt.f32 %p7, %f82, 0f3FC00000;
@%p7 bra BB44_6;
BB44_7:
add.f32 %f25, %f82, 0fBF800000;
setp.ltu.f32 %p8, %f2, 0f3F000000;
selp.f32 %f26, %f82, %f25, %p8;
mov.f32 %f27, 0f3BE86AA4;
mov.f32 %f28, 0fBA8AA19E;
.loc 3 8694 10
fma.rn.f32 %f29, %f28, %f26, %f27;
mov.f32 %f30, 0fBC1E2998;
.loc 3 8694 10
fma.rn.f32 %f31, %f29, %f26, %f30;
mov.f32 %f32, 0fBD2CBE4A;
.loc 3 8694 10
fma.rn.f32 %f33, %f31, %f26, %f32;
mov.f32 %f34, 0f3E2A8A17;
.loc 3 8694 10
fma.rn.f32 %f35, %f33, %f26, %f34;
mov.f32 %f36, 0fBD2C0CBB;
.loc 3 8694 10
fma.rn.f32 %f37, %f35, %f26, %f36;
mov.f32 %f38, 0fBF27E7A3;
.loc 3 8694 10
fma.rn.f32 %f39, %f37, %f26, %f38;
mov.f32 %f40, 0f3F13C468;
.loc 3 8694 10
fma.rn.f32 %f41, %f39, %f26, %f40;
mov.f32 %f42, 0f3F800000;
.loc 3 8694 10
fma.rn.f32 %f43, %f41, %f26, %f42;
mul.f32 %f44, %f43, %f2;
setp.lt.f32 %p9, %f2, 0f3F000000;
selp.f32 %f45, %f44, %f43, %p9;
div.approx.f32 %f46, %f81, %f45;
mul.f32 %f47, %f46, %f3;
selp.f32 %f92, %f47, %f46, %p5;
bra.uni BB44_14;
BB44_8:
.loc 3 8694 10
cvt.rmi.f32.f32 %f48, %f1;
setp.eq.f32 %p11, %f1, %f48;
selp.f32 %f49, 0f7FFFFFFF, %f1, %p11;
setp.lt.f32 %p12, %f49, 0fC2246666;
selp.f32 %f12, 0fC2246666, %f49, %p12;
setp.lt.f32 %p13, %f12, 0fC2081EB8;
add.f32 %f50, %f12, 0f40C00000;
selp.f32 %f91, %f50, %f12, %p13;
setp.geu.f32 %p14, %f91, 0fBF000000;
mov.f32 %f88, %f91;
mov.f32 %f89, %f91;
mov.f32 %f90, %f91;
@%p14 bra BB44_10;
BB44_9:
add.f32 %f90, %f90, 0f3F800000;
mul.f32 %f91, %f91, %f90;
setp.lt.f32 %p15, %f90, 0fBF000000;
mov.f32 %f89, %f91;
mov.f32 %f88, %f90;
@%p15 bra BB44_9;
BB44_10:
mov.f32 %f51, 0f3BE86AA4;
mov.f32 %f52, 0fBA8AA19E;
.loc 3 8694 10
fma.rn.f32 %f53, %f52, %f88, %f51;
mov.f32 %f54, 0fBC1E2998;
.loc 3 8694 10
fma.rn.f32 %f55, %f53, %f88, %f54;
mov.f32 %f56, 0fBD2CBE4A;
.loc 3 8694 10
fma.rn.f32 %f57, %f55, %f88, %f56;
mov.f32 %f58, 0f3E2A8A17;
.loc 3 8694 10
fma.rn.f32 %f59, %f57, %f88, %f58;
mov.f32 %f60, 0fBD2C0CBB;
.loc 3 8694 10
fma.rn.f32 %f61, %f59, %f88, %f60;
mov.f32 %f62, 0fBF27E7A3;
.loc 3 8694 10
fma.rn.f32 %f63, %f61, %f88, %f62;
mov.f32 %f64, 0f3F13C468;
.loc 3 8694 10
fma.rn.f32 %f65, %f63, %f88, %f64;
mov.f32 %f66, 0f3F800000;
.loc 3 8694 10
fma.rn.f32 %f67, %f65, %f88, %f66;
mul.f32 %f68, %f89, %f67;
rcp.rn.f32 %f92, %f68;
setp.geu.f32 %p16, %f12, 0fC2081EB8;
@%p16 bra BB44_14;
add.f32 %f69, %f12, 0f3F800000;
mul.f32 %f70, %f12, %f69;
add.f32 %f71, %f12, 0f40000000;
mul.f32 %f72, %f70, %f71;
add.f32 %f73, %f12, 0f40400000;
mul.f32 %f74, %f72, %f73;
add.f32 %f75, %f12, 0f40800000;
mul.f32 %f76, %f74, %f75;
add.f32 %f77, %f12, 0f40A00000;
mul.f32 %f78, %f76, %f77;
rcp.rn.f32 %f79, %f78;
mul.f32 %f92, %f92, %f79;
setp.geu.f32 %p17, %f1, 0fC2280000;
@%p17 bra BB44_14;
cvt.rzi.s32.f32 %r22, %f1;
and.b32 %r23, %r22, 1;
setp.eq.b32 %p18, %r23, 1;
@%p18 bra BB44_14;
mov.f32 %f92, 0f80000000;
BB44_14:
.loc 2 47 92
add.s32 %r24, %r7, %r6;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd6, %rd7;
.loc 2 47 92
st.global.f32 [%rd8], %f92;
.loc 2 47 22
add.s32 %r8, %r3, %r7;
.loc 2 47 1
setp.lt.s32 %p19, %r8, %r10;
mov.u32 %r28, %r8;
@%p19 bra BB44_4;
BB44_15:
.loc 2 47 22
mov.u32 %r25, %nctaid.x;
mad.lo.s32 %r27, %r25, %r14, %r27;
.loc 2 47 1
setp.lt.s32 %p20, %r27, %r11;
@%p20 bra BB44_2;
BB44_16:
.loc 2 47 2
ret;
}
.visible .entry map_trunc_float(
.param .u32 map_trunc_float_param_0,
.param .u32 map_trunc_float_param_1,
.param .u64 map_trunc_float_param_2,
.param .u32 map_trunc_float_param_3,
.param .u64 map_trunc_float_param_4,
.param .u32 map_trunc_float_param_5
)
{
.reg .pred %p<5>;
.reg .f32 %f<3>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map_trunc_float_param_0];
ld.param.u32 %r13, [map_trunc_float_param_1];
ld.param.u64 %rd3, [map_trunc_float_param_2];
ld.param.u32 %r14, [map_trunc_float_param_3];
ld.param.u64 %rd4, [map_trunc_float_param_4];
ld.param.u32 %r15, [map_trunc_float_param_5];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 48 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 48 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB45_6;
.loc 2 48 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 48 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 48 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB45_2:
.loc 2 48 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB45_5;
.loc 2 48 1
mul.lo.s32 %r7, %r25, %r15;
.loc 2 48 92
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB45_4:
.loc 2 48 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 48 1
ld.global.f32 %f1, [%rd6];
.loc 4 2810 10
cvt.rzi.f32.f32 %f2, %f1;
.loc 2 48 92
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 48 92
st.global.f32 [%rd8], %f2;
.loc 2 48 22
add.s32 %r10, %r5, %r9;
.loc 2 48 1
setp.lt.s32 %p3, %r10, %r12;
mov.u32 %r26, %r10;
@%p3 bra BB45_4;
BB45_5:
.loc 2 48 22
add.s32 %r25, %r4, %r25;
.loc 2 48 1
setp.lt.s32 %p4, %r25, %r13;
@%p4 bra BB45_2;
BB45_6:
.loc 2 48 2
ret;
}
.visible .entry map_y0_float(
.param .u32 map_y0_float_param_0,
.param .u32 map_y0_float_param_1,
.param .u64 map_y0_float_param_2,
.param .u32 map_y0_float_param_3,
.param .u64 map_y0_float_param_4,
.param .u32 map_y0_float_param_5
)
{
.local .align 4 .b8 __local_depot46[28];
.reg .b64 %SP;
.reg .b64 %SPL;
.reg .pred %p<60>;
.reg .f32 %f<341>;
.reg .s32 %r<389>;
.reg .s64 %rd<61>;
mov.u64 %SPL, __local_depot46;
cvta.local.u64 %SP, %SPL;
ld.param.u32 %r119, [map_y0_float_param_0];
ld.param.u32 %r120, [map_y0_float_param_1];
ld.param.u64 %rd25, [map_y0_float_param_2];
ld.param.u32 %r121, [map_y0_float_param_3];
ld.param.u64 %rd26, [map_y0_float_param_4];
ld.param.u32 %r122, [map_y0_float_param_5];
.loc 2 49 1
mov.u32 %r123, %ntid.x;
mov.u32 %r124, %ctaid.x;
mov.u32 %r125, %tid.x;
mad.lo.s32 %r355, %r123, %r124, %r125;
.loc 2 49 1
setp.ge.s32 %p1, %r355, %r120;
@%p1 bra BB46_81;
cvta.to.global.u64 %rd27, %rd26;
cvta.to.global.u64 %rd50, %rd25;
BB46_2:
.loc 2 49 1
mov.u32 %r126, %ctaid.y;
mov.u32 %r127, %ntid.y;
mov.u32 %r128, %tid.y;
mad.lo.s32 %r356, %r127, %r126, %r128;
.loc 2 49 1
setp.ge.s32 %p2, %r356, %r119;
@%p2 bra BB46_80;
BB46_3:
.loc 2 49 1
mad.lo.s32 %r133, %r355, %r122, %r356;
mul.wide.s32 %rd28, %r133, 4;
add.s64 %rd29, %rd27, %rd28;
.loc 2 49 1
ld.global.f32 %f1, [%rd29];
.loc 3 8537 10
abs.f32 %f2, %f1;
setp.gtu.f32 %p3, %f2, 0f3EE4C176;
@%p3 bra BB46_40;
mul.f32 %f66, %f2, %f2;
mov.f32 %f67, 0fB71F49B6;
mov.f32 %f68, 0f33DBE5AC;
.loc 3 8537 10
fma.rn.f32 %f69, %f68, %f66, %f67;
mov.f32 %f70, 0f3A0D3100;
.loc 3 8537 10
fma.rn.f32 %f71, %f69, %f66, %f70;
mov.f32 %f72, 0fBC83AD8E;
.loc 3 8537 10
fma.rn.f32 %f73, %f71, %f66, %f72;
mov.f32 %f74, 0f3E35DE5A;
.loc 3 8537 10
fma.rn.f32 %f75, %f73, %f66, %f74;
mov.f32 %f76, 0fBD9726B5;
.loc 3 8537 10
fma.rn.f32 %f3, %f75, %f66, %f76;
setp.lt.f32 %p4, %f2, 0f7F800000;
setp.gt.f32 %p5, %f2, 0f00000000;
and.pred %p6, %p5, %p4;
@%p6 bra BB46_6;
lg2.approx.f32 %f327, %f2;
bra.uni BB46_7;
BB46_6:
.loc 3 8537 10
setp.lt.f32 %p7, %f2, 0f00800000;
mul.f32 %f79, %f2, 0f4B800000;
selp.f32 %f80, %f79, %f2, %p7;
selp.f32 %f81, 0fC3170000, 0fC2FE0000, %p7;
mov.b32 %r134, %f80;
and.b32 %r135, %r134, 8388607;
or.b32 %r136, %r135, 1065353216;
mov.b32 %f82, %r136;
shr.u32 %r137, %r134, 23;
cvt.rn.f32.u32 %f83, %r137;
add.f32 %f84, %f81, %f83;
setp.gt.f32 %p8, %f82, 0f3FB504F3;
mul.f32 %f85, %f82, 0f3F000000;
add.f32 %f86, %f84, 0f3F800000;
selp.f32 %f87, %f85, %f82, %p8;
selp.f32 %f88, %f86, %f84, %p8;
add.f32 %f89, %f87, 0fBF800000;
add.f32 %f78, %f87, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f77,%f78;
// inline asm
neg.f32 %f90, %f89;
mul.f32 %f91, %f89, %f90;
mul.rn.f32 %f92, %f77, %f91;
add.rn.f32 %f93, %f89, %f92;
mul.f32 %f94, %f93, %f93;
mov.f32 %f95, 0f3C4C4BE0;
mov.f32 %f96, 0f3B2063C3;
.loc 3 8537 10
fma.rn.f32 %f97, %f96, %f94, %f95;
mov.f32 %f98, 0f3DAAAB50;
.loc 3 8537 10
fma.rn.f32 %f99, %f97, %f94, %f98;
mul.f32 %f100, %f99, %f94;
fma.rn.f32 %f101, %f100, %f93, %f92;
add.f32 %f102, %f101, %f89;
mov.f32 %f103, 0f3F317218;
.loc 3 8537 10
fma.rn.f32 %f327, %f88, %f103, %f102;
BB46_7:
mul.f32 %f7, %f327, 0f3F22F983;
abs.f32 %f8, %f2;
setp.gtu.f32 %p9, %f8, 0f41000000;
@%p9 bra BB46_9;
add.f32 %f104, %f8, 0fC019E8A9;
add.f32 %f105, %f104, 0fB3E971B3;
mov.f32 %f106, 0fA9ACA9B3;
mov.f32 %f107, 0fA6B3B8E7;
.loc 3 8537 10
fma.rn.f32 %f108, %f107, %f105, %f106;
mov.f32 %f109, 0f2C3F0E18;
.loc 3 8537 10
fma.rn.f32 %f110, %f108, %f105, %f109;
mov.f32 %f111, 0fACD41781;
.loc 3 8537 10
fma.rn.f32 %f112, %f110, %f105, %f111;
mov.f32 %f113, 0fAFE90F38;
.loc 3 8537 10
fma.rn.f32 %f114, %f112, %f105, %f113;
mov.f32 %f115, 0f3020305B;
.loc 3 8537 10
fma.rn.f32 %f116, %f114, %f105, %f115;
mov.f32 %f117, 0f33797143;
.loc 3 8537 10
fma.rn.f32 %f118, %f116, %f105, %f117;
mov.f32 %f119, 0f30F76F85;
.loc 3 8537 10
fma.rn.f32 %f120, %f118, %f105, %f119;
mov.f32 %f121, 0fB6B6DFC6;
.loc 3 8537 10
fma.rn.f32 %f122, %f120, %f105, %f121;
mov.f32 %f123, 0fB6F665C9;
.loc 3 8537 10
fma.rn.f32 %f124, %f122, %f105, %f123;
mov.f32 %f125, 0f399E2DEB;
.loc 3 8537 10
fma.rn.f32 %f126, %f124, %f105, %f125;
mov.f32 %f127, 0f3A4AE334;
.loc 3 8537 10
fma.rn.f32 %f128, %f126, %f105, %f127;
mov.f32 %f129, 0fBBEEAA1B;
.loc 3 8537 10
fma.rn.f32 %f130, %f128, %f105, %f129;
mov.f32 %f131, 0fBCDA7747;
.loc 3 8537 10
fma.rn.f32 %f132, %f130, %f105, %f131;
mul.f32 %f133, %f132, %f105;
add.f32 %f134, %f8, 0fC0B0A47B;
add.f32 %f135, %f134, 0f339A7A37;
mul.f32 %f136, %f133, %f135;
add.f32 %f137, %f8, 0fC10A75AB;
add.f32 %f138, %f137, 0fB4CCCDED;
mul.f32 %f9, %f136, %f138;
fma.rn.f32 %f340, %f7, %f9, %f3;
bra.uni BB46_77;
BB46_9:
.loc 3 8537 10
abs.f32 %f139, %f8;
setp.neu.f32 %p10, %f139, 0f7F800000;
@%p10 bra BB46_11;
mov.f32 %f140, 0f00000000;
.loc 3 8537 10
fma.rn.f32 %f340, %f7, %f140, %f3;
bra.uni BB46_77;
BB46_11:
.loc 3 8537 10
// inline asm
rcp.approx.ftz.f32 %f141,%f8;
// inline asm
mul.f32 %f143, %f141, %f141;
mov.f32 %f144, 0fBF03B7C2;
mov.f32 %f145, 0f4056FE93;
.loc 3 8537 10
fma.rn.f32 %f146, %f145, %f143, %f144;
mov.f32 %f147, 0f3DD3B3F3;
.loc 3 8537 10
fma.rn.f32 %f148, %f146, %f143, %f147;
mov.f32 %f149, 0fBD7FFFB6;
.loc 3 8537 10
fma.rn.f32 %f150, %f148, %f143, %f149;
mov.f32 %f151, 0f3F800000;
.loc 3 8537 10
fma.rn.f32 %f152, %f150, %f143, %f151;
mov.f32 %f153, 0fBE52412D;
mov.f32 %f154, 0f3F91E009;
.loc 3 8537 10
fma.rn.f32 %f155, %f154, %f143, %f153;
mov.f32 %f156, 0f3D854ED1;
.loc 3 8537 10
fma.rn.f32 %f157, %f155, %f143, %f156;
mov.f32 %f158, 0fBDFFFFFF;
.loc 3 8537 10
fma.rn.f32 %f159, %f157, %f143, %f158;
fma.rn.f32 %f10, %f159, %f141, %f8;
rsqrt.approx.f32 %f160, %f8;
mul.f32 %f161, %f160, 0f3F4C422A;
mul.f32 %f11, %f161, %f152;
mul.f32 %f162, %f10, 0f3F22F983;
cvt.rni.s32.f32 %r364, %f162;
cvt.rn.f32.s32 %f163, %r364;
neg.f32 %f164, %f163;
mov.f32 %f165, 0f3FC90FDA;
.loc 3 8537 10
fma.rn.f32 %f166, %f164, %f165, %f10;
mov.f32 %f167, 0f33A22168;
.loc 3 8537 10
fma.rn.f32 %f168, %f164, %f167, %f166;
mov.f32 %f169, 0f27C234C5;
.loc 3 8537 10
fma.rn.f32 %f328, %f164, %f169, %f168;
abs.f32 %f170, %f10;
setp.leu.f32 %p11, %f170, 0f47CE4780;
@%p11 bra BB46_19;
add.u64 %rd31, %SP, 0;
.loc 3 8537 10
mov.b32 %r6, %f10;
shr.u32 %r7, %r6, 23;
and.b32 %r140, %r7, 255;
add.s32 %r141, %r140, -128;
shl.b32 %r142, %r6, 8;
or.b32 %r8, %r142, -2147483648;
shr.u32 %r9, %r141, 5;
cvta.to.local.u64 %rd53, %rd31;
mov.u32 %r358, 0;
mov.u32 %r357, %r358;
mov.u64 %rd54, __cudart_i2opi_f;
BB46_13:
.pragma "nounroll";
.loc 3 8537 10
ld.const.u32 %r145, [%rd54];
// inline asm
{
mad.lo.cc.u32 %r143, %r145, %r8, %r358;
madc.hi.u32 %r144, %r145, %r8, 0;
}
// inline asm
st.local.u32 [%rd53], %r143;
add.s64 %rd54, %rd54, 4;
add.s64 %rd53, %rd53, 4;
.loc 3 8537 10
add.s32 %r357, %r357, 1;
setp.ne.s32 %p12, %r357, 6;
mov.u32 %r358, %r144;
@%p12 bra BB46_13;
and.b32 %r362, %r6, -2147483648;
cvta.to.local.u64 %rd33, %rd31;
.loc 3 8537 10
st.local.u32 [%rd33+24], %r144;
mov.u32 %r148, 6;
.loc 3 8537 10
sub.s32 %r149, %r148, %r9;
mul.wide.s32 %rd34, %r149, 4;
add.s64 %rd6, %rd33, %rd34;
.loc 3 8537 10
ld.local.u32 %r359, [%rd6];
ld.local.u32 %r360, [%rd6+-4];
and.b32 %r17, %r7, 31;
setp.eq.s32 %p13, %r17, 0;
@%p13 bra BB46_16;
mov.u32 %r150, 32;
.loc 3 8537 10
sub.s32 %r151, %r150, %r17;
shr.u32 %r152, %r360, %r151;
shl.b32 %r153, %r359, %r17;
add.s32 %r359, %r152, %r153;
ld.local.u32 %r154, [%rd6+-8];
shr.u32 %r155, %r154, %r151;
shl.b32 %r156, %r360, %r17;
add.s32 %r360, %r155, %r156;
BB46_16:
shr.u32 %r157, %r360, 30;
shl.b32 %r158, %r359, 2;
add.s32 %r361, %r157, %r158;
shl.b32 %r23, %r360, 2;
shr.u32 %r159, %r361, 31;
shr.u32 %r160, %r359, 30;
add.s32 %r161, %r159, %r160;
neg.s32 %r162, %r161;
setp.eq.s32 %p14, %r362, 0;
selp.b32 %r364, %r161, %r162, %p14;
setp.eq.s32 %p15, %r159, 0;
mov.u32 %r363, %r23;
@%p15 bra BB46_18;
not.b32 %r163, %r361;
neg.s32 %r25, %r23;
setp.eq.s32 %p16, %r23, 0;
selp.u32 %r164, 1, 0, %p16;
add.s32 %r361, %r164, %r163;
xor.b32 %r362, %r362, -2147483648;
mov.u32 %r363, %r25;
BB46_18:
.loc 3 8537 10
clz.b32 %r165, %r361;
setp.eq.s32 %p17, %r165, 0;
shl.b32 %r166, %r361, %r165;
mov.u32 %r167, 32;
.loc 3 8537 10
sub.s32 %r168, %r167, %r165;
shr.u32 %r169, %r363, %r168;
add.s32 %r170, %r169, %r166;
selp.b32 %r171, %r361, %r170, %p17;
mul.lo.s32 %r172, %r171, -921707870;
mov.u32 %r173, -921707870;
.loc 3 8537 10
mul.hi.u32 %r174, %r171, %r173;
setp.gt.s32 %p18, %r174, 0;
shl.b32 %r175, %r174, 1;
shr.u32 %r176, %r172, 31;
add.s32 %r177, %r176, %r175;
selp.b32 %r178, %r177, %r174, %p18;
selp.b32 %r179, -1, 0, %p18;
mov.u32 %r180, 126;
.loc 3 8537 10
sub.s32 %r181, %r180, %r165;
add.s32 %r182, %r181, %r179;
shl.b32 %r183, %r182, 23;
add.s32 %r184, %r178, 1;
shr.u32 %r185, %r184, 7;
add.s32 %r186, %r185, 1;
shr.u32 %r187, %r186, 1;
add.s32 %r188, %r187, %r183;
or.b32 %r189, %r188, %r362;
mov.b32 %f328, %r189;
BB46_19:
and.b32 %r190, %r364, 3;
cvt.rn.f32.s32 %f171, %r190;
add.f32 %f172, %f328, 0fBF490FDB;
fma.rn.f32 %f329, %f171, 0f3FC90FDB, %f172;
abs.f32 %f173, %f329;
setp.neu.f32 %p19, %f173, 0f7F800000;
@%p19 bra BB46_21;
mov.f32 %f174, 0f00000000;
.loc 3 8537 10
mul.rn.f32 %f329, %f329, %f174;
BB46_21:
mul.f32 %f175, %f329, 0f3F22F983;
cvt.rni.s32.f32 %r372, %f175;
cvt.rn.f32.s32 %f176, %r372;
neg.f32 %f177, %f176;
fma.rn.f32 %f179, %f177, %f165, %f329;
fma.rn.f32 %f181, %f177, %f167, %f179;
fma.rn.f32 %f330, %f177, %f169, %f181;
abs.f32 %f183, %f329;
setp.leu.f32 %p20, %f183, 0f47CE4780;
@%p20 bra BB46_29;
add.u64 %rd36, %SP, 0;
.loc 3 8537 10
mov.b32 %r33, %f329;
shr.u32 %r34, %r33, 23;
and.b32 %r193, %r34, 255;
add.s32 %r194, %r193, -128;
shl.b32 %r195, %r33, 8;
or.b32 %r35, %r195, -2147483648;
shr.u32 %r36, %r194, 5;
cvta.to.local.u64 %rd55, %rd36;
mov.u32 %r366, 0;
mov.u32 %r365, %r366;
mov.u64 %rd56, __cudart_i2opi_f;
BB46_23:
.pragma "nounroll";
.loc 3 8537 10
ld.const.u32 %r198, [%rd56];
// inline asm
{
mad.lo.cc.u32 %r196, %r198, %r35, %r366;
madc.hi.u32 %r197, %r198, %r35, 0;
}
// inline asm
st.local.u32 [%rd55], %r196;
add.s64 %rd56, %rd56, 4;
add.s64 %rd55, %rd55, 4;
.loc 3 8537 10
add.s32 %r365, %r365, 1;
setp.ne.s32 %p21, %r365, 6;
mov.u32 %r366, %r197;
@%p21 bra BB46_23;
and.b32 %r370, %r33, -2147483648;
cvta.to.local.u64 %rd38, %rd36;
.loc 3 8537 10
st.local.u32 [%rd38+24], %r197;
mov.u32 %r201, 6;
.loc 3 8537 10
sub.s32 %r202, %r201, %r36;
mul.wide.s32 %rd39, %r202, 4;
add.s64 %rd12, %rd38, %rd39;
.loc 3 8537 10
ld.local.u32 %r367, [%rd12];
ld.local.u32 %r368, [%rd12+-4];
and.b32 %r44, %r34, 31;
setp.eq.s32 %p22, %r44, 0;
@%p22 bra BB46_26;
mov.u32 %r203, 32;
.loc 3 8537 10
sub.s32 %r204, %r203, %r44;
shr.u32 %r205, %r368, %r204;
shl.b32 %r206, %r367, %r44;
add.s32 %r367, %r205, %r206;
ld.local.u32 %r207, [%rd12+-8];
shr.u32 %r208, %r207, %r204;
shl.b32 %r209, %r368, %r44;
add.s32 %r368, %r208, %r209;
BB46_26:
shr.u32 %r210, %r368, 30;
shl.b32 %r211, %r367, 2;
add.s32 %r369, %r210, %r211;
shl.b32 %r50, %r368, 2;
shr.u32 %r212, %r369, 31;
shr.u32 %r213, %r367, 30;
add.s32 %r214, %r212, %r213;
neg.s32 %r215, %r214;
setp.eq.s32 %p23, %r370, 0;
selp.b32 %r372, %r214, %r215, %p23;
setp.eq.s32 %p24, %r212, 0;
mov.u32 %r371, %r50;
@%p24 bra BB46_28;
not.b32 %r216, %r369;
neg.s32 %r52, %r50;
setp.eq.s32 %p25, %r50, 0;
selp.u32 %r217, 1, 0, %p25;
add.s32 %r369, %r217, %r216;
xor.b32 %r370, %r370, -2147483648;
mov.u32 %r371, %r52;
BB46_28:
.loc 3 8537 10
clz.b32 %r218, %r369;
setp.eq.s32 %p26, %r218, 0;
shl.b32 %r219, %r369, %r218;
mov.u32 %r220, 32;
.loc 3 8537 10
sub.s32 %r221, %r220, %r218;
shr.u32 %r222, %r371, %r221;
add.s32 %r223, %r222, %r219;
selp.b32 %r224, %r369, %r223, %p26;
mul.lo.s32 %r225, %r224, -921707870;
mov.u32 %r226, -921707870;
.loc 3 8537 10
mul.hi.u32 %r227, %r224, %r226;
setp.gt.s32 %p27, %r227, 0;
shl.b32 %r228, %r227, 1;
shr.u32 %r229, %r225, 31;
add.s32 %r230, %r229, %r228;
selp.b32 %r231, %r230, %r227, %p27;
selp.b32 %r232, -1, 0, %p27;
mov.u32 %r233, 126;
.loc 3 8537 10
sub.s32 %r234, %r233, %r218;
add.s32 %r235, %r234, %r232;
shl.b32 %r236, %r235, 23;
add.s32 %r237, %r231, 1;
shr.u32 %r238, %r237, 7;
add.s32 %r239, %r238, 1;
shr.u32 %r240, %r239, 1;
add.s32 %r241, %r240, %r236;
or.b32 %r242, %r241, %r370;
mov.b32 %f330, %r242;
BB46_29:
mul.rn.f32 %f21, %f330, %f330;
add.s32 %r59, %r372, 1;
and.b32 %r60, %r59, 1;
setp.eq.s32 %p28, %r60, 0;
@%p28 bra BB46_31;
mov.f32 %f184, 0fBAB6061A;
mov.f32 %f185, 0f37CCF5CE;
.loc 3 8537 10
fma.rn.f32 %f331, %f185, %f21, %f184;
bra.uni BB46_32;
BB46_31:
mov.f32 %f186, 0f3C08839E;
mov.f32 %f187, 0fB94CA1F9;
.loc 3 8537 10
fma.rn.f32 %f331, %f187, %f21, %f186;
BB46_32:
@%p28 bra BB46_34;
mov.f32 %f188, 0f3D2AAAA5;
.loc 3 8537 10
fma.rn.f32 %f189, %f331, %f21, %f188;
mov.f32 %f190, 0fBF000000;
.loc 3 8537 10
fma.rn.f32 %f332, %f189, %f21, %f190;
bra.uni BB46_35;
BB46_34:
mov.f32 %f191, 0fBE2AAAA3;
.loc 3 8537 10
fma.rn.f32 %f192, %f331, %f21, %f191;
mov.f32 %f193, 0f00000000;
.loc 3 8537 10
fma.rn.f32 %f332, %f192, %f21, %f193;
BB46_35:
fma.rn.f32 %f333, %f332, %f330, %f330;
@%p28 bra BB46_37;
fma.rn.f32 %f333, %f332, %f21, %f151;
BB46_37:
and.b32 %r243, %r59, 2;
setp.eq.s32 %p31, %r243, 0;
@%p31 bra BB46_39;
mov.f32 %f195, 0f00000000;
mov.f32 %f196, 0fBF800000;
.loc 3 8537 10
fma.rn.f32 %f333, %f333, %f196, %f195;
BB46_39:
mul.f32 %f33, %f11, %f333;
fma.rn.f32 %f340, %f7, %f33, %f3;
bra.uni BB46_77;
BB46_40:
.loc 3 8537 10
setp.gtu.f32 %p32, %f2, 0f3FF67AF8;
@%p32 bra BB46_42;
add.f32 %f197, %f2, 0fBF64C176;
add.f32 %f198, %f197, 0f32657D03;
mov.f32 %f199, 0fBE02574C;
mov.f32 %f200, 0f3CDDC8B3;
.loc 3 8537 10
fma.rn.f32 %f201, %f200, %f198, %f199;
mov.f32 %f202, 0f3E7F2CC9;
.loc 3 8537 10
fma.rn.f32 %f203, %f201, %f198, %f202;
mov.f32 %f204, 0fBE8BF29B;
.loc 3 8537 10
fma.rn.f32 %f205, %f203, %f198, %f204;
mov.f32 %f206, 0f3E5BCE93;
.loc 3 8537 10
fma.rn.f32 %f207, %f205, %f198, %f206;
mov.f32 %f208, 0fBE38C4FF;
.loc 3 8537 10
fma.rn.f32 %f209, %f207, %f198, %f208;
mov.f32 %f210, 0f3E42774D;
.loc 3 8537 10
fma.rn.f32 %f211, %f209, %f198, %f210;
mov.f32 %f212, 0fBE525CB2;
.loc 3 8537 10
fma.rn.f32 %f213, %f211, %f198, %f212;
mov.f32 %f214, 0f3E60F43D;
.loc 3 8537 10
fma.rn.f32 %f215, %f213, %f198, %f214;
mov.f32 %f216, 0fBE679145;
.loc 3 8537 10
fma.rn.f32 %f217, %f215, %f198, %f216;
mov.f32 %f218, 0f3E61D24A;
.loc 3 8537 10
fma.rn.f32 %f219, %f217, %f198, %f218;
mov.f32 %f220, 0fBEFBF1AD;
.loc 3 8537 10
fma.rn.f32 %f221, %f219, %f198, %f220;
mov.f32 %f222, 0f3F6121BB;
.loc 3 8537 10
fma.rn.f32 %f223, %f221, %f198, %f222;
mul.f32 %f340, %f223, %f198;
bra.uni BB46_77;
BB46_42:
.loc 3 8537 10
setp.gtu.f32 %p33, %f2, 0f40B0B31E;
@%p33 bra BB46_44;
add.f32 %f224, %f2, 0fC07D4A9A;
add.f32 %f225, %f224, 0fB3D9856A;
mov.f32 %f226, 0fB45E2607;
mov.f32 %f227, 0fB449DD3F;
.loc 3 8537 10
fma.rn.f32 %f228, %f227, %f225, %f226;
mov.f32 %f229, 0fB6857064;
.loc 3 8537 10
fma.rn.f32 %f230, %f228, %f225, %f229;
mov.f32 %f231, 0f38554610;
.loc 3 8537 10
fma.rn.f32 %f232, %f230, %f225, %f231;
mov.f32 %f233, 0f394ACED7;
.loc 3 8537 10
fma.rn.f32 %f234, %f232, %f225, %f233;
mov.f32 %f235, 0fBB0F1A0C;
.loc 3 8537 10
fma.rn.f32 %f236, %f234, %f225, %f235;
mov.f32 %f237, 0fBBE07F2E;
.loc 3 8537 10
fma.rn.f32 %f238, %f236, %f225, %f237;
mov.f32 %f239, 0f3D6FB6B5;
.loc 3 8537 10
fma.rn.f32 %f240, %f238, %f225, %f239;
mov.f32 %f241, 0f3D504DF1;
.loc 3 8537 10
fma.rn.f32 %f242, %f240, %f225, %f241;
mov.f32 %f243, 0fBECE1A13;
.loc 3 8537 10
fma.rn.f32 %f244, %f242, %f225, %f243;
mul.f32 %f340, %f244, %f225;
bra.uni BB46_77;
BB46_44:
.loc 3 8537 10
setp.gtu.f32 %p34, %f2, 0f410A7798;
@%p34 bra BB46_46;
add.f32 %f245, %f2, 0fC0E2C0EE;
add.f32 %f246, %f245, 0fB39CE420;
mov.f32 %f247, 0f3629DA6C;
mov.f32 %f248, 0f3510CEBE;
.loc 3 8537 10
fma.rn.f32 %f249, %f248, %f246, %f247;
mov.f32 %f250, 0fB84054C0;
.loc 3 8537 10
fma.rn.f32 %f251, %f249, %f246, %f250;
mov.f32 %f252, 0fB91318AB;
.loc 3 8537 10
fma.rn.f32 %f253, %f251, %f246, %f252;
mov.f32 %f254, 0f3B0E9921;
.loc 3 8537 10
fma.rn.f32 %f255, %f253, %f246, %f254;
mov.f32 %f256, 0f3B5974D5;
.loc 3 8537 10
fma.rn.f32 %f257, %f255, %f246, %f256;
mov.f32 %f258, 0fBD44B4D7;
.loc 3 8537 10
fma.rn.f32 %f259, %f257, %f246, %f258;
mov.f32 %f260, 0fBCAD7799;
.loc 3 8537 10
fma.rn.f32 %f261, %f259, %f246, %f260;
mov.f32 %f262, 0f3E99A665;
.loc 3 8537 10
fma.rn.f32 %f263, %f261, %f246, %f262;
mul.f32 %f340, %f263, %f246;
bra.uni BB46_77;
BB46_46:
.loc 3 8537 10
abs.f32 %f264, %f2;
setp.neu.f32 %p35, %f264, 0f7F800000;
@%p35 bra BB46_48;
mov.f32 %f340, 0f00000000;
bra.uni BB46_77;
BB46_48:
.loc 3 8537 10
// inline asm
rcp.approx.ftz.f32 %f266,%f2;
// inline asm
mul.f32 %f268, %f266, %f266;
mov.f32 %f269, 0f3DD0D5F0;
mov.f32 %f270, 0fBECC69F3;
.loc 3 8537 10
fma.rn.f32 %f271, %f270, %f268, %f269;
mov.f32 %f272, 0fBD7FF855;
.loc 3 8537 10
fma.rn.f32 %f273, %f271, %f268, %f272;
mov.f32 %f274, 0f3F800000;
.loc 3 8537 10
fma.rn.f32 %f275, %f273, %f268, %f274;
mov.f32 %f276, 0fBE50D31C;
mov.f32 %f277, 0f3F8CCD61;
.loc 3 8537 10
fma.rn.f32 %f278, %f277, %f268, %f276;
mov.f32 %f279, 0f3D854783;
.loc 3 8537 10
fma.rn.f32 %f280, %f278, %f268, %f279;
mov.f32 %f281, 0fBDFFFFFB;
.loc 3 8537 10
fma.rn.f32 %f282, %f280, %f268, %f281;
fma.rn.f32 %f39, %f282, %f266, %f2;
rsqrt.approx.f32 %f283, %f2;
mul.f32 %f284, %f283, 0f3F4C422A;
mul.f32 %f40, %f284, %f275;
mul.f32 %f285, %f39, 0f3F22F983;
cvt.rni.s32.f32 %r380, %f285;
cvt.rn.f32.s32 %f286, %r380;
neg.f32 %f287, %f286;
mov.f32 %f288, 0f3FC90FDA;
.loc 3 8537 10
fma.rn.f32 %f289, %f287, %f288, %f39;
mov.f32 %f290, 0f33A22168;
.loc 3 8537 10
fma.rn.f32 %f291, %f287, %f290, %f289;
mov.f32 %f292, 0f27C234C5;
.loc 3 8537 10
fma.rn.f32 %f334, %f287, %f292, %f291;
abs.f32 %f293, %f39;
setp.leu.f32 %p36, %f293, 0f47CE4780;
@%p36 bra BB46_56;
add.u64 %rd41, %SP, 0;
.loc 3 8537 10
mov.b32 %r62, %f39;
shr.u32 %r63, %r62, 23;
and.b32 %r246, %r63, 255;
add.s32 %r247, %r246, -128;
shl.b32 %r248, %r62, 8;
or.b32 %r64, %r248, -2147483648;
shr.u32 %r65, %r247, 5;
cvta.to.local.u64 %rd57, %rd41;
mov.u32 %r374, 0;
mov.u32 %r373, %r374;
mov.u64 %rd58, __cudart_i2opi_f;
BB46_50:
.pragma "nounroll";
.loc 3 8537 10
ld.const.u32 %r251, [%rd58];
// inline asm
{
mad.lo.cc.u32 %r249, %r251, %r64, %r374;
madc.hi.u32 %r250, %r251, %r64, 0;
}
// inline asm
st.local.u32 [%rd57], %r249;
add.s64 %rd58, %rd58, 4;
add.s64 %rd57, %rd57, 4;
.loc 3 8537 10
add.s32 %r373, %r373, 1;
setp.ne.s32 %p37, %r373, 6;
mov.u32 %r374, %r250;
@%p37 bra BB46_50;
and.b32 %r378, %r62, -2147483648;
cvta.to.local.u64 %rd43, %rd41;
.loc 3 8537 10
st.local.u32 [%rd43+24], %r250;
mov.u32 %r254, 6;
.loc 3 8537 10
sub.s32 %r255, %r254, %r65;
mul.wide.s32 %rd44, %r255, 4;
add.s64 %rd18, %rd43, %rd44;
.loc 3 8537 10
ld.local.u32 %r375, [%rd18];
ld.local.u32 %r376, [%rd18+-4];
and.b32 %r73, %r63, 31;
setp.eq.s32 %p38, %r73, 0;
@%p38 bra BB46_53;
mov.u32 %r256, 32;
.loc 3 8537 10
sub.s32 %r257, %r256, %r73;
shr.u32 %r258, %r376, %r257;
shl.b32 %r259, %r375, %r73;
add.s32 %r375, %r258, %r259;
ld.local.u32 %r260, [%rd18+-8];
shr.u32 %r261, %r260, %r257;
shl.b32 %r262, %r376, %r73;
add.s32 %r376, %r261, %r262;
BB46_53:
shr.u32 %r263, %r376, 30;
shl.b32 %r264, %r375, 2;
add.s32 %r377, %r263, %r264;
shl.b32 %r79, %r376, 2;
shr.u32 %r265, %r377, 31;
shr.u32 %r266, %r375, 30;
add.s32 %r267, %r265, %r266;
neg.s32 %r268, %r267;
setp.eq.s32 %p39, %r378, 0;
selp.b32 %r380, %r267, %r268, %p39;
setp.eq.s32 %p40, %r265, 0;
mov.u32 %r379, %r79;
@%p40 bra BB46_55;
not.b32 %r269, %r377;
neg.s32 %r81, %r79;
setp.eq.s32 %p41, %r79, 0;
selp.u32 %r270, 1, 0, %p41;
add.s32 %r377, %r270, %r269;
xor.b32 %r378, %r378, -2147483648;
mov.u32 %r379, %r81;
BB46_55:
.loc 3 8537 10
clz.b32 %r271, %r377;
setp.eq.s32 %p42, %r271, 0;
shl.b32 %r272, %r377, %r271;
mov.u32 %r273, 32;
.loc 3 8537 10
sub.s32 %r274, %r273, %r271;
shr.u32 %r275, %r379, %r274;
add.s32 %r276, %r275, %r272;
selp.b32 %r277, %r377, %r276, %p42;
mul.lo.s32 %r278, %r277, -921707870;
mov.u32 %r279, -921707870;
.loc 3 8537 10
mul.hi.u32 %r280, %r277, %r279;
setp.gt.s32 %p43, %r280, 0;
shl.b32 %r281, %r280, 1;
shr.u32 %r282, %r278, 31;
add.s32 %r283, %r282, %r281;
selp.b32 %r284, %r283, %r280, %p43;
selp.b32 %r285, -1, 0, %p43;
mov.u32 %r286, 126;
.loc 3 8537 10
sub.s32 %r287, %r286, %r271;
add.s32 %r288, %r287, %r285;
shl.b32 %r289, %r288, 23;
add.s32 %r290, %r284, 1;
shr.u32 %r291, %r290, 7;
add.s32 %r292, %r291, 1;
shr.u32 %r293, %r292, 1;
add.s32 %r294, %r293, %r289;
or.b32 %r295, %r294, %r378;
mov.b32 %f334, %r295;
BB46_56:
and.b32 %r296, %r380, 3;
cvt.rn.f32.s32 %f294, %r296;
add.f32 %f295, %f334, 0fC016CBE4;
fma.rn.f32 %f335, %f294, 0f3FC90FDB, %f295;
abs.f32 %f296, %f335;
setp.neu.f32 %p44, %f296, 0f7F800000;
@%p44 bra BB46_58;
mov.f32 %f297, 0f00000000;
.loc 3 8537 10
mul.rn.f32 %f335, %f335, %f297;
BB46_58:
mul.f32 %f298, %f335, 0f3F22F983;
cvt.rni.s32.f32 %r388, %f298;
cvt.rn.f32.s32 %f299, %r388;
neg.f32 %f300, %f299;
fma.rn.f32 %f302, %f300, %f288, %f335;
fma.rn.f32 %f304, %f300, %f290, %f302;
fma.rn.f32 %f336, %f300, %f292, %f304;
abs.f32 %f306, %f335;
setp.leu.f32 %p45, %f306, 0f47CE4780;
@%p45 bra BB46_66;
add.u64 %rd46, %SP, 0;
.loc 3 8537 10
mov.b32 %r89, %f335;
shr.u32 %r90, %r89, 23;
and.b32 %r299, %r90, 255;
add.s32 %r300, %r299, -128;
shl.b32 %r301, %r89, 8;
or.b32 %r91, %r301, -2147483648;
shr.u32 %r92, %r300, 5;
cvta.to.local.u64 %rd59, %rd46;
mov.u32 %r382, 0;
mov.u32 %r381, %r382;
mov.u64 %rd60, __cudart_i2opi_f;
BB46_60:
.pragma "nounroll";
.loc 3 8537 10
ld.const.u32 %r304, [%rd60];
// inline asm
{
mad.lo.cc.u32 %r302, %r304, %r91, %r382;
madc.hi.u32 %r303, %r304, %r91, 0;
}
// inline asm
st.local.u32 [%rd59], %r302;
add.s64 %rd60, %rd60, 4;
add.s64 %rd59, %rd59, 4;
.loc 3 8537 10
add.s32 %r381, %r381, 1;
setp.ne.s32 %p46, %r381, 6;
mov.u32 %r382, %r303;
@%p46 bra BB46_60;
and.b32 %r386, %r89, -2147483648;
cvta.to.local.u64 %rd48, %rd46;
.loc 3 8537 10
st.local.u32 [%rd48+24], %r303;
mov.u32 %r307, 6;
.loc 3 8537 10
sub.s32 %r308, %r307, %r92;
mul.wide.s32 %rd49, %r308, 4;
add.s64 %rd24, %rd48, %rd49;
.loc 3 8537 10
ld.local.u32 %r383, [%rd24];
ld.local.u32 %r384, [%rd24+-4];
and.b32 %r100, %r90, 31;
setp.eq.s32 %p47, %r100, 0;
@%p47 bra BB46_63;
mov.u32 %r309, 32;
.loc 3 8537 10
sub.s32 %r310, %r309, %r100;
shr.u32 %r311, %r384, %r310;
shl.b32 %r312, %r383, %r100;
add.s32 %r383, %r311, %r312;
ld.local.u32 %r313, [%rd24+-8];
shr.u32 %r314, %r313, %r310;
shl.b32 %r315, %r384, %r100;
add.s32 %r384, %r314, %r315;
BB46_63:
shr.u32 %r316, %r384, 30;
shl.b32 %r317, %r383, 2;
add.s32 %r385, %r316, %r317;
shl.b32 %r106, %r384, 2;
shr.u32 %r318, %r385, 31;
shr.u32 %r319, %r383, 30;
add.s32 %r320, %r318, %r319;
neg.s32 %r321, %r320;
setp.eq.s32 %p48, %r386, 0;
selp.b32 %r388, %r320, %r321, %p48;
setp.eq.s32 %p49, %r318, 0;
mov.u32 %r387, %r106;
@%p49 bra BB46_65;
not.b32 %r322, %r385;
neg.s32 %r108, %r106;
setp.eq.s32 %p50, %r106, 0;
selp.u32 %r323, 1, 0, %p50;
add.s32 %r385, %r323, %r322;
xor.b32 %r386, %r386, -2147483648;
mov.u32 %r387, %r108;
BB46_65:
.loc 3 8537 10
clz.b32 %r324, %r385;
setp.eq.s32 %p51, %r324, 0;
shl.b32 %r325, %r385, %r324;
mov.u32 %r326, 32;
.loc 3 8537 10
sub.s32 %r327, %r326, %r324;
shr.u32 %r328, %r387, %r327;
add.s32 %r329, %r328, %r325;
selp.b32 %r330, %r385, %r329, %p51;
mul.lo.s32 %r331, %r330, -921707870;
mov.u32 %r332, -921707870;
.loc 3 8537 10
mul.hi.u32 %r333, %r330, %r332;
setp.gt.s32 %p52, %r333, 0;
shl.b32 %r334, %r333, 1;
shr.u32 %r335, %r331, 31;
add.s32 %r336, %r335, %r334;
selp.b32 %r337, %r336, %r333, %p52;
selp.b32 %r338, -1, 0, %p52;
mov.u32 %r339, 126;
.loc 3 8537 10
sub.s32 %r340, %r339, %r324;
add.s32 %r341, %r340, %r338;
shl.b32 %r342, %r341, 23;
add.s32 %r343, %r337, 1;
shr.u32 %r344, %r343, 7;
add.s32 %r345, %r344, 1;
shr.u32 %r346, %r345, 1;
add.s32 %r347, %r346, %r342;
or.b32 %r348, %r347, %r386;
mov.b32 %f336, %r348;
BB46_66:
mul.rn.f32 %f50, %f336, %f336;
add.s32 %r115, %r388, 1;
and.b32 %r116, %r115, 1;
setp.eq.s32 %p53, %r116, 0;
@%p53 bra BB46_68;
mov.f32 %f307, 0fBAB6061A;
mov.f32 %f308, 0f37CCF5CE;
.loc 3 8537 10
fma.rn.f32 %f337, %f308, %f50, %f307;
bra.uni BB46_69;
BB46_68:
mov.f32 %f309, 0f3C08839E;
mov.f32 %f310, 0fB94CA1F9;
.loc 3 8537 10
fma.rn.f32 %f337, %f310, %f50, %f309;
BB46_69:
@%p53 bra BB46_71;
mov.f32 %f311, 0f3D2AAAA5;
.loc 3 8537 10
fma.rn.f32 %f312, %f337, %f50, %f311;
mov.f32 %f313, 0fBF000000;
.loc 3 8537 10
fma.rn.f32 %f338, %f312, %f50, %f313;
bra.uni BB46_72;
BB46_71:
mov.f32 %f314, 0fBE2AAAA3;
.loc 3 8537 10
fma.rn.f32 %f315, %f337, %f50, %f314;
mov.f32 %f316, 0f00000000;
.loc 3 8537 10
fma.rn.f32 %f338, %f315, %f50, %f316;
BB46_72:
fma.rn.f32 %f339, %f338, %f336, %f336;
@%p53 bra BB46_74;
fma.rn.f32 %f339, %f338, %f50, %f274;
BB46_74:
and.b32 %r349, %r115, 2;
setp.eq.s32 %p56, %r349, 0;
@%p56 bra BB46_76;
mov.f32 %f318, 0f00000000;
mov.f32 %f319, 0fBF800000;
.loc 3 8537 10
fma.rn.f32 %f339, %f339, %f319, %f318;
BB46_76:
mul.f32 %f340, %f40, %f339;
BB46_77:
setp.geu.f32 %p57, %f1, 0f00000000;
@%p57 bra BB46_79;
mov.f32 %f320, 0fBF800000;
.loc 3 8537 10
sqrt.rn.f32 %f340, %f320;
BB46_79:
.loc 2 49 92
mad.lo.s32 %r350, %r355, %r121, %r356;
mul.wide.s32 %rd51, %r350, 4;
add.s64 %rd52, %rd50, %rd51;
.loc 2 49 92
st.global.f32 [%rd52], %f340;
.loc 2 49 22
mov.u32 %r352, %nctaid.y;
mad.lo.s32 %r356, %r352, %r127, %r356;
.loc 2 49 1
setp.lt.s32 %p58, %r356, %r119;
@%p58 bra BB46_3;
BB46_80:
.loc 2 49 22
mov.u32 %r353, %nctaid.x;
mad.lo.s32 %r355, %r353, %r123, %r355;
.loc 2 49 1
setp.lt.s32 %p59, %r355, %r120;
@%p59 bra BB46_2;
BB46_81:
.loc 2 49 2
ret;
}
.visible .entry map_y1_float(
.param .u32 map_y1_float_param_0,
.param .u32 map_y1_float_param_1,
.param .u64 map_y1_float_param_2,
.param .u32 map_y1_float_param_3,
.param .u64 map_y1_float_param_4,
.param .u32 map_y1_float_param_5
)
{
.local .align 4 .b8 __local_depot47[28];
.reg .b64 %SP;
.reg .b64 %SPL;
.reg .pred %p<62>;
.reg .f32 %f<332>;
.reg .s32 %r<394>;
.reg .s64 %rd<61>;
mov.u64 %SPL, __local_depot47;
cvta.local.u64 %SP, %SPL;
ld.param.u32 %r119, [map_y1_float_param_0];
ld.param.u32 %r120, [map_y1_float_param_1];
ld.param.u64 %rd25, [map_y1_float_param_2];
ld.param.u32 %r121, [map_y1_float_param_3];
ld.param.u64 %rd26, [map_y1_float_param_4];
ld.param.u32 %r122, [map_y1_float_param_5];
.loc 2 50 1
mov.u32 %r123, %ntid.x;
mov.u32 %r124, %ctaid.x;
mov.u32 %r125, %tid.x;
mad.lo.s32 %r360, %r123, %r124, %r125;
.loc 2 50 1
setp.ge.s32 %p1, %r360, %r120;
@%p1 bra BB47_84;
cvta.to.global.u64 %rd27, %rd26;
cvta.to.global.u64 %rd50, %rd25;
BB47_2:
.loc 2 50 1
mov.u32 %r126, %ctaid.y;
mov.u32 %r127, %ntid.y;
mov.u32 %r128, %tid.y;
mad.lo.s32 %r361, %r127, %r126, %r128;
.loc 2 50 1
setp.ge.s32 %p2, %r361, %r119;
@%p2 bra BB47_83;
BB47_3:
.loc 2 50 1
mad.lo.s32 %r133, %r360, %r122, %r361;
mul.wide.s32 %rd28, %r133, 4;
add.s64 %rd29, %rd27, %rd28;
.loc 2 50 1
ld.global.f32 %f1, [%rd29];
.loc 3 8542 10
abs.f32 %f2, %f1;
setp.lt.f32 %p3, %f2, 0f00800000;
@%p3 bra BB47_79;
setp.gtu.f32 %p4, %f2, 0f3FD96AC4;
@%p4 bra BB47_42;
mul.f32 %f66, %f2, %f2;
mov.f32 %f67, 0fB58527DA;
mov.f32 %f68, 0f321462CC;
.loc 3 8542 10
fma.rn.f32 %f69, %f68, %f66, %f67;
mov.f32 %f70, 0f38963E95;
.loc 3 8542 10
fma.rn.f32 %f71, %f69, %f66, %f70;
mov.f32 %f72, 0fBB41ADCB;
.loc 3 8542 10
fma.rn.f32 %f73, %f71, %f66, %f72;
mov.f32 %f74, 0f3D5E9CBB;
.loc 3 8542 10
fma.rn.f32 %f75, %f73, %f66, %f74;
mov.f32 %f76, 0fBE48C331;
.loc 3 8542 10
fma.rn.f32 %f77, %f75, %f66, %f76;
mul.f32 %f3, %f77, %f2;
setp.lt.f32 %p5, %f2, 0f7F800000;
setp.gt.f32 %p6, %f2, 0f00000000;
and.pred %p7, %p6, %p5;
@%p7 bra BB47_7;
lg2.approx.f32 %f317, %f2;
bra.uni BB47_8;
BB47_7:
.loc 3 8542 10
mov.b32 %r134, %f2;
and.b32 %r135, %r134, 8388607;
or.b32 %r136, %r135, 1065353216;
mov.b32 %f80, %r136;
shr.u32 %r137, %r134, 23;
cvt.rn.f32.u32 %f81, %r137;
add.f32 %f82, %f81, 0fC2FE0000;
setp.gt.f32 %p8, %f80, 0f3FB504F3;
mul.f32 %f83, %f80, 0f3F000000;
add.f32 %f84, %f82, 0f3F800000;
selp.f32 %f85, %f83, %f80, %p8;
selp.f32 %f86, %f84, %f82, %p8;
add.f32 %f87, %f85, 0fBF800000;
add.f32 %f79, %f85, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f78,%f79;
// inline asm
neg.f32 %f88, %f87;
mul.f32 %f89, %f87, %f88;
mul.rn.f32 %f90, %f78, %f89;
add.rn.f32 %f91, %f87, %f90;
mul.f32 %f92, %f91, %f91;
mov.f32 %f93, 0f3C4C4BE0;
mov.f32 %f94, 0f3B2063C3;
.loc 3 8542 10
fma.rn.f32 %f95, %f94, %f92, %f93;
mov.f32 %f96, 0f3DAAAB50;
.loc 3 8542 10
fma.rn.f32 %f97, %f95, %f92, %f96;
mul.f32 %f98, %f97, %f92;
fma.rn.f32 %f99, %f98, %f91, %f90;
add.f32 %f100, %f99, %f87;
mov.f32 %f101, 0f3F317218;
.loc 3 8542 10
fma.rn.f32 %f317, %f86, %f101, %f100;
BB47_8:
abs.f32 %f7, %f2;
setp.gtu.f32 %p9, %f7, 0f40FB3333;
@%p9 bra BB47_10;
add.f32 %f102, %f7, 0fC0753AAC;
add.f32 %f103, %f102, 0f33A5090F;
mov.f32 %f104, 0f2B81BF42;
mov.f32 %f105, 0f29AF3463;
.loc 3 8542 10
fma.rn.f32 %f106, %f105, %f103, %f104;
mov.f32 %f107, 0fADE21EC1;
.loc 3 8542 10
fma.rn.f32 %f108, %f106, %f103, %f107;
mov.f32 %f109, 0fAF5DDEFF;
.loc 3 8542 10
fma.rn.f32 %f110, %f108, %f103, %f109;
mov.f32 %f111, 0f319B0C9D;
.loc 3 8542 10
fma.rn.f32 %f112, %f110, %f103, %f111;
mov.f32 %f113, 0f32E81173;
.loc 3 8542 10
fma.rn.f32 %f114, %f112, %f103, %f113;
mov.f32 %f115, 0fB50F8DC8;
.loc 3 8542 10
fma.rn.f32 %f116, %f114, %f103, %f115;
mov.f32 %f117, 0fB61E653D;
.loc 3 8542 10
fma.rn.f32 %f118, %f116, %f103, %f117;
mov.f32 %f119, 0f382CD9C5;
.loc 3 8542 10
fma.rn.f32 %f120, %f118, %f103, %f119;
mov.f32 %f121, 0f38F9EB10;
.loc 3 8542 10
fma.rn.f32 %f122, %f120, %f103, %f121;
mov.f32 %f123, 0fBAECEB9C;
.loc 3 8542 10
fma.rn.f32 %f124, %f122, %f103, %f123;
mov.f32 %f125, 0fBB276FFD;
.loc 3 8542 10
fma.rn.f32 %f126, %f124, %f103, %f125;
mov.f32 %f127, 0f3D073993;
.loc 3 8542 10
fma.rn.f32 %f128, %f126, %f103, %f127;
add.f32 %f129, %f7, 0fC0E07FB0;
add.f32 %f130, %f129, 0f3444B8DB;
mul.f32 %f131, %f128, %f130;
mul.f32 %f132, %f131, %f103;
mul.f32 %f324, %f132, %f7;
bra.uni BB47_41;
BB47_10:
.loc 3 8542 10
abs.f32 %f133, %f7;
setp.neu.f32 %p10, %f133, 0f7F800000;
@%p10 bra BB47_12;
mov.f32 %f324, 0f00000000;
bra.uni BB47_41;
BB47_12:
.loc 3 8542 10
// inline asm
rcp.approx.ftz.f32 %f135,%f7;
// inline asm
mul.f32 %f137, %f135, %f135;
mov.f32 %f138, 0f3F3FF7E9;
mov.f32 %f139, 0fC082CB37;
.loc 3 8542 10
fma.rn.f32 %f140, %f139, %f137, %f138;
mov.f32 %f141, 0fBE458BAE;
.loc 3 8542 10
fma.rn.f32 %f142, %f140, %f137, %f141;
mov.f32 %f143, 0f3E3FFF8B;
.loc 3 8542 10
fma.rn.f32 %f144, %f142, %f137, %f143;
mov.f32 %f145, 0f3F800000;
.loc 3 8542 10
fma.rn.f32 %f146, %f144, %f137, %f145;
mov.f32 %f147, 0f3EB914AD;
mov.f32 %f148, 0fBFCA3BA2;
.loc 3 8542 10
fma.rn.f32 %f149, %f148, %f137, %f147;
mov.f32 %f150, 0fBE27F2EC;
.loc 3 8542 10
fma.rn.f32 %f151, %f149, %f137, %f150;
mov.f32 %f152, 0f3EBFFFFD;
.loc 3 8542 10
fma.rn.f32 %f153, %f151, %f137, %f152;
fma.rn.f32 %f9, %f153, %f135, %f7;
rsqrt.approx.f32 %f154, %f7;
mul.f32 %f155, %f154, 0f3F4C422A;
mul.f32 %f10, %f155, %f146;
mul.f32 %f156, %f9, 0f3F22F983;
cvt.rni.s32.f32 %r369, %f156;
cvt.rn.f32.s32 %f157, %r369;
neg.f32 %f158, %f157;
mov.f32 %f159, 0f3FC90FDA;
.loc 3 8542 10
fma.rn.f32 %f160, %f158, %f159, %f9;
mov.f32 %f161, 0f33A22168;
.loc 3 8542 10
fma.rn.f32 %f162, %f158, %f161, %f160;
mov.f32 %f163, 0f27C234C5;
.loc 3 8542 10
fma.rn.f32 %f318, %f158, %f163, %f162;
abs.f32 %f164, %f9;
setp.leu.f32 %p11, %f164, 0f47CE4780;
@%p11 bra BB47_20;
add.u64 %rd31, %SP, 0;
.loc 3 8542 10
mov.b32 %r6, %f9;
shr.u32 %r7, %r6, 23;
and.b32 %r140, %r7, 255;
add.s32 %r141, %r140, -128;
shl.b32 %r142, %r6, 8;
or.b32 %r8, %r142, -2147483648;
shr.u32 %r9, %r141, 5;
cvta.to.local.u64 %rd53, %rd31;
mov.u32 %r363, 0;
mov.u32 %r362, %r363;
mov.u64 %rd54, __cudart_i2opi_f;
BB47_14:
.pragma "nounroll";
.loc 3 8542 10
ld.const.u32 %r145, [%rd54];
// inline asm
{
mad.lo.cc.u32 %r143, %r145, %r8, %r363;
madc.hi.u32 %r144, %r145, %r8, 0;
}
// inline asm
st.local.u32 [%rd53], %r143;
add.s64 %rd54, %rd54, 4;
add.s64 %rd53, %rd53, 4;
.loc 3 8542 10
add.s32 %r362, %r362, 1;
setp.ne.s32 %p12, %r362, 6;
mov.u32 %r363, %r144;
@%p12 bra BB47_14;
and.b32 %r367, %r6, -2147483648;
cvta.to.local.u64 %rd33, %rd31;
.loc 3 8542 10
st.local.u32 [%rd33+24], %r144;
mov.u32 %r148, 6;
.loc 3 8542 10
sub.s32 %r149, %r148, %r9;
mul.wide.s32 %rd34, %r149, 4;
add.s64 %rd6, %rd33, %rd34;
.loc 3 8542 10
ld.local.u32 %r364, [%rd6];
ld.local.u32 %r365, [%rd6+-4];
and.b32 %r17, %r7, 31;
setp.eq.s32 %p13, %r17, 0;
@%p13 bra BB47_17;
mov.u32 %r150, 32;
.loc 3 8542 10
sub.s32 %r151, %r150, %r17;
shr.u32 %r152, %r365, %r151;
shl.b32 %r153, %r364, %r17;
add.s32 %r364, %r152, %r153;
ld.local.u32 %r154, [%rd6+-8];
shr.u32 %r155, %r154, %r151;
shl.b32 %r156, %r365, %r17;
add.s32 %r365, %r155, %r156;
BB47_17:
shr.u32 %r157, %r365, 30;
shl.b32 %r158, %r364, 2;
add.s32 %r366, %r157, %r158;
shl.b32 %r23, %r365, 2;
shr.u32 %r159, %r366, 31;
shr.u32 %r160, %r364, 30;
add.s32 %r161, %r159, %r160;
neg.s32 %r162, %r161;
setp.eq.s32 %p14, %r367, 0;
selp.b32 %r369, %r161, %r162, %p14;
setp.eq.s32 %p15, %r159, 0;
mov.u32 %r368, %r23;
@%p15 bra BB47_19;
not.b32 %r163, %r366;
neg.s32 %r25, %r23;
setp.eq.s32 %p16, %r23, 0;
selp.u32 %r164, 1, 0, %p16;
add.s32 %r366, %r164, %r163;
xor.b32 %r367, %r367, -2147483648;
mov.u32 %r368, %r25;
BB47_19:
.loc 3 8542 10
clz.b32 %r165, %r366;
setp.eq.s32 %p17, %r165, 0;
shl.b32 %r166, %r366, %r165;
mov.u32 %r167, 32;
.loc 3 8542 10
sub.s32 %r168, %r167, %r165;
shr.u32 %r169, %r368, %r168;
add.s32 %r170, %r169, %r166;
selp.b32 %r171, %r366, %r170, %p17;
mul.lo.s32 %r172, %r171, -921707870;
mov.u32 %r173, -921707870;
.loc 3 8542 10
mul.hi.u32 %r174, %r171, %r173;
setp.gt.s32 %p18, %r174, 0;
shl.b32 %r175, %r174, 1;
shr.u32 %r176, %r172, 31;
add.s32 %r177, %r176, %r175;
selp.b32 %r178, %r177, %r174, %p18;
selp.b32 %r179, -1, 0, %p18;
mov.u32 %r180, 126;
.loc 3 8542 10
sub.s32 %r181, %r180, %r165;
add.s32 %r182, %r181, %r179;
shl.b32 %r183, %r182, 23;
add.s32 %r184, %r178, 1;
shr.u32 %r185, %r184, 7;
add.s32 %r186, %r185, 1;
shr.u32 %r187, %r186, 1;
add.s32 %r188, %r187, %r183;
or.b32 %r189, %r188, %r367;
mov.b32 %f318, %r189;
BB47_20:
and.b32 %r190, %r369, 3;
cvt.rn.f32.s32 %f165, %r190;
add.f32 %f166, %f318, 0fC016CBE4;
fma.rn.f32 %f319, %f165, 0f3FC90FDB, %f166;
abs.f32 %f167, %f319;
setp.neu.f32 %p19, %f167, 0f7F800000;
@%p19 bra BB47_22;
mov.f32 %f168, 0f00000000;
.loc 3 8542 10
mul.rn.f32 %f319, %f319, %f168;
BB47_22:
mul.f32 %f169, %f319, 0f3F22F983;
cvt.rni.s32.f32 %r377, %f169;
cvt.rn.f32.s32 %f170, %r377;
neg.f32 %f171, %f170;
fma.rn.f32 %f173, %f171, %f159, %f319;
fma.rn.f32 %f175, %f171, %f161, %f173;
fma.rn.f32 %f320, %f171, %f163, %f175;
abs.f32 %f177, %f319;
setp.leu.f32 %p20, %f177, 0f47CE4780;
@%p20 bra BB47_30;
add.u64 %rd36, %SP, 0;
.loc 3 8542 10
mov.b32 %r33, %f319;
shr.u32 %r34, %r33, 23;
and.b32 %r193, %r34, 255;
add.s32 %r194, %r193, -128;
shl.b32 %r195, %r33, 8;
or.b32 %r35, %r195, -2147483648;
shr.u32 %r36, %r194, 5;
cvta.to.local.u64 %rd55, %rd36;
mov.u32 %r371, 0;
mov.u32 %r370, %r371;
mov.u64 %rd56, __cudart_i2opi_f;
BB47_24:
.pragma "nounroll";
.loc 3 8542 10
ld.const.u32 %r198, [%rd56];
// inline asm
{
mad.lo.cc.u32 %r196, %r198, %r35, %r371;
madc.hi.u32 %r197, %r198, %r35, 0;
}
// inline asm
st.local.u32 [%rd55], %r196;
add.s64 %rd56, %rd56, 4;
add.s64 %rd55, %rd55, 4;
.loc 3 8542 10
add.s32 %r370, %r370, 1;
setp.ne.s32 %p21, %r370, 6;
mov.u32 %r371, %r197;
@%p21 bra BB47_24;
and.b32 %r375, %r33, -2147483648;
cvta.to.local.u64 %rd38, %rd36;
.loc 3 8542 10
st.local.u32 [%rd38+24], %r197;
mov.u32 %r201, 6;
.loc 3 8542 10
sub.s32 %r202, %r201, %r36;
mul.wide.s32 %rd39, %r202, 4;
add.s64 %rd12, %rd38, %rd39;
.loc 3 8542 10
ld.local.u32 %r372, [%rd12];
ld.local.u32 %r373, [%rd12+-4];
and.b32 %r44, %r34, 31;
setp.eq.s32 %p22, %r44, 0;
@%p22 bra BB47_27;
mov.u32 %r203, 32;
.loc 3 8542 10
sub.s32 %r204, %r203, %r44;
shr.u32 %r205, %r373, %r204;
shl.b32 %r206, %r372, %r44;
add.s32 %r372, %r205, %r206;
ld.local.u32 %r207, [%rd12+-8];
shr.u32 %r208, %r207, %r204;
shl.b32 %r209, %r373, %r44;
add.s32 %r373, %r208, %r209;
BB47_27:
shr.u32 %r210, %r373, 30;
shl.b32 %r211, %r372, 2;
add.s32 %r374, %r210, %r211;
shl.b32 %r50, %r373, 2;
shr.u32 %r212, %r374, 31;
shr.u32 %r213, %r372, 30;
add.s32 %r214, %r212, %r213;
neg.s32 %r215, %r214;
setp.eq.s32 %p23, %r375, 0;
selp.b32 %r377, %r214, %r215, %p23;
setp.eq.s32 %p24, %r212, 0;
mov.u32 %r376, %r50;
@%p24 bra BB47_29;
not.b32 %r216, %r374;
neg.s32 %r52, %r50;
setp.eq.s32 %p25, %r50, 0;
selp.u32 %r217, 1, 0, %p25;
add.s32 %r374, %r217, %r216;
xor.b32 %r375, %r375, -2147483648;
mov.u32 %r376, %r52;
BB47_29:
.loc 3 8542 10
clz.b32 %r218, %r374;
setp.eq.s32 %p26, %r218, 0;
shl.b32 %r219, %r374, %r218;
mov.u32 %r220, 32;
.loc 3 8542 10
sub.s32 %r221, %r220, %r218;
shr.u32 %r222, %r376, %r221;
add.s32 %r223, %r222, %r219;
selp.b32 %r224, %r374, %r223, %p26;
mul.lo.s32 %r225, %r224, -921707870;
mov.u32 %r226, -921707870;
.loc 3 8542 10
mul.hi.u32 %r227, %r224, %r226;
setp.gt.s32 %p27, %r227, 0;
shl.b32 %r228, %r227, 1;
shr.u32 %r229, %r225, 31;
add.s32 %r230, %r229, %r228;
selp.b32 %r231, %r230, %r227, %p27;
selp.b32 %r232, -1, 0, %p27;
mov.u32 %r233, 126;
.loc 3 8542 10
sub.s32 %r234, %r233, %r218;
add.s32 %r235, %r234, %r232;
shl.b32 %r236, %r235, 23;
add.s32 %r237, %r231, 1;
shr.u32 %r238, %r237, 7;
add.s32 %r239, %r238, 1;
shr.u32 %r240, %r239, 1;
add.s32 %r241, %r240, %r236;
or.b32 %r242, %r241, %r375;
mov.b32 %f320, %r242;
BB47_30:
mul.rn.f32 %f20, %f320, %f320;
add.s32 %r59, %r377, 1;
and.b32 %r60, %r59, 1;
setp.eq.s32 %p28, %r60, 0;
@%p28 bra BB47_32;
mov.f32 %f178, 0fBAB6061A;
mov.f32 %f179, 0f37CCF5CE;
.loc 3 8542 10
fma.rn.f32 %f321, %f179, %f20, %f178;
bra.uni BB47_33;
BB47_32:
mov.f32 %f180, 0f3C08839E;
mov.f32 %f181, 0fB94CA1F9;
.loc 3 8542 10
fma.rn.f32 %f321, %f181, %f20, %f180;
BB47_33:
@%p28 bra BB47_35;
mov.f32 %f182, 0f3D2AAAA5;
.loc 3 8542 10
fma.rn.f32 %f183, %f321, %f20, %f182;
mov.f32 %f184, 0fBF000000;
.loc 3 8542 10
fma.rn.f32 %f322, %f183, %f20, %f184;
bra.uni BB47_36;
BB47_35:
mov.f32 %f185, 0fBE2AAAA3;
.loc 3 8542 10
fma.rn.f32 %f186, %f321, %f20, %f185;
mov.f32 %f187, 0f00000000;
.loc 3 8542 10
fma.rn.f32 %f322, %f186, %f20, %f187;
BB47_36:
fma.rn.f32 %f323, %f322, %f320, %f320;
@%p28 bra BB47_38;
fma.rn.f32 %f323, %f322, %f20, %f145;
BB47_38:
and.b32 %r243, %r59, 2;
setp.eq.s32 %p31, %r243, 0;
@%p31 bra BB47_40;
mov.f32 %f189, 0f00000000;
mov.f32 %f190, 0fBF800000;
.loc 3 8542 10
fma.rn.f32 %f323, %f323, %f190, %f189;
BB47_40:
mul.f32 %f324, %f10, %f323;
BB47_41:
neg.f32 %f191, %f324;
setp.lt.f32 %p32, %f2, 0f00000000;
selp.f32 %f192, %f191, %f324, %p32;
mov.b32 %r244, %f2;
and.b32 %r245, %r244, -2147483648;
mov.b32 %r246, %f192;
and.b32 %r247, %r246, 2147483647;
or.b32 %r248, %r247, %r245;
mov.b32 %f193, %r248;
setp.lt.f32 %p33, %f7, 0f0DA24260;
selp.f32 %f194, %f193, %f192, %p33;
mov.f32 %f195, 0fBF800000;
.loc 3 8542 10
div.rn.f32 %f196, %f195, %f2;
fma.rn.f32 %f197, %f317, %f194, %f196;
fma.rn.f32 %f331, %f197, 0f3F22F983, %f3;
bra.uni BB47_80;
BB47_42:
.loc 3 8542 10
setp.gtu.f32 %p34, %f2, 0f40740EEE;
@%p34 bra BB47_44;
add.f32 %f198, %f2, 0fC00C9DF7;
add.f32 %f199, %f198, 0f33B200DC;
mov.f32 %f200, 0f39064A88;
mov.f32 %f201, 0fB789E29D;
.loc 3 8542 10
fma.rn.f32 %f202, %f201, %f199, %f200;
mov.f32 %f203, 0fB9F0AB0D;
.loc 3 8542 10
fma.rn.f32 %f204, %f202, %f199, %f203;
mov.f32 %f205, 0f3A8F6102;
.loc 3 8542 10
fma.rn.f32 %f206, %f204, %f199, %f205;
mov.f32 %f207, 0fBB2C7045;
.loc 3 8542 10
fma.rn.f32 %f208, %f206, %f199, %f207;
mov.f32 %f209, 0f3BF35DF7;
.loc 3 8542 10
fma.rn.f32 %f210, %f208, %f199, %f209;
mov.f32 %f211, 0fBB9D097C;
.loc 3 8542 10
fma.rn.f32 %f212, %f210, %f199, %f211;
mov.f32 %f213, 0fBD06968A;
.loc 3 8542 10
fma.rn.f32 %f214, %f212, %f199, %f213;
mov.f32 %f215, 0fBDF2B7DF;
.loc 3 8542 10
fma.rn.f32 %f216, %f214, %f199, %f215;
mov.f32 %f217, 0f3F055242;
.loc 3 8542 10
fma.rn.f32 %f218, %f216, %f199, %f217;
mul.f32 %f331, %f218, %f199;
bra.uni BB47_80;
BB47_44:
.loc 3 8542 10
setp.gtu.f32 %p35, %f2, 0f40E06937;
@%p35 bra BB47_46;
add.f32 %f219, %f2, 0fC0ADBFF2;
add.f32 %f220, %f219, 0fB4687B03;
mov.f32 %f221, 0fB508A416;
mov.f32 %f222, 0f32BE57D0;
.loc 3 8542 10
fma.rn.f32 %f223, %f222, %f220, %f221;
mov.f32 %f224, 0fB63F8A14;
.loc 3 8542 10
fma.rn.f32 %f225, %f223, %f220, %f224;
mov.f32 %f226, 0f38427E02;
.loc 3 8542 10
fma.rn.f32 %f227, %f225, %f220, %f226;
mov.f32 %f228, 0f3919BB1C;
.loc 3 8542 10
fma.rn.f32 %f229, %f227, %f220, %f228;
mov.f32 %f230, 0fBB0DF1FD;
.loc 3 8542 10
fma.rn.f32 %f231, %f229, %f220, %f230;
mov.f32 %f232, 0fBB885189;
.loc 3 8542 10
fma.rn.f32 %f233, %f231, %f220, %f232;
mov.f32 %f234, 0f3D50AEC1;
.loc 3 8542 10
fma.rn.f32 %f235, %f233, %f220, %f234;
mov.f32 %f236, 0f3D005CFC;
.loc 3 8542 10
fma.rn.f32 %f237, %f235, %f220, %f236;
mov.f32 %f238, 0fBEAE3E2B;
.loc 3 8542 10
fma.rn.f32 %f239, %f237, %f220, %f238;
mul.f32 %f331, %f239, %f220;
bra.uni BB47_80;
BB47_46:
.loc 3 8542 10
setp.gtu.f32 %p36, %f2, 0f4122C2E3;
@%p36 bra BB47_48;
add.f32 %f240, %f2, 0fC109893D;
add.f32 %f241, %f240, 0fB4E6169B;
mov.f32 %f242, 0f3602902E;
mov.f32 %f243, 0f350CF383;
.loc 3 8542 10
fma.rn.f32 %f244, %f243, %f241, %f242;
mov.f32 %f245, 0fB8375F71;
.loc 3 8542 10
fma.rn.f32 %f246, %f244, %f241, %f245;
mov.f32 %f247, 0fB8D9FAA8;
.loc 3 8542 10
fma.rn.f32 %f248, %f246, %f241, %f247;
mov.f32 %f249, 0f3B03D19A;
.loc 3 8542 10
fma.rn.f32 %f250, %f248, %f241, %f249;
mov.f32 %f251, 0f3B1E736D;
.loc 3 8542 10
fma.rn.f32 %f252, %f250, %f241, %f251;
mov.f32 %f253, 0fBD31CAE5;
.loc 3 8542 10
fma.rn.f32 %f254, %f252, %f241, %f253;
mov.f32 %f255, 0fBC8159B6;
.loc 3 8542 10
fma.rn.f32 %f256, %f254, %f241, %f255;
mov.f32 %f257, 0f3E8AFCCA;
.loc 3 8542 10
fma.rn.f32 %f258, %f256, %f241, %f257;
mul.f32 %f331, %f258, %f241;
bra.uni BB47_80;
BB47_48:
.loc 3 8542 10
abs.f32 %f259, %f2;
setp.neu.f32 %p37, %f259, 0f7F800000;
@%p37 bra BB47_50;
mov.f32 %f331, 0f00000000;
bra.uni BB47_80;
BB47_50:
.loc 3 8542 10
// inline asm
rcp.approx.ftz.f32 %f261,%f2;
// inline asm
mul.f32 %f263, %f261, %f261;
mov.f32 %f264, 0fBE44AB90;
mov.f32 %f265, 0f3F267F60;
.loc 3 8542 10
fma.rn.f32 %f266, %f265, %f263, %f264;
mov.f32 %f267, 0f3E3FFEBF;
.loc 3 8542 10
fma.rn.f32 %f268, %f266, %f263, %f267;
mov.f32 %f269, 0f3F800000;
.loc 3 8542 10
fma.rn.f32 %f270, %f268, %f263, %f269;
mov.f32 %f271, 0f3EBB73AB;
mov.f32 %f272, 0fBFE4E1AB;
.loc 3 8542 10
fma.rn.f32 %f273, %f272, %f263, %f271;
mov.f32 %f274, 0fBE27FB6E;
.loc 3 8542 10
fma.rn.f32 %f275, %f273, %f263, %f274;
mov.f32 %f276, 0f3EBFFFFF;
.loc 3 8542 10
fma.rn.f32 %f277, %f275, %f263, %f276;
fma.rn.f32 %f38, %f277, %f261, %f2;
rsqrt.approx.f32 %f278, %f2;
mul.f32 %f279, %f278, 0f3F4C422A;
mul.f32 %f39, %f279, %f270;
mul.f32 %f280, %f38, 0f3F22F983;
cvt.rni.s32.f32 %r385, %f280;
cvt.rn.f32.s32 %f281, %r385;
neg.f32 %f282, %f281;
mov.f32 %f283, 0f3FC90FDA;
.loc 3 8542 10
fma.rn.f32 %f284, %f282, %f283, %f38;
mov.f32 %f285, 0f33A22168;
.loc 3 8542 10
fma.rn.f32 %f286, %f282, %f285, %f284;
mov.f32 %f287, 0f27C234C5;
.loc 3 8542 10
fma.rn.f32 %f325, %f282, %f287, %f286;
abs.f32 %f288, %f38;
setp.leu.f32 %p38, %f288, 0f47CE4780;
@%p38 bra BB47_58;
add.u64 %rd41, %SP, 0;
.loc 3 8542 10
mov.b32 %r62, %f38;
shr.u32 %r63, %r62, 23;
and.b32 %r251, %r63, 255;
add.s32 %r252, %r251, -128;
shl.b32 %r253, %r62, 8;
or.b32 %r64, %r253, -2147483648;
shr.u32 %r65, %r252, 5;
cvta.to.local.u64 %rd57, %rd41;
mov.u32 %r379, 0;
mov.u32 %r378, %r379;
mov.u64 %rd58, __cudart_i2opi_f;
BB47_52:
.pragma "nounroll";
.loc 3 8542 10
ld.const.u32 %r256, [%rd58];
// inline asm
{
mad.lo.cc.u32 %r254, %r256, %r64, %r379;
madc.hi.u32 %r255, %r256, %r64, 0;
}
// inline asm
st.local.u32 [%rd57], %r254;
add.s64 %rd58, %rd58, 4;
add.s64 %rd57, %rd57, 4;
.loc 3 8542 10
add.s32 %r378, %r378, 1;
setp.ne.s32 %p39, %r378, 6;
mov.u32 %r379, %r255;
@%p39 bra BB47_52;
and.b32 %r383, %r62, -2147483648;
cvta.to.local.u64 %rd43, %rd41;
.loc 3 8542 10
st.local.u32 [%rd43+24], %r255;
mov.u32 %r259, 6;
.loc 3 8542 10
sub.s32 %r260, %r259, %r65;
mul.wide.s32 %rd44, %r260, 4;
add.s64 %rd18, %rd43, %rd44;
.loc 3 8542 10
ld.local.u32 %r380, [%rd18];
ld.local.u32 %r381, [%rd18+-4];
and.b32 %r73, %r63, 31;
setp.eq.s32 %p40, %r73, 0;
@%p40 bra BB47_55;
mov.u32 %r261, 32;
.loc 3 8542 10
sub.s32 %r262, %r261, %r73;
shr.u32 %r263, %r381, %r262;
shl.b32 %r264, %r380, %r73;
add.s32 %r380, %r263, %r264;
ld.local.u32 %r265, [%rd18+-8];
shr.u32 %r266, %r265, %r262;
shl.b32 %r267, %r381, %r73;
add.s32 %r381, %r266, %r267;
BB47_55:
shr.u32 %r268, %r381, 30;
shl.b32 %r269, %r380, 2;
add.s32 %r382, %r268, %r269;
shl.b32 %r79, %r381, 2;
shr.u32 %r270, %r382, 31;
shr.u32 %r271, %r380, 30;
add.s32 %r272, %r270, %r271;
neg.s32 %r273, %r272;
setp.eq.s32 %p41, %r383, 0;
selp.b32 %r385, %r272, %r273, %p41;
setp.eq.s32 %p42, %r270, 0;
mov.u32 %r384, %r79;
@%p42 bra BB47_57;
not.b32 %r274, %r382;
neg.s32 %r81, %r79;
setp.eq.s32 %p43, %r79, 0;
selp.u32 %r275, 1, 0, %p43;
add.s32 %r382, %r275, %r274;
xor.b32 %r383, %r383, -2147483648;
mov.u32 %r384, %r81;
BB47_57:
.loc 3 8542 10
clz.b32 %r276, %r382;
setp.eq.s32 %p44, %r276, 0;
shl.b32 %r277, %r382, %r276;
mov.u32 %r278, 32;
.loc 3 8542 10
sub.s32 %r279, %r278, %r276;
shr.u32 %r280, %r384, %r279;
add.s32 %r281, %r280, %r277;
selp.b32 %r282, %r382, %r281, %p44;
mul.lo.s32 %r283, %r282, -921707870;
mov.u32 %r284, -921707870;
.loc 3 8542 10
mul.hi.u32 %r285, %r282, %r284;
setp.gt.s32 %p45, %r285, 0;
shl.b32 %r286, %r285, 1;
shr.u32 %r287, %r283, 31;
add.s32 %r288, %r287, %r286;
selp.b32 %r289, %r288, %r285, %p45;
selp.b32 %r290, -1, 0, %p45;
mov.u32 %r291, 126;
.loc 3 8542 10
sub.s32 %r292, %r291, %r276;
add.s32 %r293, %r292, %r290;
shl.b32 %r294, %r293, 23;
add.s32 %r295, %r289, 1;
shr.u32 %r296, %r295, 7;
add.s32 %r297, %r296, 1;
shr.u32 %r298, %r297, 1;
add.s32 %r299, %r298, %r294;
or.b32 %r300, %r299, %r383;
mov.b32 %f325, %r300;
BB47_58:
and.b32 %r301, %r385, 3;
cvt.rn.f32.s32 %f289, %r301;
add.f32 %f290, %f325, 0fC07B53D1;
fma.rn.f32 %f326, %f289, 0f3FC90FDB, %f290;
abs.f32 %f291, %f326;
setp.neu.f32 %p46, %f291, 0f7F800000;
@%p46 bra BB47_60;
mov.f32 %f292, 0f00000000;
.loc 3 8542 10
mul.rn.f32 %f326, %f326, %f292;
BB47_60:
mul.f32 %f293, %f326, 0f3F22F983;
cvt.rni.s32.f32 %r393, %f293;
cvt.rn.f32.s32 %f294, %r393;
neg.f32 %f295, %f294;
fma.rn.f32 %f297, %f295, %f283, %f326;
fma.rn.f32 %f299, %f295, %f285, %f297;
fma.rn.f32 %f327, %f295, %f287, %f299;
abs.f32 %f301, %f326;
setp.leu.f32 %p47, %f301, 0f47CE4780;
@%p47 bra BB47_68;
add.u64 %rd46, %SP, 0;
.loc 3 8542 10
mov.b32 %r89, %f326;
shr.u32 %r90, %r89, 23;
and.b32 %r304, %r90, 255;
add.s32 %r305, %r304, -128;
shl.b32 %r306, %r89, 8;
or.b32 %r91, %r306, -2147483648;
shr.u32 %r92, %r305, 5;
cvta.to.local.u64 %rd59, %rd46;
mov.u32 %r387, 0;
mov.u32 %r386, %r387;
mov.u64 %rd60, __cudart_i2opi_f;
BB47_62:
.pragma "nounroll";
.loc 3 8542 10
ld.const.u32 %r309, [%rd60];
// inline asm
{
mad.lo.cc.u32 %r307, %r309, %r91, %r387;
madc.hi.u32 %r308, %r309, %r91, 0;
}
// inline asm
st.local.u32 [%rd59], %r307;
add.s64 %rd60, %rd60, 4;
add.s64 %rd59, %rd59, 4;
.loc 3 8542 10
add.s32 %r386, %r386, 1;
setp.ne.s32 %p48, %r386, 6;
mov.u32 %r387, %r308;
@%p48 bra BB47_62;
and.b32 %r391, %r89, -2147483648;
cvta.to.local.u64 %rd48, %rd46;
.loc 3 8542 10
st.local.u32 [%rd48+24], %r308;
mov.u32 %r312, 6;
.loc 3 8542 10
sub.s32 %r313, %r312, %r92;
mul.wide.s32 %rd49, %r313, 4;
add.s64 %rd24, %rd48, %rd49;
.loc 3 8542 10
ld.local.u32 %r388, [%rd24];
ld.local.u32 %r389, [%rd24+-4];
and.b32 %r100, %r90, 31;
setp.eq.s32 %p49, %r100, 0;
@%p49 bra BB47_65;
mov.u32 %r314, 32;
.loc 3 8542 10
sub.s32 %r315, %r314, %r100;
shr.u32 %r316, %r389, %r315;
shl.b32 %r317, %r388, %r100;
add.s32 %r388, %r316, %r317;
ld.local.u32 %r318, [%rd24+-8];
shr.u32 %r319, %r318, %r315;
shl.b32 %r320, %r389, %r100;
add.s32 %r389, %r319, %r320;
BB47_65:
shr.u32 %r321, %r389, 30;
shl.b32 %r322, %r388, 2;
add.s32 %r390, %r321, %r322;
shl.b32 %r106, %r389, 2;
shr.u32 %r323, %r390, 31;
shr.u32 %r324, %r388, 30;
add.s32 %r325, %r323, %r324;
neg.s32 %r326, %r325;
setp.eq.s32 %p50, %r391, 0;
selp.b32 %r393, %r325, %r326, %p50;
setp.eq.s32 %p51, %r323, 0;
mov.u32 %r392, %r106;
@%p51 bra BB47_67;
not.b32 %r327, %r390;
neg.s32 %r108, %r106;
setp.eq.s32 %p52, %r106, 0;
selp.u32 %r328, 1, 0, %p52;
add.s32 %r390, %r328, %r327;
xor.b32 %r391, %r391, -2147483648;
mov.u32 %r392, %r108;
BB47_67:
.loc 3 8542 10
clz.b32 %r329, %r390;
setp.eq.s32 %p53, %r329, 0;
shl.b32 %r330, %r390, %r329;
mov.u32 %r331, 32;
.loc 3 8542 10
sub.s32 %r332, %r331, %r329;
shr.u32 %r333, %r392, %r332;
add.s32 %r334, %r333, %r330;
selp.b32 %r335, %r390, %r334, %p53;
mul.lo.s32 %r336, %r335, -921707870;
mov.u32 %r337, -921707870;
.loc 3 8542 10
mul.hi.u32 %r338, %r335, %r337;
setp.gt.s32 %p54, %r338, 0;
shl.b32 %r339, %r338, 1;
shr.u32 %r340, %r336, 31;
add.s32 %r341, %r340, %r339;
selp.b32 %r342, %r341, %r338, %p54;
selp.b32 %r343, -1, 0, %p54;
mov.u32 %r344, 126;
.loc 3 8542 10
sub.s32 %r345, %r344, %r329;
add.s32 %r346, %r345, %r343;
shl.b32 %r347, %r346, 23;
add.s32 %r348, %r342, 1;
shr.u32 %r349, %r348, 7;
add.s32 %r350, %r349, 1;
shr.u32 %r351, %r350, 1;
add.s32 %r352, %r351, %r347;
or.b32 %r353, %r352, %r391;
mov.b32 %f327, %r353;
BB47_68:
mul.rn.f32 %f49, %f327, %f327;
add.s32 %r115, %r393, 1;
and.b32 %r116, %r115, 1;
setp.eq.s32 %p55, %r116, 0;
@%p55 bra BB47_70;
mov.f32 %f302, 0fBAB6061A;
mov.f32 %f303, 0f37CCF5CE;
.loc 3 8542 10
fma.rn.f32 %f328, %f303, %f49, %f302;
bra.uni BB47_71;
BB47_70:
mov.f32 %f304, 0f3C08839E;
mov.f32 %f305, 0fB94CA1F9;
.loc 3 8542 10
fma.rn.f32 %f328, %f305, %f49, %f304;
BB47_71:
@%p55 bra BB47_73;
mov.f32 %f306, 0f3D2AAAA5;
.loc 3 8542 10
fma.rn.f32 %f307, %f328, %f49, %f306;
mov.f32 %f308, 0fBF000000;
.loc 3 8542 10
fma.rn.f32 %f329, %f307, %f49, %f308;
bra.uni BB47_74;
BB47_73:
mov.f32 %f309, 0fBE2AAAA3;
.loc 3 8542 10
fma.rn.f32 %f310, %f328, %f49, %f309;
mov.f32 %f311, 0f00000000;
.loc 3 8542 10
fma.rn.f32 %f329, %f310, %f49, %f311;
BB47_74:
fma.rn.f32 %f330, %f329, %f327, %f327;
@%p55 bra BB47_76;
fma.rn.f32 %f330, %f329, %f49, %f269;
BB47_76:
and.b32 %r354, %r115, 2;
setp.eq.s32 %p58, %r354, 0;
@%p58 bra BB47_78;
mov.f32 %f313, 0f00000000;
mov.f32 %f314, 0fBF800000;
.loc 3 8542 10
fma.rn.f32 %f330, %f330, %f314, %f313;
BB47_78:
mul.f32 %f331, %f39, %f330;
bra.uni BB47_80;
BB47_79:
mov.f32 %f315, 0fBF22F983;
.loc 3 8542 10
div.rn.f32 %f331, %f315, %f2;
BB47_80:
setp.geu.f32 %p59, %f1, 0f00000000;
@%p59 bra BB47_82;
mov.f32 %f316, 0fBF800000;
.loc 3 8542 10
sqrt.rn.f32 %f331, %f316;
BB47_82:
.loc 2 50 92
mad.lo.s32 %r355, %r360, %r121, %r361;
mul.wide.s32 %rd51, %r355, 4;
add.s64 %rd52, %rd50, %rd51;
.loc 2 50 92
st.global.f32 [%rd52], %f331;
.loc 2 50 22
mov.u32 %r357, %nctaid.y;
mad.lo.s32 %r361, %r357, %r127, %r361;
.loc 2 50 1
setp.lt.s32 %p60, %r361, %r119;
@%p60 bra BB47_3;
BB47_83:
.loc 2 50 22
mov.u32 %r358, %nctaid.x;
mad.lo.s32 %r360, %r358, %r123, %r360;
.loc 2 50 1
setp.lt.s32 %p61, %r360, %r120;
@%p61 bra BB47_2;
BB47_84:
.loc 2 50 2
ret;
}
.visible .entry map2_add_float(
.param .u32 map2_add_float_param_0,
.param .u32 map2_add_float_param_1,
.param .u64 map2_add_float_param_2,
.param .u32 map2_add_float_param_3,
.param .u64 map2_add_float_param_4,
.param .u32 map2_add_float_param_5,
.param .u64 map2_add_float_param_6,
.param .u32 map2_add_float_param_7
)
{
.reg .pred %p<5>;
.reg .f32 %f<4>;
.reg .s32 %r<30>;
.reg .s64 %rd<13>;
ld.param.u32 %r13, [map2_add_float_param_0];
ld.param.u32 %r14, [map2_add_float_param_1];
ld.param.u64 %rd4, [map2_add_float_param_2];
ld.param.u32 %r15, [map2_add_float_param_3];
ld.param.u64 %rd5, [map2_add_float_param_4];
ld.param.u32 %r16, [map2_add_float_param_5];
ld.param.u64 %rd6, [map2_add_float_param_6];
ld.param.u32 %r17, [map2_add_float_param_7];
cvta.to.global.u64 %rd1, %rd4;
cvta.to.global.u64 %rd2, %rd6;
cvta.to.global.u64 %rd3, %rd5;
.loc 2 60 1
mov.u32 %r1, %ntid.x;
mov.u32 %r18, %ctaid.x;
mov.u32 %r19, %tid.x;
mad.lo.s32 %r28, %r1, %r18, %r19;
.loc 2 60 1
setp.ge.s32 %p1, %r28, %r14;
@%p1 bra BB48_6;
.loc 2 60 1
mov.u32 %r20, %tid.y;
mov.u32 %r21, %ntid.y;
mov.u32 %r22, %ctaid.y;
mad.lo.s32 %r3, %r21, %r22, %r20;
.loc 2 60 22
mov.u32 %r23, %nctaid.x;
mul.lo.s32 %r4, %r23, %r1;
.loc 2 60 22
mov.u32 %r24, %nctaid.y;
mul.lo.s32 %r5, %r24, %r21;
BB48_2:
.loc 2 60 1
setp.ge.s32 %p2, %r3, %r13;
@%p2 bra BB48_5;
.loc 2 60 1
mul.lo.s32 %r7, %r28, %r16;
mul.lo.s32 %r8, %r28, %r17;
mul.lo.s32 %r9, %r28, %r15;
mov.u32 %r29, %r3;
BB48_4:
.loc 2 60 1
mov.u32 %r10, %r29;
add.s32 %r25, %r10, %r7;
mul.wide.s32 %rd7, %r25, 4;
add.s64 %rd8, %rd3, %rd7;
.loc 2 60 1
add.s32 %r26, %r10, %r8;
mul.wide.s32 %rd9, %r26, 4;
add.s64 %rd10, %rd2, %rd9;
.loc 2 60 1
ld.global.f32 %f1, [%rd10];
ld.global.f32 %f2, [%rd8];
add.f32 %f3, %f2, %f1;
add.s32 %r27, %r10, %r9;
mul.wide.s32 %rd11, %r27, 4;
add.s64 %rd12, %rd1, %rd11;
.loc 2 60 1
st.global.f32 [%rd12], %f3;
.loc 2 60 22
add.s32 %r11, %r5, %r10;
.loc 2 60 1
setp.lt.s32 %p3, %r11, %r13;
mov.u32 %r29, %r11;
@%p3 bra BB48_4;
BB48_5:
.loc 2 60 22
add.s32 %r28, %r4, %r28;
.loc 2 60 1
setp.lt.s32 %p4, %r28, %r14;
@%p4 bra BB48_2;
BB48_6:
.loc 2 60 2
ret;
}
.visible .entry map2_v_s_add_float(
.param .u32 map2_v_s_add_float_param_0,
.param .u32 map2_v_s_add_float_param_1,
.param .u64 map2_v_s_add_float_param_2,
.param .u32 map2_v_s_add_float_param_3,
.param .u64 map2_v_s_add_float_param_4,
.param .u32 map2_v_s_add_float_param_5,
.param .f32 map2_v_s_add_float_param_6
)
{
.reg .pred %p<5>;
.reg .f32 %f<4>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map2_v_s_add_float_param_0];
ld.param.u32 %r13, [map2_v_s_add_float_param_1];
ld.param.u64 %rd3, [map2_v_s_add_float_param_2];
ld.param.u32 %r14, [map2_v_s_add_float_param_3];
ld.param.u64 %rd4, [map2_v_s_add_float_param_4];
ld.param.u32 %r15, [map2_v_s_add_float_param_5];
ld.param.f32 %f1, [map2_v_s_add_float_param_6];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 60 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 60 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB49_6;
.loc 2 60 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 60 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 60 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB49_2:
.loc 2 60 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB49_5;
.loc 2 60 1
mul.lo.s32 %r7, %r25, %r15;
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB49_4:
.loc 2 60 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 60 1
ld.global.f32 %f2, [%rd6];
add.f32 %f3, %f2, %f1;
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 60 1
st.global.f32 [%rd8], %f3;
.loc 2 60 22
add.s32 %r10, %r5, %r9;
.loc 2 60 1
setp.lt.s32 %p3, %r10, %r12;
mov.u32 %r26, %r10;
@%p3 bra BB49_4;
BB49_5:
.loc 2 60 22
add.s32 %r25, %r4, %r25;
.loc 2 60 1
setp.lt.s32 %p4, %r25, %r13;
@%p4 bra BB49_2;
BB49_6:
.loc 2 60 2
ret;
}
.visible .entry map2_s_v_add_float(
.param .u32 map2_s_v_add_float_param_0,
.param .u32 map2_s_v_add_float_param_1,
.param .u64 map2_s_v_add_float_param_2,
.param .u32 map2_s_v_add_float_param_3,
.param .f32 map2_s_v_add_float_param_4,
.param .u64 map2_s_v_add_float_param_5,
.param .u32 map2_s_v_add_float_param_6
)
{
.reg .pred %p<5>;
.reg .f32 %f<4>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map2_s_v_add_float_param_0];
ld.param.u32 %r13, [map2_s_v_add_float_param_1];
ld.param.u64 %rd3, [map2_s_v_add_float_param_2];
ld.param.u32 %r14, [map2_s_v_add_float_param_3];
ld.param.f32 %f1, [map2_s_v_add_float_param_4];
ld.param.u64 %rd4, [map2_s_v_add_float_param_5];
ld.param.u32 %r15, [map2_s_v_add_float_param_6];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 60 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 60 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB50_6;
.loc 2 60 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 60 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 60 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB50_2:
.loc 2 60 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB50_5;
.loc 2 60 1
mul.lo.s32 %r7, %r25, %r15;
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB50_4:
.loc 2 60 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 60 1
ld.global.f32 %f2, [%rd6];
add.f32 %f3, %f2, %f1;
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 60 1
st.global.f32 [%rd8], %f3;
.loc 2 60 22
add.s32 %r10, %r5, %r9;
.loc 2 60 1
setp.lt.s32 %p3, %r10, %r12;
mov.u32 %r26, %r10;
@%p3 bra BB50_4;
BB50_5:
.loc 2 60 22
add.s32 %r25, %r4, %r25;
.loc 2 60 1
setp.lt.s32 %p4, %r25, %r13;
@%p4 bra BB50_2;
BB50_6:
.loc 2 60 2
ret;
}
.visible .entry map2_transpose_add_float(
.param .u32 map2_transpose_add_float_param_0,
.param .u32 map2_transpose_add_float_param_1,
.param .u64 map2_transpose_add_float_param_2,
.param .u32 map2_transpose_add_float_param_3,
.param .u64 map2_transpose_add_float_param_4,
.param .u32 map2_transpose_add_float_param_5,
.param .u64 map2_transpose_add_float_param_6,
.param .u32 map2_transpose_add_float_param_7
)
{
.reg .pred %p<13>;
.reg .f32 %f<5>;
.reg .s32 %r<68>;
.reg .s64 %rd<23>;
// demoted variable
.shared .align 4 .b8 map2_transpose_add_float$__cuda_local_var_32576_1730_non_const_tile[4224];
ld.param.u32 %r27, [map2_transpose_add_float_param_0];
ld.param.u32 %r28, [map2_transpose_add_float_param_1];
ld.param.u64 %rd4, [map2_transpose_add_float_param_2];
ld.param.u32 %r29, [map2_transpose_add_float_param_3];
ld.param.u64 %rd5, [map2_transpose_add_float_param_4];
ld.param.u32 %r30, [map2_transpose_add_float_param_5];
ld.param.u64 %rd6, [map2_transpose_add_float_param_6];
ld.param.u32 %r31, [map2_transpose_add_float_param_7];
cvta.to.global.u64 %rd1, %rd4;
cvta.to.global.u64 %rd2, %rd5;
cvta.to.global.u64 %rd3, %rd6;
.loc 2 60 1
mov.u32 %r1, %ntid.x;
mov.u32 %r32, %ctaid.y;
mov.u32 %r33, %ntid.y;
mul.lo.s32 %r62, %r32, %r33;
.loc 2 60 1
setp.ge.s32 %p2, %r62, %r28;
@%p2 bra BB51_15;
BB51_1:
.loc 2 60 1
mov.u32 %r35, %ctaid.x;
mul.lo.s32 %r63, %r35, %r1;
.loc 2 60 1
setp.ge.s32 %p3, %r63, %r27;
@%p3 bra BB51_14;
.loc 2 60 1
add.s32 %r37, %r62, 32;
.loc 4 2621 10
min.s32 %r4, %r28, %r37;
BB51_3:
.loc 2 60 1
add.s32 %r40, %r63, 32;
.loc 4 2621 10
min.s32 %r7, %r27, %r40;
.loc 2 60 1
mov.u32 %r41, %tid.y;
add.s32 %r64, %r41, %r63;
.loc 2 60 1
setp.ge.s32 %p4, %r64, %r7;
@%p4 bra BB51_8;
BB51_4:
.loc 2 60 1
mov.u32 %r42, %tid.x;
.loc 2 60 1
add.s32 %r65, %r42, %r62;
.loc 2 60 1
setp.ge.s32 %p5, %r65, %r4;
@%p5 bra BB51_7;
.loc 2 60 1
mul.lo.s32 %r10, %r64, %r31;
sub.s32 %r11, %r64, %r63;
BB51_6:
add.s32 %r45, %r65, %r10;
mul.wide.s32 %rd7, %r45, 4;
add.s64 %rd8, %rd3, %rd7;
.loc 2 60 1
sub.s32 %r46, %r65, %r62;
mul.wide.s32 %rd9, %r11, 132;
mov.u64 %rd10, map2_transpose_add_float$__cuda_local_var_32576_1730_non_const_tile;
add.s64 %rd11, %rd10, %rd9;
mul.wide.s32 %rd12, %r46, 4;
add.s64 %rd13, %rd11, %rd12;
.loc 2 60 1
ld.global.f32 %f1, [%rd8];
st.shared.f32 [%rd13], %f1;
.loc 2 60 58
add.s32 %r65, %r1, %r65;
.loc 2 60 1
setp.lt.s32 %p6, %r65, %r4;
@%p6 bra BB51_6;
BB51_7:
.loc 2 60 58
add.s32 %r64, %r33, %r64;
.loc 2 60 1
setp.lt.s32 %p7, %r64, %r7;
@%p7 bra BB51_4;
BB51_8:
.loc 2 60 1
add.s32 %r66, %r41, %r62;
setp.lt.s32 %p1, %r66, %r4;
.loc 2 60 1
bar.sync 0;
.loc 2 60 1
@!%p1 bra BB51_13;
bra.uni BB51_9;
BB51_9:
.loc 2 60 1
mov.u32 %r51, %tid.x;
add.s32 %r67, %r51, %r63;
.loc 2 60 1
setp.ge.s32 %p8, %r67, %r7;
@%p8 bra BB51_12;
.loc 2 60 1
mul.lo.s32 %r18, %r66, %r30;
sub.s32 %r19, %r66, %r62;
mul.lo.s32 %r20, %r66, %r29;
BB51_11:
add.s32 %r54, %r67, %r18;
mul.wide.s32 %rd14, %r54, 4;
add.s64 %rd15, %rd2, %rd14;
.loc 2 60 1
sub.s32 %r55, %r67, %r63;
mul.wide.s32 %rd16, %r55, 132;
mov.u64 %rd17, map2_transpose_add_float$__cuda_local_var_32576_1730_non_const_tile;
add.s64 %rd18, %rd17, %rd16;
mul.wide.s32 %rd19, %r19, 4;
add.s64 %rd20, %rd18, %rd19;
.loc 2 60 1
ld.shared.f32 %f2, [%rd20];
ld.global.f32 %f3, [%rd15];
add.f32 %f4, %f3, %f2;
add.s32 %r56, %r67, %r20;
mul.wide.s32 %rd21, %r56, 4;
add.s64 %rd22, %rd1, %rd21;
.loc 2 60 1
st.global.f32 [%rd22], %f4;
.loc 2 60 58
add.s32 %r67, %r1, %r67;
.loc 2 60 1
setp.lt.s32 %p9, %r67, %r7;
@%p9 bra BB51_11;
BB51_12:
.loc 2 60 58
add.s32 %r66, %r33, %r66;
.loc 2 60 1
setp.lt.s32 %p10, %r66, %r4;
@%p10 bra BB51_9;
BB51_13:
.loc 2 60 1
bar.sync 0;
.loc 2 60 1
mov.u32 %r59, %nctaid.x;
.loc 2 60 21
mad.lo.s32 %r63, %r59, %r1, %r63;
.loc 2 60 1
setp.lt.s32 %p11, %r63, %r27;
@%p11 bra BB51_3;
BB51_14:
.loc 2 60 1
mov.u32 %r60, %nctaid.y;
.loc 2 60 21
mad.lo.s32 %r62, %r60, %r33, %r62;
.loc 2 60 1
setp.lt.s32 %p12, %r62, %r28;
@%p12 bra BB51_1;
BB51_15:
.loc 2 60 2
ret;
}
.visible .entry map2_sub_float(
.param .u32 map2_sub_float_param_0,
.param .u32 map2_sub_float_param_1,
.param .u64 map2_sub_float_param_2,
.param .u32 map2_sub_float_param_3,
.param .u64 map2_sub_float_param_4,
.param .u32 map2_sub_float_param_5,
.param .u64 map2_sub_float_param_6,
.param .u32 map2_sub_float_param_7
)
{
.reg .pred %p<5>;
.reg .f32 %f<4>;
.reg .s32 %r<30>;
.reg .s64 %rd<13>;
ld.param.u32 %r13, [map2_sub_float_param_0];
ld.param.u32 %r14, [map2_sub_float_param_1];
ld.param.u64 %rd4, [map2_sub_float_param_2];
ld.param.u32 %r15, [map2_sub_float_param_3];
ld.param.u64 %rd5, [map2_sub_float_param_4];
ld.param.u32 %r16, [map2_sub_float_param_5];
ld.param.u64 %rd6, [map2_sub_float_param_6];
ld.param.u32 %r17, [map2_sub_float_param_7];
cvta.to.global.u64 %rd1, %rd4;
cvta.to.global.u64 %rd2, %rd6;
cvta.to.global.u64 %rd3, %rd5;
.loc 2 61 1
mov.u32 %r1, %ntid.x;
mov.u32 %r18, %ctaid.x;
mov.u32 %r19, %tid.x;
mad.lo.s32 %r28, %r1, %r18, %r19;
.loc 2 61 1
setp.ge.s32 %p1, %r28, %r14;
@%p1 bra BB52_6;
.loc 2 61 1
mov.u32 %r20, %tid.y;
mov.u32 %r21, %ntid.y;
mov.u32 %r22, %ctaid.y;
mad.lo.s32 %r3, %r21, %r22, %r20;
.loc 2 61 22
mov.u32 %r23, %nctaid.x;
mul.lo.s32 %r4, %r23, %r1;
.loc 2 61 22
mov.u32 %r24, %nctaid.y;
mul.lo.s32 %r5, %r24, %r21;
BB52_2:
.loc 2 61 1
setp.ge.s32 %p2, %r3, %r13;
@%p2 bra BB52_5;
.loc 2 61 1
mul.lo.s32 %r7, %r28, %r16;
mul.lo.s32 %r8, %r28, %r17;
mul.lo.s32 %r9, %r28, %r15;
mov.u32 %r29, %r3;
BB52_4:
.loc 2 61 1
mov.u32 %r10, %r29;
add.s32 %r25, %r10, %r7;
mul.wide.s32 %rd7, %r25, 4;
add.s64 %rd8, %rd3, %rd7;
.loc 2 61 1
add.s32 %r26, %r10, %r8;
mul.wide.s32 %rd9, %r26, 4;
add.s64 %rd10, %rd2, %rd9;
.loc 2 61 1
ld.global.f32 %f1, [%rd10];
ld.global.f32 %f2, [%rd8];
sub.f32 %f3, %f2, %f1;
add.s32 %r27, %r10, %r9;
mul.wide.s32 %rd11, %r27, 4;
add.s64 %rd12, %rd1, %rd11;
.loc 2 61 1
st.global.f32 [%rd12], %f3;
.loc 2 61 22
add.s32 %r11, %r5, %r10;
.loc 2 61 1
setp.lt.s32 %p3, %r11, %r13;
mov.u32 %r29, %r11;
@%p3 bra BB52_4;
BB52_5:
.loc 2 61 22
add.s32 %r28, %r4, %r28;
.loc 2 61 1
setp.lt.s32 %p4, %r28, %r14;
@%p4 bra BB52_2;
BB52_6:
.loc 2 61 2
ret;
}
.visible .entry map2_v_s_sub_float(
.param .u32 map2_v_s_sub_float_param_0,
.param .u32 map2_v_s_sub_float_param_1,
.param .u64 map2_v_s_sub_float_param_2,
.param .u32 map2_v_s_sub_float_param_3,
.param .u64 map2_v_s_sub_float_param_4,
.param .u32 map2_v_s_sub_float_param_5,
.param .f32 map2_v_s_sub_float_param_6
)
{
.reg .pred %p<5>;
.reg .f32 %f<4>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map2_v_s_sub_float_param_0];
ld.param.u32 %r13, [map2_v_s_sub_float_param_1];
ld.param.u64 %rd3, [map2_v_s_sub_float_param_2];
ld.param.u32 %r14, [map2_v_s_sub_float_param_3];
ld.param.u64 %rd4, [map2_v_s_sub_float_param_4];
ld.param.u32 %r15, [map2_v_s_sub_float_param_5];
ld.param.f32 %f1, [map2_v_s_sub_float_param_6];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 61 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 61 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB53_6;
.loc 2 61 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 61 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 61 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB53_2:
.loc 2 61 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB53_5;
.loc 2 61 1
mul.lo.s32 %r7, %r25, %r15;
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB53_4:
.loc 2 61 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 61 1
ld.global.f32 %f2, [%rd6];
sub.f32 %f3, %f2, %f1;
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 61 1
st.global.f32 [%rd8], %f3;
.loc 2 61 22
add.s32 %r10, %r5, %r9;
.loc 2 61 1
setp.lt.s32 %p3, %r10, %r12;
mov.u32 %r26, %r10;
@%p3 bra BB53_4;
BB53_5:
.loc 2 61 22
add.s32 %r25, %r4, %r25;
.loc 2 61 1
setp.lt.s32 %p4, %r25, %r13;
@%p4 bra BB53_2;
BB53_6:
.loc 2 61 2
ret;
}
.visible .entry map2_s_v_sub_float(
.param .u32 map2_s_v_sub_float_param_0,
.param .u32 map2_s_v_sub_float_param_1,
.param .u64 map2_s_v_sub_float_param_2,
.param .u32 map2_s_v_sub_float_param_3,
.param .f32 map2_s_v_sub_float_param_4,
.param .u64 map2_s_v_sub_float_param_5,
.param .u32 map2_s_v_sub_float_param_6
)
{
.reg .pred %p<5>;
.reg .f32 %f<4>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map2_s_v_sub_float_param_0];
ld.param.u32 %r13, [map2_s_v_sub_float_param_1];
ld.param.u64 %rd3, [map2_s_v_sub_float_param_2];
ld.param.u32 %r14, [map2_s_v_sub_float_param_3];
ld.param.f32 %f1, [map2_s_v_sub_float_param_4];
ld.param.u64 %rd4, [map2_s_v_sub_float_param_5];
ld.param.u32 %r15, [map2_s_v_sub_float_param_6];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 61 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 61 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB54_6;
.loc 2 61 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 61 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 61 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB54_2:
.loc 2 61 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB54_5;
.loc 2 61 1
mul.lo.s32 %r7, %r25, %r15;
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB54_4:
.loc 2 61 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 61 1
ld.global.f32 %f2, [%rd6];
sub.f32 %f3, %f1, %f2;
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 61 1
st.global.f32 [%rd8], %f3;
.loc 2 61 22
add.s32 %r10, %r5, %r9;
.loc 2 61 1
setp.lt.s32 %p3, %r10, %r12;
mov.u32 %r26, %r10;
@%p3 bra BB54_4;
BB54_5:
.loc 2 61 22
add.s32 %r25, %r4, %r25;
.loc 2 61 1
setp.lt.s32 %p4, %r25, %r13;
@%p4 bra BB54_2;
BB54_6:
.loc 2 61 2
ret;
}
.visible .entry map2_transpose_sub_float(
.param .u32 map2_transpose_sub_float_param_0,
.param .u32 map2_transpose_sub_float_param_1,
.param .u64 map2_transpose_sub_float_param_2,
.param .u32 map2_transpose_sub_float_param_3,
.param .u64 map2_transpose_sub_float_param_4,
.param .u32 map2_transpose_sub_float_param_5,
.param .u64 map2_transpose_sub_float_param_6,
.param .u32 map2_transpose_sub_float_param_7
)
{
.reg .pred %p<13>;
.reg .f32 %f<5>;
.reg .s32 %r<68>;
.reg .s64 %rd<23>;
// demoted variable
.shared .align 4 .b8 map2_transpose_sub_float$__cuda_local_var_32577_1730_non_const_tile[4224];
ld.param.u32 %r27, [map2_transpose_sub_float_param_0];
ld.param.u32 %r28, [map2_transpose_sub_float_param_1];
ld.param.u64 %rd4, [map2_transpose_sub_float_param_2];
ld.param.u32 %r29, [map2_transpose_sub_float_param_3];
ld.param.u64 %rd5, [map2_transpose_sub_float_param_4];
ld.param.u32 %r30, [map2_transpose_sub_float_param_5];
ld.param.u64 %rd6, [map2_transpose_sub_float_param_6];
ld.param.u32 %r31, [map2_transpose_sub_float_param_7];
cvta.to.global.u64 %rd1, %rd4;
cvta.to.global.u64 %rd2, %rd5;
cvta.to.global.u64 %rd3, %rd6;
.loc 2 61 1
mov.u32 %r1, %ntid.x;
mov.u32 %r32, %ctaid.y;
mov.u32 %r33, %ntid.y;
mul.lo.s32 %r62, %r32, %r33;
.loc 2 61 1
setp.ge.s32 %p2, %r62, %r28;
@%p2 bra BB55_15;
BB55_1:
.loc 2 61 1
mov.u32 %r35, %ctaid.x;
mul.lo.s32 %r63, %r35, %r1;
.loc 2 61 1
setp.ge.s32 %p3, %r63, %r27;
@%p3 bra BB55_14;
.loc 2 61 1
add.s32 %r37, %r62, 32;
.loc 4 2621 10
min.s32 %r4, %r28, %r37;
BB55_3:
.loc 2 61 1
add.s32 %r40, %r63, 32;
.loc 4 2621 10
min.s32 %r7, %r27, %r40;
.loc 2 61 1
mov.u32 %r41, %tid.y;
add.s32 %r64, %r41, %r63;
.loc 2 61 1
setp.ge.s32 %p4, %r64, %r7;
@%p4 bra BB55_8;
BB55_4:
.loc 2 61 1
mov.u32 %r42, %tid.x;
.loc 2 61 1
add.s32 %r65, %r42, %r62;
.loc 2 61 1
setp.ge.s32 %p5, %r65, %r4;
@%p5 bra BB55_7;
.loc 2 61 1
mul.lo.s32 %r10, %r64, %r31;
sub.s32 %r11, %r64, %r63;
BB55_6:
add.s32 %r45, %r65, %r10;
mul.wide.s32 %rd7, %r45, 4;
add.s64 %rd8, %rd3, %rd7;
.loc 2 61 1
sub.s32 %r46, %r65, %r62;
mul.wide.s32 %rd9, %r11, 132;
mov.u64 %rd10, map2_transpose_sub_float$__cuda_local_var_32577_1730_non_const_tile;
add.s64 %rd11, %rd10, %rd9;
mul.wide.s32 %rd12, %r46, 4;
add.s64 %rd13, %rd11, %rd12;
.loc 2 61 1
ld.global.f32 %f1, [%rd8];
st.shared.f32 [%rd13], %f1;
.loc 2 61 58
add.s32 %r65, %r1, %r65;
.loc 2 61 1
setp.lt.s32 %p6, %r65, %r4;
@%p6 bra BB55_6;
BB55_7:
.loc 2 61 58
add.s32 %r64, %r33, %r64;
.loc 2 61 1
setp.lt.s32 %p7, %r64, %r7;
@%p7 bra BB55_4;
BB55_8:
.loc 2 61 1
add.s32 %r66, %r41, %r62;
setp.lt.s32 %p1, %r66, %r4;
.loc 2 61 1
bar.sync 0;
.loc 2 61 1
@!%p1 bra BB55_13;
bra.uni BB55_9;
BB55_9:
.loc 2 61 1
mov.u32 %r51, %tid.x;
add.s32 %r67, %r51, %r63;
.loc 2 61 1
setp.ge.s32 %p8, %r67, %r7;
@%p8 bra BB55_12;
.loc 2 61 1
mul.lo.s32 %r18, %r66, %r30;
sub.s32 %r19, %r66, %r62;
mul.lo.s32 %r20, %r66, %r29;
BB55_11:
add.s32 %r54, %r67, %r18;
mul.wide.s32 %rd14, %r54, 4;
add.s64 %rd15, %rd2, %rd14;
.loc 2 61 1
sub.s32 %r55, %r67, %r63;
mul.wide.s32 %rd16, %r55, 132;
mov.u64 %rd17, map2_transpose_sub_float$__cuda_local_var_32577_1730_non_const_tile;
add.s64 %rd18, %rd17, %rd16;
mul.wide.s32 %rd19, %r19, 4;
add.s64 %rd20, %rd18, %rd19;
.loc 2 61 1
ld.shared.f32 %f2, [%rd20];
ld.global.f32 %f3, [%rd15];
sub.f32 %f4, %f3, %f2;
add.s32 %r56, %r67, %r20;
mul.wide.s32 %rd21, %r56, 4;
add.s64 %rd22, %rd1, %rd21;
.loc 2 61 1
st.global.f32 [%rd22], %f4;
.loc 2 61 58
add.s32 %r67, %r1, %r67;
.loc 2 61 1
setp.lt.s32 %p9, %r67, %r7;
@%p9 bra BB55_11;
BB55_12:
.loc 2 61 58
add.s32 %r66, %r33, %r66;
.loc 2 61 1
setp.lt.s32 %p10, %r66, %r4;
@%p10 bra BB55_9;
BB55_13:
.loc 2 61 1
bar.sync 0;
.loc 2 61 1
mov.u32 %r59, %nctaid.x;
.loc 2 61 21
mad.lo.s32 %r63, %r59, %r1, %r63;
.loc 2 61 1
setp.lt.s32 %p11, %r63, %r27;
@%p11 bra BB55_3;
BB55_14:
.loc 2 61 1
mov.u32 %r60, %nctaid.y;
.loc 2 61 21
mad.lo.s32 %r62, %r60, %r33, %r62;
.loc 2 61 1
setp.lt.s32 %p12, %r62, %r28;
@%p12 bra BB55_1;
BB55_15:
.loc 2 61 2
ret;
}
.visible .entry map2_mul_float(
.param .u32 map2_mul_float_param_0,
.param .u32 map2_mul_float_param_1,
.param .u64 map2_mul_float_param_2,
.param .u32 map2_mul_float_param_3,
.param .u64 map2_mul_float_param_4,
.param .u32 map2_mul_float_param_5,
.param .u64 map2_mul_float_param_6,
.param .u32 map2_mul_float_param_7
)
{
.reg .pred %p<5>;
.reg .f32 %f<4>;
.reg .s32 %r<30>;
.reg .s64 %rd<13>;
ld.param.u32 %r13, [map2_mul_float_param_0];
ld.param.u32 %r14, [map2_mul_float_param_1];
ld.param.u64 %rd4, [map2_mul_float_param_2];
ld.param.u32 %r15, [map2_mul_float_param_3];
ld.param.u64 %rd5, [map2_mul_float_param_4];
ld.param.u32 %r16, [map2_mul_float_param_5];
ld.param.u64 %rd6, [map2_mul_float_param_6];
ld.param.u32 %r17, [map2_mul_float_param_7];
cvta.to.global.u64 %rd1, %rd4;
cvta.to.global.u64 %rd2, %rd6;
cvta.to.global.u64 %rd3, %rd5;
.loc 2 62 1
mov.u32 %r1, %ntid.x;
mov.u32 %r18, %ctaid.x;
mov.u32 %r19, %tid.x;
mad.lo.s32 %r28, %r1, %r18, %r19;
.loc 2 62 1
setp.ge.s32 %p1, %r28, %r14;
@%p1 bra BB56_6;
.loc 2 62 1
mov.u32 %r20, %tid.y;
mov.u32 %r21, %ntid.y;
mov.u32 %r22, %ctaid.y;
mad.lo.s32 %r3, %r21, %r22, %r20;
.loc 2 62 22
mov.u32 %r23, %nctaid.x;
mul.lo.s32 %r4, %r23, %r1;
.loc 2 62 22
mov.u32 %r24, %nctaid.y;
mul.lo.s32 %r5, %r24, %r21;
BB56_2:
.loc 2 62 1
setp.ge.s32 %p2, %r3, %r13;
@%p2 bra BB56_5;
.loc 2 62 1
mul.lo.s32 %r7, %r28, %r16;
mul.lo.s32 %r8, %r28, %r17;
mul.lo.s32 %r9, %r28, %r15;
mov.u32 %r29, %r3;
BB56_4:
.loc 2 62 1
mov.u32 %r10, %r29;
add.s32 %r25, %r10, %r7;
mul.wide.s32 %rd7, %r25, 4;
add.s64 %rd8, %rd3, %rd7;
.loc 2 62 1
add.s32 %r26, %r10, %r8;
mul.wide.s32 %rd9, %r26, 4;
add.s64 %rd10, %rd2, %rd9;
.loc 2 62 1
ld.global.f32 %f1, [%rd10];
ld.global.f32 %f2, [%rd8];
mul.f32 %f3, %f2, %f1;
add.s32 %r27, %r10, %r9;
mul.wide.s32 %rd11, %r27, 4;
add.s64 %rd12, %rd1, %rd11;
.loc 2 62 1
st.global.f32 [%rd12], %f3;
.loc 2 62 22
add.s32 %r11, %r5, %r10;
.loc 2 62 1
setp.lt.s32 %p3, %r11, %r13;
mov.u32 %r29, %r11;
@%p3 bra BB56_4;
BB56_5:
.loc 2 62 22
add.s32 %r28, %r4, %r28;
.loc 2 62 1
setp.lt.s32 %p4, %r28, %r14;
@%p4 bra BB56_2;
BB56_6:
.loc 2 62 2
ret;
}
.visible .entry map2_v_s_mul_float(
.param .u32 map2_v_s_mul_float_param_0,
.param .u32 map2_v_s_mul_float_param_1,
.param .u64 map2_v_s_mul_float_param_2,
.param .u32 map2_v_s_mul_float_param_3,
.param .u64 map2_v_s_mul_float_param_4,
.param .u32 map2_v_s_mul_float_param_5,
.param .f32 map2_v_s_mul_float_param_6
)
{
.reg .pred %p<5>;
.reg .f32 %f<4>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map2_v_s_mul_float_param_0];
ld.param.u32 %r13, [map2_v_s_mul_float_param_1];
ld.param.u64 %rd3, [map2_v_s_mul_float_param_2];
ld.param.u32 %r14, [map2_v_s_mul_float_param_3];
ld.param.u64 %rd4, [map2_v_s_mul_float_param_4];
ld.param.u32 %r15, [map2_v_s_mul_float_param_5];
ld.param.f32 %f1, [map2_v_s_mul_float_param_6];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 62 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 62 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB57_6;
.loc 2 62 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 62 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 62 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB57_2:
.loc 2 62 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB57_5;
.loc 2 62 1
mul.lo.s32 %r7, %r25, %r15;
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB57_4:
.loc 2 62 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 62 1
ld.global.f32 %f2, [%rd6];
mul.f32 %f3, %f2, %f1;
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 62 1
st.global.f32 [%rd8], %f3;
.loc 2 62 22
add.s32 %r10, %r5, %r9;
.loc 2 62 1
setp.lt.s32 %p3, %r10, %r12;
mov.u32 %r26, %r10;
@%p3 bra BB57_4;
BB57_5:
.loc 2 62 22
add.s32 %r25, %r4, %r25;
.loc 2 62 1
setp.lt.s32 %p4, %r25, %r13;
@%p4 bra BB57_2;
BB57_6:
.loc 2 62 2
ret;
}
.visible .entry map2_s_v_mul_float(
.param .u32 map2_s_v_mul_float_param_0,
.param .u32 map2_s_v_mul_float_param_1,
.param .u64 map2_s_v_mul_float_param_2,
.param .u32 map2_s_v_mul_float_param_3,
.param .f32 map2_s_v_mul_float_param_4,
.param .u64 map2_s_v_mul_float_param_5,
.param .u32 map2_s_v_mul_float_param_6
)
{
.reg .pred %p<5>;
.reg .f32 %f<4>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map2_s_v_mul_float_param_0];
ld.param.u32 %r13, [map2_s_v_mul_float_param_1];
ld.param.u64 %rd3, [map2_s_v_mul_float_param_2];
ld.param.u32 %r14, [map2_s_v_mul_float_param_3];
ld.param.f32 %f1, [map2_s_v_mul_float_param_4];
ld.param.u64 %rd4, [map2_s_v_mul_float_param_5];
ld.param.u32 %r15, [map2_s_v_mul_float_param_6];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 62 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 62 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB58_6;
.loc 2 62 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 62 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 62 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB58_2:
.loc 2 62 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB58_5;
.loc 2 62 1
mul.lo.s32 %r7, %r25, %r15;
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB58_4:
.loc 2 62 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 62 1
ld.global.f32 %f2, [%rd6];
mul.f32 %f3, %f2, %f1;
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 62 1
st.global.f32 [%rd8], %f3;
.loc 2 62 22
add.s32 %r10, %r5, %r9;
.loc 2 62 1
setp.lt.s32 %p3, %r10, %r12;
mov.u32 %r26, %r10;
@%p3 bra BB58_4;
BB58_5:
.loc 2 62 22
add.s32 %r25, %r4, %r25;
.loc 2 62 1
setp.lt.s32 %p4, %r25, %r13;
@%p4 bra BB58_2;
BB58_6:
.loc 2 62 2
ret;
}
.visible .entry map2_transpose_mul_float(
.param .u32 map2_transpose_mul_float_param_0,
.param .u32 map2_transpose_mul_float_param_1,
.param .u64 map2_transpose_mul_float_param_2,
.param .u32 map2_transpose_mul_float_param_3,
.param .u64 map2_transpose_mul_float_param_4,
.param .u32 map2_transpose_mul_float_param_5,
.param .u64 map2_transpose_mul_float_param_6,
.param .u32 map2_transpose_mul_float_param_7
)
{
.reg .pred %p<13>;
.reg .f32 %f<5>;
.reg .s32 %r<68>;
.reg .s64 %rd<23>;
// demoted variable
.shared .align 4 .b8 map2_transpose_mul_float$__cuda_local_var_32578_1730_non_const_tile[4224];
ld.param.u32 %r27, [map2_transpose_mul_float_param_0];
ld.param.u32 %r28, [map2_transpose_mul_float_param_1];
ld.param.u64 %rd4, [map2_transpose_mul_float_param_2];
ld.param.u32 %r29, [map2_transpose_mul_float_param_3];
ld.param.u64 %rd5, [map2_transpose_mul_float_param_4];
ld.param.u32 %r30, [map2_transpose_mul_float_param_5];
ld.param.u64 %rd6, [map2_transpose_mul_float_param_6];
ld.param.u32 %r31, [map2_transpose_mul_float_param_7];
cvta.to.global.u64 %rd1, %rd4;
cvta.to.global.u64 %rd2, %rd5;
cvta.to.global.u64 %rd3, %rd6;
.loc 2 62 1
mov.u32 %r1, %ntid.x;
mov.u32 %r32, %ctaid.y;
mov.u32 %r33, %ntid.y;
mul.lo.s32 %r62, %r32, %r33;
.loc 2 62 1
setp.ge.s32 %p2, %r62, %r28;
@%p2 bra BB59_15;
BB59_1:
.loc 2 62 1
mov.u32 %r35, %ctaid.x;
mul.lo.s32 %r63, %r35, %r1;
.loc 2 62 1
setp.ge.s32 %p3, %r63, %r27;
@%p3 bra BB59_14;
.loc 2 62 1
add.s32 %r37, %r62, 32;
.loc 4 2621 10
min.s32 %r4, %r28, %r37;
BB59_3:
.loc 2 62 1
add.s32 %r40, %r63, 32;
.loc 4 2621 10
min.s32 %r7, %r27, %r40;
.loc 2 62 1
mov.u32 %r41, %tid.y;
add.s32 %r64, %r41, %r63;
.loc 2 62 1
setp.ge.s32 %p4, %r64, %r7;
@%p4 bra BB59_8;
BB59_4:
.loc 2 62 1
mov.u32 %r42, %tid.x;
.loc 2 62 1
add.s32 %r65, %r42, %r62;
.loc 2 62 1
setp.ge.s32 %p5, %r65, %r4;
@%p5 bra BB59_7;
.loc 2 62 1
mul.lo.s32 %r10, %r64, %r31;
sub.s32 %r11, %r64, %r63;
BB59_6:
add.s32 %r45, %r65, %r10;
mul.wide.s32 %rd7, %r45, 4;
add.s64 %rd8, %rd3, %rd7;
.loc 2 62 1
sub.s32 %r46, %r65, %r62;
mul.wide.s32 %rd9, %r11, 132;
mov.u64 %rd10, map2_transpose_mul_float$__cuda_local_var_32578_1730_non_const_tile;
add.s64 %rd11, %rd10, %rd9;
mul.wide.s32 %rd12, %r46, 4;
add.s64 %rd13, %rd11, %rd12;
.loc 2 62 1
ld.global.f32 %f1, [%rd8];
st.shared.f32 [%rd13], %f1;
.loc 2 62 58
add.s32 %r65, %r1, %r65;
.loc 2 62 1
setp.lt.s32 %p6, %r65, %r4;
@%p6 bra BB59_6;
BB59_7:
.loc 2 62 58
add.s32 %r64, %r33, %r64;
.loc 2 62 1
setp.lt.s32 %p7, %r64, %r7;
@%p7 bra BB59_4;
BB59_8:
.loc 2 62 1
add.s32 %r66, %r41, %r62;
setp.lt.s32 %p1, %r66, %r4;
.loc 2 62 1
bar.sync 0;
.loc 2 62 1
@!%p1 bra BB59_13;
bra.uni BB59_9;
BB59_9:
.loc 2 62 1
mov.u32 %r51, %tid.x;
add.s32 %r67, %r51, %r63;
.loc 2 62 1
setp.ge.s32 %p8, %r67, %r7;
@%p8 bra BB59_12;
.loc 2 62 1
mul.lo.s32 %r18, %r66, %r30;
sub.s32 %r19, %r66, %r62;
mul.lo.s32 %r20, %r66, %r29;
BB59_11:
add.s32 %r54, %r67, %r18;
mul.wide.s32 %rd14, %r54, 4;
add.s64 %rd15, %rd2, %rd14;
.loc 2 62 1
sub.s32 %r55, %r67, %r63;
mul.wide.s32 %rd16, %r55, 132;
mov.u64 %rd17, map2_transpose_mul_float$__cuda_local_var_32578_1730_non_const_tile;
add.s64 %rd18, %rd17, %rd16;
mul.wide.s32 %rd19, %r19, 4;
add.s64 %rd20, %rd18, %rd19;
.loc 2 62 1
ld.shared.f32 %f2, [%rd20];
ld.global.f32 %f3, [%rd15];
mul.f32 %f4, %f3, %f2;
add.s32 %r56, %r67, %r20;
mul.wide.s32 %rd21, %r56, 4;
add.s64 %rd22, %rd1, %rd21;
.loc 2 62 1
st.global.f32 [%rd22], %f4;
.loc 2 62 58
add.s32 %r67, %r1, %r67;
.loc 2 62 1
setp.lt.s32 %p9, %r67, %r7;
@%p9 bra BB59_11;
BB59_12:
.loc 2 62 58
add.s32 %r66, %r33, %r66;
.loc 2 62 1
setp.lt.s32 %p10, %r66, %r4;
@%p10 bra BB59_9;
BB59_13:
.loc 2 62 1
bar.sync 0;
.loc 2 62 1
mov.u32 %r59, %nctaid.x;
.loc 2 62 21
mad.lo.s32 %r63, %r59, %r1, %r63;
.loc 2 62 1
setp.lt.s32 %p11, %r63, %r27;
@%p11 bra BB59_3;
BB59_14:
.loc 2 62 1
mov.u32 %r60, %nctaid.y;
.loc 2 62 21
mad.lo.s32 %r62, %r60, %r33, %r62;
.loc 2 62 1
setp.lt.s32 %p12, %r62, %r28;
@%p12 bra BB59_1;
BB59_15:
.loc 2 62 2
ret;
}
.visible .entry map2_div_float(
.param .u32 map2_div_float_param_0,
.param .u32 map2_div_float_param_1,
.param .u64 map2_div_float_param_2,
.param .u32 map2_div_float_param_3,
.param .u64 map2_div_float_param_4,
.param .u32 map2_div_float_param_5,
.param .u64 map2_div_float_param_6,
.param .u32 map2_div_float_param_7
)
{
.reg .pred %p<5>;
.reg .f32 %f<4>;
.reg .s32 %r<30>;
.reg .s64 %rd<13>;
ld.param.u32 %r13, [map2_div_float_param_0];
ld.param.u32 %r14, [map2_div_float_param_1];
ld.param.u64 %rd4, [map2_div_float_param_2];
ld.param.u32 %r15, [map2_div_float_param_3];
ld.param.u64 %rd5, [map2_div_float_param_4];
ld.param.u32 %r16, [map2_div_float_param_5];
ld.param.u64 %rd6, [map2_div_float_param_6];
ld.param.u32 %r17, [map2_div_float_param_7];
cvta.to.global.u64 %rd1, %rd4;
cvta.to.global.u64 %rd2, %rd6;
cvta.to.global.u64 %rd3, %rd5;
.loc 2 63 1
mov.u32 %r1, %ntid.x;
mov.u32 %r18, %ctaid.x;
mov.u32 %r19, %tid.x;
mad.lo.s32 %r28, %r1, %r18, %r19;
.loc 2 63 1
setp.ge.s32 %p1, %r28, %r14;
@%p1 bra BB60_6;
.loc 2 63 1
mov.u32 %r20, %tid.y;
mov.u32 %r21, %ntid.y;
mov.u32 %r22, %ctaid.y;
mad.lo.s32 %r3, %r21, %r22, %r20;
.loc 2 63 22
mov.u32 %r23, %nctaid.x;
mul.lo.s32 %r4, %r23, %r1;
.loc 2 63 22
mov.u32 %r24, %nctaid.y;
mul.lo.s32 %r5, %r24, %r21;
BB60_2:
.loc 2 63 1
setp.ge.s32 %p2, %r3, %r13;
@%p2 bra BB60_5;
.loc 2 63 1
mul.lo.s32 %r7, %r28, %r16;
mul.lo.s32 %r8, %r28, %r17;
.loc 2 63 50
mul.lo.s32 %r9, %r28, %r15;
mov.u32 %r29, %r3;
BB60_4:
.loc 2 63 1
mov.u32 %r10, %r29;
add.s32 %r25, %r10, %r7;
mul.wide.s32 %rd7, %r25, 4;
add.s64 %rd8, %rd3, %rd7;
.loc 2 63 1
add.s32 %r26, %r10, %r8;
mul.wide.s32 %rd9, %r26, 4;
add.s64 %rd10, %rd2, %rd9;
.loc 2 63 1
ld.global.f32 %f1, [%rd10];
ld.global.f32 %f2, [%rd8];
.loc 4 3608 3
div.rn.f32 %f3, %f2, %f1;
.loc 2 63 50
add.s32 %r27, %r10, %r9;
mul.wide.s32 %rd11, %r27, 4;
add.s64 %rd12, %rd1, %rd11;
.loc 2 63 50
st.global.f32 [%rd12], %f3;
.loc 2 63 22
add.s32 %r11, %r5, %r10;
.loc 2 63 1
setp.lt.s32 %p3, %r11, %r13;
mov.u32 %r29, %r11;
@%p3 bra BB60_4;
BB60_5:
.loc 2 63 22
add.s32 %r28, %r4, %r28;
.loc 2 63 1
setp.lt.s32 %p4, %r28, %r14;
@%p4 bra BB60_2;
BB60_6:
.loc 2 63 2
ret;
}
.visible .entry map2_v_s_div_float(
.param .u32 map2_v_s_div_float_param_0,
.param .u32 map2_v_s_div_float_param_1,
.param .u64 map2_v_s_div_float_param_2,
.param .u32 map2_v_s_div_float_param_3,
.param .u64 map2_v_s_div_float_param_4,
.param .u32 map2_v_s_div_float_param_5,
.param .f32 map2_v_s_div_float_param_6
)
{
.reg .pred %p<5>;
.reg .f32 %f<4>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map2_v_s_div_float_param_0];
ld.param.u32 %r13, [map2_v_s_div_float_param_1];
ld.param.u64 %rd3, [map2_v_s_div_float_param_2];
ld.param.u32 %r14, [map2_v_s_div_float_param_3];
ld.param.u64 %rd4, [map2_v_s_div_float_param_4];
ld.param.u32 %r15, [map2_v_s_div_float_param_5];
ld.param.f32 %f1, [map2_v_s_div_float_param_6];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 63 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 63 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB61_6;
.loc 2 63 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 63 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 63 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB61_2:
.loc 2 63 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB61_5;
.loc 2 63 1
mul.lo.s32 %r7, %r25, %r15;
.loc 2 63 50
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB61_4:
.loc 2 63 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 63 1
ld.global.f32 %f2, [%rd6];
.loc 4 3608 3
div.rn.f32 %f3, %f2, %f1;
.loc 2 63 50
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 63 50
st.global.f32 [%rd8], %f3;
.loc 2 63 22
add.s32 %r10, %r5, %r9;
.loc 2 63 1
setp.lt.s32 %p3, %r10, %r12;
mov.u32 %r26, %r10;
@%p3 bra BB61_4;
BB61_5:
.loc 2 63 22
add.s32 %r25, %r4, %r25;
.loc 2 63 1
setp.lt.s32 %p4, %r25, %r13;
@%p4 bra BB61_2;
BB61_6:
.loc 2 63 2
ret;
}
.visible .entry map2_s_v_div_float(
.param .u32 map2_s_v_div_float_param_0,
.param .u32 map2_s_v_div_float_param_1,
.param .u64 map2_s_v_div_float_param_2,
.param .u32 map2_s_v_div_float_param_3,
.param .f32 map2_s_v_div_float_param_4,
.param .u64 map2_s_v_div_float_param_5,
.param .u32 map2_s_v_div_float_param_6
)
{
.reg .pred %p<5>;
.reg .f32 %f<4>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map2_s_v_div_float_param_0];
ld.param.u32 %r13, [map2_s_v_div_float_param_1];
ld.param.u64 %rd3, [map2_s_v_div_float_param_2];
ld.param.u32 %r14, [map2_s_v_div_float_param_3];
ld.param.f32 %f1, [map2_s_v_div_float_param_4];
ld.param.u64 %rd4, [map2_s_v_div_float_param_5];
ld.param.u32 %r15, [map2_s_v_div_float_param_6];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 63 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 63 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB62_6;
.loc 2 63 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 63 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 63 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB62_2:
.loc 2 63 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB62_5;
.loc 2 63 1
mul.lo.s32 %r7, %r25, %r15;
.loc 2 63 50
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB62_4:
.loc 2 63 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 63 1
ld.global.f32 %f2, [%rd6];
.loc 4 3608 3
div.rn.f32 %f3, %f1, %f2;
.loc 2 63 50
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 63 50
st.global.f32 [%rd8], %f3;
.loc 2 63 22
add.s32 %r10, %r5, %r9;
.loc 2 63 1
setp.lt.s32 %p3, %r10, %r12;
mov.u32 %r26, %r10;
@%p3 bra BB62_4;
BB62_5:
.loc 2 63 22
add.s32 %r25, %r4, %r25;
.loc 2 63 1
setp.lt.s32 %p4, %r25, %r13;
@%p4 bra BB62_2;
BB62_6:
.loc 2 63 2
ret;
}
.visible .entry map2_transpose_div_float(
.param .u32 map2_transpose_div_float_param_0,
.param .u32 map2_transpose_div_float_param_1,
.param .u64 map2_transpose_div_float_param_2,
.param .u32 map2_transpose_div_float_param_3,
.param .u64 map2_transpose_div_float_param_4,
.param .u32 map2_transpose_div_float_param_5,
.param .u64 map2_transpose_div_float_param_6,
.param .u32 map2_transpose_div_float_param_7
)
{
.reg .pred %p<13>;
.reg .f32 %f<5>;
.reg .s32 %r<68>;
.reg .s64 %rd<23>;
// demoted variable
.shared .align 4 .b8 map2_transpose_div_float$__cuda_local_var_32579_1730_non_const_tile[4224];
ld.param.u32 %r27, [map2_transpose_div_float_param_0];
ld.param.u32 %r28, [map2_transpose_div_float_param_1];
ld.param.u64 %rd4, [map2_transpose_div_float_param_2];
ld.param.u32 %r29, [map2_transpose_div_float_param_3];
ld.param.u64 %rd5, [map2_transpose_div_float_param_4];
ld.param.u32 %r30, [map2_transpose_div_float_param_5];
ld.param.u64 %rd6, [map2_transpose_div_float_param_6];
ld.param.u32 %r31, [map2_transpose_div_float_param_7];
cvta.to.global.u64 %rd1, %rd4;
cvta.to.global.u64 %rd2, %rd5;
cvta.to.global.u64 %rd3, %rd6;
.loc 2 63 1
mov.u32 %r1, %ntid.x;
mov.u32 %r32, %ctaid.y;
mov.u32 %r33, %ntid.y;
mul.lo.s32 %r62, %r32, %r33;
.loc 2 63 1
setp.ge.s32 %p2, %r62, %r28;
@%p2 bra BB63_15;
BB63_1:
.loc 2 63 1
mov.u32 %r35, %ctaid.x;
mul.lo.s32 %r63, %r35, %r1;
.loc 2 63 1
setp.ge.s32 %p3, %r63, %r27;
@%p3 bra BB63_14;
.loc 2 63 1
add.s32 %r37, %r62, 32;
.loc 4 2621 10
min.s32 %r4, %r28, %r37;
BB63_3:
.loc 2 63 1
add.s32 %r40, %r63, 32;
.loc 4 2621 10
min.s32 %r7, %r27, %r40;
.loc 2 63 1
mov.u32 %r41, %tid.y;
add.s32 %r64, %r41, %r63;
.loc 2 63 1
setp.ge.s32 %p4, %r64, %r7;
@%p4 bra BB63_8;
BB63_4:
.loc 2 63 1
mov.u32 %r42, %tid.x;
.loc 2 63 1
add.s32 %r65, %r42, %r62;
.loc 2 63 1
setp.ge.s32 %p5, %r65, %r4;
@%p5 bra BB63_7;
.loc 2 63 1
mul.lo.s32 %r10, %r64, %r31;
sub.s32 %r11, %r64, %r63;
BB63_6:
add.s32 %r45, %r65, %r10;
mul.wide.s32 %rd7, %r45, 4;
add.s64 %rd8, %rd3, %rd7;
.loc 2 63 1
sub.s32 %r46, %r65, %r62;
mul.wide.s32 %rd9, %r11, 132;
mov.u64 %rd10, map2_transpose_div_float$__cuda_local_var_32579_1730_non_const_tile;
add.s64 %rd11, %rd10, %rd9;
mul.wide.s32 %rd12, %r46, 4;
add.s64 %rd13, %rd11, %rd12;
.loc 2 63 1
ld.global.f32 %f1, [%rd8];
st.shared.f32 [%rd13], %f1;
.loc 2 63 58
add.s32 %r65, %r1, %r65;
.loc 2 63 1
setp.lt.s32 %p6, %r65, %r4;
@%p6 bra BB63_6;
BB63_7:
.loc 2 63 58
add.s32 %r64, %r33, %r64;
.loc 2 63 1
setp.lt.s32 %p7, %r64, %r7;
@%p7 bra BB63_4;
BB63_8:
.loc 2 63 1
add.s32 %r66, %r41, %r62;
setp.lt.s32 %p1, %r66, %r4;
.loc 2 63 1
bar.sync 0;
.loc 2 63 1
@!%p1 bra BB63_13;
bra.uni BB63_9;
BB63_9:
.loc 2 63 1
mov.u32 %r51, %tid.x;
add.s32 %r67, %r51, %r63;
.loc 2 63 1
setp.ge.s32 %p8, %r67, %r7;
@%p8 bra BB63_12;
.loc 2 63 1
mul.lo.s32 %r18, %r66, %r30;
sub.s32 %r19, %r66, %r62;
.loc 2 63 46
mul.lo.s32 %r20, %r66, %r29;
BB63_11:
.loc 2 63 1
add.s32 %r54, %r67, %r18;
mul.wide.s32 %rd14, %r54, 4;
add.s64 %rd15, %rd2, %rd14;
.loc 2 63 1
sub.s32 %r55, %r67, %r63;
mul.wide.s32 %rd16, %r55, 132;
mov.u64 %rd17, map2_transpose_div_float$__cuda_local_var_32579_1730_non_const_tile;
add.s64 %rd18, %rd17, %rd16;
mul.wide.s32 %rd19, %r19, 4;
add.s64 %rd20, %rd18, %rd19;
.loc 2 63 1
ld.shared.f32 %f2, [%rd20];
ld.global.f32 %f3, [%rd15];
.loc 4 3608 3
div.rn.f32 %f4, %f3, %f2;
.loc 2 63 46
add.s32 %r56, %r67, %r20;
mul.wide.s32 %rd21, %r56, 4;
add.s64 %rd22, %rd1, %rd21;
.loc 2 63 46
st.global.f32 [%rd22], %f4;
.loc 2 63 58
add.s32 %r67, %r1, %r67;
.loc 2 63 1
setp.lt.s32 %p9, %r67, %r7;
@%p9 bra BB63_11;
BB63_12:
.loc 2 63 58
add.s32 %r66, %r33, %r66;
.loc 2 63 1
setp.lt.s32 %p10, %r66, %r4;
@%p10 bra BB63_9;
BB63_13:
.loc 2 63 1
bar.sync 0;
.loc 2 63 1
mov.u32 %r59, %nctaid.x;
.loc 2 63 21
mad.lo.s32 %r63, %r59, %r1, %r63;
.loc 2 63 1
setp.lt.s32 %p11, %r63, %r27;
@%p11 bra BB63_3;
BB63_14:
.loc 2 63 1
mov.u32 %r60, %nctaid.y;
.loc 2 63 21
mad.lo.s32 %r62, %r60, %r33, %r62;
.loc 2 63 1
setp.lt.s32 %p12, %r62, %r28;
@%p12 bra BB63_1;
BB63_15:
.loc 2 63 2
ret;
}
.visible .entry map2_mod_float(
.param .u32 map2_mod_float_param_0,
.param .u32 map2_mod_float_param_1,
.param .u64 map2_mod_float_param_2,
.param .u32 map2_mod_float_param_3,
.param .u64 map2_mod_float_param_4,
.param .u32 map2_mod_float_param_5,
.param .u64 map2_mod_float_param_6,
.param .u32 map2_mod_float_param_7
)
{
.reg .pred %p<23>;
.reg .f32 %f<48>;
.reg .s32 %r<51>;
.reg .s64 %rd<13>;
ld.param.u32 %r12, [map2_mod_float_param_0];
ld.param.u32 %r13, [map2_mod_float_param_1];
ld.param.u64 %rd1, [map2_mod_float_param_2];
ld.param.u32 %r14, [map2_mod_float_param_3];
ld.param.u64 %rd2, [map2_mod_float_param_4];
ld.param.u32 %r15, [map2_mod_float_param_5];
ld.param.u64 %rd3, [map2_mod_float_param_6];
ld.param.u32 %r16, [map2_mod_float_param_7];
.loc 2 64 1
mov.u32 %r17, %tid.x;
mov.u32 %r18, %ntid.x;
mov.u32 %r19, %ctaid.x;
mad.lo.s32 %r49, %r18, %r19, %r17;
.loc 2 64 1
setp.ge.s32 %p1, %r49, %r13;
@%p1 bra BB64_20;
.loc 2 64 1
mov.u32 %r20, %ntid.y;
.loc 2 64 22
mov.u32 %r21, %nctaid.y;
mul.lo.s32 %r2, %r21, %r20;
cvta.to.global.u64 %rd4, %rd2;
cvta.to.global.u64 %rd7, %rd3;
cvta.to.global.u64 %rd10, %rd1;
BB64_2:
.loc 2 64 1
mov.u32 %r22, %ctaid.y;
mov.u32 %r24, %tid.y;
mad.lo.s32 %r50, %r20, %r22, %r24;
.loc 2 64 1
setp.ge.s32 %p2, %r50, %r12;
@%p2 bra BB64_19;
.loc 2 64 1
mul.lo.s32 %r4, %r49, %r15;
mul.lo.s32 %r5, %r49, %r16;
BB64_4:
add.s32 %r29, %r50, %r4;
mul.wide.s32 %rd5, %r29, 4;
add.s64 %rd6, %rd4, %rd5;
.loc 2 64 1
add.s32 %r30, %r50, %r5;
mul.wide.s32 %rd8, %r30, 4;
add.s64 %rd9, %rd7, %rd8;
.loc 2 64 1
ld.global.f32 %f1, [%rd6];
.loc 3 8651 10
abs.f32 %f46, %f1;
.loc 2 64 1
ld.global.f32 %f3, [%rd9];
.loc 3 8651 10
abs.f32 %f4, %f3;
setp.eq.f32 %p3, %f46, 0f7F800000;
setp.eq.f32 %p4, %f4, 0f00000000;
or.pred %p5, %p3, %p4;
@!%p5 bra BB64_6;
bra.uni BB64_5;
BB64_5:
mov.f32 %f47, 0f7FFFFFFF;
bra.uni BB64_18;
BB64_6:
.loc 3 8651 10
setp.ltu.f32 %p6, %f46, %f4;
@%p6 bra BB64_17;
lg2.approx.f32 %f20, %f46;
cvt.rzi.s32.f32 %r31, %f20;
lg2.approx.f32 %f21, %f4;
cvt.rzi.s32.f32 %r32, %f21;
sub.s32 %r8, %r31, %r32;
abs.f32 %f5, %f4;
setp.eq.f32 %p7, %f5, 0f00000000;
setp.eq.f32 %p8, %f5, 0f7F800000;
or.pred %p9, %p7, %p8;
setp.eq.s32 %p10, %r31, %r32;
or.pred %p11, %p9, %p10;
@%p11 bra BB64_13;
abs.s32 %r9, %r8;
setp.lt.s32 %p12, %r9, 126;
@%p12 bra BB64_12;
setp.lt.s32 %p13, %r9, 252;
@%p13 bra BB64_11;
shr.s32 %r33, %r8, 31;
shr.u32 %r34, %r33, 30;
add.s32 %r35, %r8, %r34;
shr.s32 %r36, %r35, 2;
cvt.rn.f32.s32 %f23, %r36;
// inline asm
ex2.approx.ftz.f32 %f22,%f23;
// inline asm
mul.f32 %f26, %f4, %f22;
mul.f32 %f27, %f26, %f22;
mul.f32 %f28, %f27, %f22;
mad.lo.s32 %r37, %r36, -3, %r8;
cvt.rn.f32.s32 %f25, %r37;
// inline asm
ex2.approx.ftz.f32 %f24,%f25;
// inline asm
mul.f32 %f44, %f28, %f24;
bra.uni BB64_14;
BB64_11:
.loc 3 8651 10
shr.u32 %r38, %r8, 31;
add.s32 %r39, %r8, %r38;
shr.s32 %r40, %r39, 1;
cvt.rn.f32.s32 %f30, %r40;
// inline asm
ex2.approx.ftz.f32 %f29,%f30;
// inline asm
mul.f32 %f33, %f4, %f29;
sub.s32 %r41, %r8, %r40;
cvt.rn.f32.s32 %f32, %r41;
// inline asm
ex2.approx.ftz.f32 %f31,%f32;
// inline asm
mul.f32 %f44, %f33, %f31;
bra.uni BB64_14;
BB64_12:
.loc 3 8651 10
cvt.rn.f32.s32 %f35, %r8;
// inline asm
ex2.approx.ftz.f32 %f34,%f35;
// inline asm
mul.f32 %f44, %f4, %f34;
bra.uni BB64_14;
BB64_13:
.loc 3 8651 10
setp.leu.f32 %p14, %f5, 0f00000000;
add.f32 %f36, %f4, %f4;
selp.f32 %f44, %f36, %f4, %p14;
BB64_14:
mul.f32 %f37, %f46, 0f3F000000;
setp.gtu.f32 %p15, %f44, %f37;
add.f32 %f38, %f44, %f44;
selp.f32 %f45, %f44, %f38, %p15;
setp.ltu.f32 %p16, %f45, %f4;
@%p16 bra BB64_16;
BB64_15:
sub.f32 %f39, %f46, %f45;
setp.ltu.f32 %p17, %f46, %f45;
selp.f32 %f46, %f46, %f39, %p17;
mul.f32 %f45, %f45, 0f3F000000;
setp.ge.f32 %p18, %f45, %f4;
@%p18 bra BB64_15;
BB64_16:
mov.b32 %r42, %f1;
and.b32 %r43, %r42, -2147483648;
mov.b32 %r44, %f46;
or.b32 %r45, %r44, %r43;
mov.b32 %f47, %r45;
bra.uni BB64_18;
BB64_17:
.loc 3 8651 10
setp.gtu.f32 %p19, %f4, 0f7F800000;
add.f32 %f40, %f1, %f3;
selp.f32 %f41, %f40, %f1, %p19;
add.f32 %f42, %f41, %f1;
setp.leu.f32 %p20, %f46, 0f00000000;
selp.f32 %f47, %f42, %f41, %p20;
BB64_18:
.loc 2 64 155
mad.lo.s32 %r46, %r49, %r14, %r50;
mul.wide.s32 %rd11, %r46, 4;
add.s64 %rd12, %rd10, %rd11;
.loc 2 64 155
st.global.f32 [%rd12], %f47;
.loc 2 64 22
add.s32 %r50, %r2, %r50;
.loc 2 64 1
setp.lt.s32 %p21, %r50, %r12;
@%p21 bra BB64_4;
BB64_19:
.loc 2 64 22
mov.u32 %r47, %nctaid.x;
mad.lo.s32 %r49, %r47, %r18, %r49;
.loc 2 64 1
setp.lt.s32 %p22, %r49, %r13;
@%p22 bra BB64_2;
BB64_20:
.loc 2 64 2
ret;
}
.visible .entry map2_v_s_mod_float(
.param .u32 map2_v_s_mod_float_param_0,
.param .u32 map2_v_s_mod_float_param_1,
.param .u64 map2_v_s_mod_float_param_2,
.param .u32 map2_v_s_mod_float_param_3,
.param .u64 map2_v_s_mod_float_param_4,
.param .u32 map2_v_s_mod_float_param_5,
.param .f32 map2_v_s_mod_float_param_6
)
{
.reg .pred %p<23>;
.reg .f32 %f<48>;
.reg .s32 %r<49>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map2_v_s_mod_float_param_0];
ld.param.u32 %r13, [map2_v_s_mod_float_param_1];
ld.param.u64 %rd1, [map2_v_s_mod_float_param_2];
ld.param.u32 %r14, [map2_v_s_mod_float_param_3];
ld.param.u64 %rd2, [map2_v_s_mod_float_param_4];
ld.param.u32 %r15, [map2_v_s_mod_float_param_5];
ld.param.f32 %f19, [map2_v_s_mod_float_param_6];
.loc 2 64 1
mov.u32 %r16, %tid.x;
mov.u32 %r17, %ntid.x;
mov.u32 %r18, %ctaid.x;
mad.lo.s32 %r47, %r17, %r18, %r16;
.loc 2 64 1
setp.ge.s32 %p1, %r47, %r13;
@%p1 bra BB65_20;
.loc 2 64 1
mov.u32 %r19, %ntid.y;
.loc 2 64 22
mov.u32 %r20, %nctaid.y;
mul.lo.s32 %r2, %r20, %r19;
cvta.to.global.u64 %rd3, %rd2;
cvta.to.global.u64 %rd6, %rd1;
BB65_2:
.loc 2 64 1
mov.u32 %r21, %ctaid.y;
mov.u32 %r23, %tid.y;
mad.lo.s32 %r48, %r19, %r21, %r23;
.loc 2 64 1
setp.ge.s32 %p2, %r48, %r12;
@%p2 bra BB65_19;
.loc 2 64 1
mul.lo.s32 %r4, %r47, %r15;
.loc 3 8651 10
abs.f32 %f1, %f19;
.loc 2 64 98
mul.lo.s32 %r5, %r47, %r14;
BB65_4:
.loc 2 64 1
add.s32 %r28, %r48, %r4;
mul.wide.s32 %rd4, %r28, 4;
add.s64 %rd5, %rd3, %rd4;
.loc 2 64 1
ld.global.f32 %f2, [%rd5];
.loc 3 8651 10
abs.f32 %f46, %f2;
setp.eq.f32 %p3, %f46, 0f7F800000;
setp.eq.f32 %p4, %f1, 0f00000000;
.loc 3 8651 10
or.pred %p5, %p3, %p4;
@!%p5 bra BB65_6;
bra.uni BB65_5;
BB65_5:
mov.f32 %f47, 0f7FFFFFFF;
bra.uni BB65_18;
BB65_6:
.loc 3 8651 10
setp.ltu.f32 %p6, %f46, %f1;
@%p6 bra BB65_17;
lg2.approx.f32 %f20, %f46;
cvt.rzi.s32.f32 %r29, %f20;
lg2.approx.f32 %f21, %f1;
cvt.rzi.s32.f32 %r30, %f21;
sub.s32 %r8, %r29, %r30;
abs.f32 %f4, %f1;
setp.eq.f32 %p7, %f4, 0f00000000;
setp.eq.f32 %p8, %f4, 0f7F800000;
or.pred %p9, %p7, %p8;
setp.eq.s32 %p10, %r29, %r30;
or.pred %p11, %p9, %p10;
@%p11 bra BB65_13;
abs.s32 %r9, %r8;
setp.lt.s32 %p12, %r9, 126;
@%p12 bra BB65_12;
setp.lt.s32 %p13, %r9, 252;
@%p13 bra BB65_11;
shr.s32 %r31, %r8, 31;
shr.u32 %r32, %r31, 30;
add.s32 %r33, %r8, %r32;
shr.s32 %r34, %r33, 2;
cvt.rn.f32.s32 %f23, %r34;
// inline asm
ex2.approx.ftz.f32 %f22,%f23;
// inline asm
mul.f32 %f26, %f1, %f22;
mul.f32 %f27, %f26, %f22;
mul.f32 %f28, %f27, %f22;
mad.lo.s32 %r35, %r34, -3, %r8;
cvt.rn.f32.s32 %f25, %r35;
// inline asm
ex2.approx.ftz.f32 %f24,%f25;
// inline asm
mul.f32 %f44, %f28, %f24;
bra.uni BB65_14;
BB65_11:
.loc 3 8651 10
shr.u32 %r36, %r8, 31;
add.s32 %r37, %r8, %r36;
shr.s32 %r38, %r37, 1;
cvt.rn.f32.s32 %f30, %r38;
// inline asm
ex2.approx.ftz.f32 %f29,%f30;
// inline asm
mul.f32 %f33, %f1, %f29;
sub.s32 %r39, %r8, %r38;
cvt.rn.f32.s32 %f32, %r39;
// inline asm
ex2.approx.ftz.f32 %f31,%f32;
// inline asm
mul.f32 %f44, %f33, %f31;
bra.uni BB65_14;
BB65_12:
.loc 3 8651 10
cvt.rn.f32.s32 %f35, %r8;
// inline asm
ex2.approx.ftz.f32 %f34,%f35;
// inline asm
mul.f32 %f44, %f1, %f34;
bra.uni BB65_14;
BB65_13:
.loc 3 8651 10
setp.leu.f32 %p14, %f4, 0f00000000;
add.f32 %f36, %f1, %f1;
selp.f32 %f44, %f36, %f1, %p14;
BB65_14:
mul.f32 %f37, %f46, 0f3F000000;
setp.gtu.f32 %p15, %f44, %f37;
add.f32 %f38, %f44, %f44;
selp.f32 %f45, %f44, %f38, %p15;
setp.ltu.f32 %p16, %f45, %f1;
@%p16 bra BB65_16;
BB65_15:
sub.f32 %f39, %f46, %f45;
setp.ltu.f32 %p17, %f46, %f45;
selp.f32 %f46, %f46, %f39, %p17;
mul.f32 %f45, %f45, 0f3F000000;
setp.ge.f32 %p18, %f45, %f1;
@%p18 bra BB65_15;
BB65_16:
mov.b32 %r40, %f2;
and.b32 %r41, %r40, -2147483648;
mov.b32 %r42, %f46;
or.b32 %r43, %r42, %r41;
mov.b32 %f47, %r43;
bra.uni BB65_18;
BB65_17:
setp.gtu.f32 %p19, %f1, 0f7F800000;
.loc 3 8651 10
add.f32 %f40, %f2, %f19;
selp.f32 %f41, %f40, %f2, %p19;
add.f32 %f42, %f41, %f2;
setp.leu.f32 %p20, %f46, 0f00000000;
selp.f32 %f47, %f42, %f41, %p20;
BB65_18:
.loc 2 64 98
add.s32 %r44, %r48, %r5;
mul.wide.s32 %rd7, %r44, 4;
add.s64 %rd8, %rd6, %rd7;
.loc 2 64 98
st.global.f32 [%rd8], %f47;
.loc 2 64 22
add.s32 %r48, %r2, %r48;
.loc 2 64 1
setp.lt.s32 %p21, %r48, %r12;
@%p21 bra BB65_4;
BB65_19:
.loc 2 64 22
mov.u32 %r45, %nctaid.x;
mad.lo.s32 %r47, %r45, %r17, %r47;
.loc 2 64 1
setp.lt.s32 %p22, %r47, %r13;
@%p22 bra BB65_2;
BB65_20:
.loc 2 64 2
ret;
}
.visible .entry map2_s_v_mod_float(
.param .u32 map2_s_v_mod_float_param_0,
.param .u32 map2_s_v_mod_float_param_1,
.param .u64 map2_s_v_mod_float_param_2,
.param .u32 map2_s_v_mod_float_param_3,
.param .f32 map2_s_v_mod_float_param_4,
.param .u64 map2_s_v_mod_float_param_5,
.param .u32 map2_s_v_mod_float_param_6
)
{
.reg .pred %p<23>;
.reg .f32 %f<51>;
.reg .s32 %r<49>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map2_s_v_mod_float_param_0];
ld.param.u32 %r13, [map2_s_v_mod_float_param_1];
ld.param.u64 %rd1, [map2_s_v_mod_float_param_2];
ld.param.u32 %r14, [map2_s_v_mod_float_param_3];
ld.param.f32 %f20, [map2_s_v_mod_float_param_4];
ld.param.u64 %rd2, [map2_s_v_mod_float_param_5];
ld.param.u32 %r15, [map2_s_v_mod_float_param_6];
.loc 2 64 1
mov.u32 %r16, %tid.x;
mov.u32 %r17, %ntid.x;
mov.u32 %r18, %ctaid.x;
mad.lo.s32 %r47, %r17, %r18, %r16;
.loc 2 64 1
setp.ge.s32 %p1, %r47, %r13;
@%p1 bra BB66_20;
.loc 2 64 1
mov.u32 %r19, %ntid.y;
.loc 2 64 22
mov.u32 %r20, %nctaid.y;
mul.lo.s32 %r2, %r20, %r19;
cvta.to.global.u64 %rd3, %rd2;
cvta.to.global.u64 %rd6, %rd1;
BB66_2:
.loc 2 64 1
mov.u32 %r21, %ctaid.y;
mov.u32 %r23, %tid.y;
mad.lo.s32 %r48, %r19, %r21, %r23;
.loc 2 64 1
setp.ge.s32 %p2, %r48, %r12;
@%p2 bra BB66_19;
.loc 2 64 1
mul.lo.s32 %r4, %r47, %r15;
.loc 2 64 98
mul.lo.s32 %r5, %r47, %r14;
.loc 3 8651 10
abs.f32 %f1, %f20;
mul.f32 %f2, %f1, 0f3F000000;
BB66_4:
.loc 2 64 1
add.s32 %r28, %r48, %r4;
mul.wide.s32 %rd4, %r28, 4;
add.s64 %rd5, %rd3, %rd4;
.loc 2 64 1
ld.global.f32 %f3, [%rd5];
.loc 3 8651 10
abs.f32 %f4, %f3;
setp.eq.f32 %p3, %f4, 0f00000000;
setp.eq.f32 %p4, %f1, 0f7F800000;
.loc 3 8651 10
or.pred %p5, %p4, %p3;
@!%p5 bra BB66_6;
bra.uni BB66_5;
BB66_5:
mov.f32 %f50, 0f7FFFFFFF;
bra.uni BB66_18;
BB66_6:
.loc 3 8651 10
setp.ltu.f32 %p6, %f1, %f4;
@%p6 bra BB66_17;
lg2.approx.f32 %f21, %f1;
cvt.rzi.s32.f32 %r29, %f21;
lg2.approx.f32 %f22, %f4;
cvt.rzi.s32.f32 %r30, %f22;
sub.s32 %r8, %r29, %r30;
abs.f32 %f5, %f4;
setp.eq.f32 %p7, %f5, 0f00000000;
setp.eq.f32 %p8, %f5, 0f7F800000;
or.pred %p9, %p7, %p8;
setp.eq.s32 %p10, %r29, %r30;
or.pred %p11, %p9, %p10;
@%p11 bra BB66_13;
abs.s32 %r9, %r8;
setp.lt.s32 %p12, %r9, 126;
@%p12 bra BB66_12;
setp.lt.s32 %p13, %r9, 252;
@%p13 bra BB66_11;
shr.s32 %r31, %r8, 31;
shr.u32 %r32, %r31, 30;
add.s32 %r33, %r8, %r32;
shr.s32 %r34, %r33, 2;
cvt.rn.f32.s32 %f24, %r34;
// inline asm
ex2.approx.ftz.f32 %f23,%f24;
// inline asm
mul.f32 %f27, %f4, %f23;
mul.f32 %f28, %f27, %f23;
mul.f32 %f29, %f28, %f23;
mad.lo.s32 %r35, %r34, -3, %r8;
cvt.rn.f32.s32 %f26, %r35;
// inline asm
ex2.approx.ftz.f32 %f25,%f26;
// inline asm
mul.f32 %f44, %f29, %f25;
bra.uni BB66_14;
BB66_11:
.loc 3 8651 10
shr.u32 %r36, %r8, 31;
add.s32 %r37, %r8, %r36;
shr.s32 %r38, %r37, 1;
cvt.rn.f32.s32 %f31, %r38;
// inline asm
ex2.approx.ftz.f32 %f30,%f31;
// inline asm
mul.f32 %f34, %f4, %f30;
sub.s32 %r39, %r8, %r38;
cvt.rn.f32.s32 %f33, %r39;
// inline asm
ex2.approx.ftz.f32 %f32,%f33;
// inline asm
mul.f32 %f44, %f34, %f32;
bra.uni BB66_14;
BB66_12:
.loc 3 8651 10
cvt.rn.f32.s32 %f36, %r8;
// inline asm
ex2.approx.ftz.f32 %f35,%f36;
// inline asm
mul.f32 %f44, %f4, %f35;
bra.uni BB66_14;
BB66_13:
.loc 3 8651 10
setp.leu.f32 %p14, %f5, 0f00000000;
add.f32 %f37, %f4, %f4;
selp.f32 %f44, %f37, %f4, %p14;
BB66_14:
add.f32 %f38, %f44, %f44;
setp.gtu.f32 %p15, %f44, %f2;
selp.f32 %f45, %f44, %f38, %p15;
setp.ltu.f32 %p16, %f45, %f4;
mov.f32 %f49, %f1;
mov.f32 %f48, %f1;
@%p16 bra BB66_16;
BB66_15:
sub.f32 %f39, %f49, %f45;
setp.ltu.f32 %p17, %f49, %f45;
selp.f32 %f14, %f49, %f39, %p17;
mul.f32 %f45, %f45, 0f3F000000;
setp.ge.f32 %p18, %f45, %f4;
mov.f32 %f49, %f14;
mov.f32 %f48, %f14;
@%p18 bra BB66_15;
BB66_16:
mov.f32 %f16, %f48;
mov.b32 %r40, %f20;
and.b32 %r41, %r40, -2147483648;
mov.b32 %r42, %f16;
or.b32 %r43, %r42, %r41;
mov.b32 %f50, %r43;
bra.uni BB66_18;
BB66_17:
setp.leu.f32 %p19, %f1, 0f00000000;
.loc 3 8651 10
add.f32 %f40, %f3, %f20;
setp.gtu.f32 %p20, %f4, 0f7F800000;
selp.f32 %f41, %f40, %f20, %p20;
add.f32 %f42, %f41, %f20;
selp.f32 %f50, %f42, %f41, %p19;
BB66_18:
.loc 2 64 98
add.s32 %r44, %r48, %r5;
mul.wide.s32 %rd7, %r44, 4;
add.s64 %rd8, %rd6, %rd7;
.loc 2 64 98
st.global.f32 [%rd8], %f50;
.loc 2 64 22
add.s32 %r48, %r2, %r48;
.loc 2 64 1
setp.lt.s32 %p21, %r48, %r12;
@%p21 bra BB66_4;
BB66_19:
.loc 2 64 22
mov.u32 %r45, %nctaid.x;
mad.lo.s32 %r47, %r45, %r17, %r47;
.loc 2 64 1
setp.lt.s32 %p22, %r47, %r13;
@%p22 bra BB66_2;
BB66_20:
.loc 2 64 2
ret;
}
.visible .entry map2_transpose_mod_float(
.param .u32 map2_transpose_mod_float_param_0,
.param .u32 map2_transpose_mod_float_param_1,
.param .u64 map2_transpose_mod_float_param_2,
.param .u32 map2_transpose_mod_float_param_3,
.param .u64 map2_transpose_mod_float_param_4,
.param .u32 map2_transpose_mod_float_param_5,
.param .u64 map2_transpose_mod_float_param_6,
.param .u32 map2_transpose_mod_float_param_7
)
{
.reg .pred %p<31>;
.reg .f32 %f<49>;
.reg .s32 %r<85>;
.reg .s64 %rd<23>;
// demoted variable
.shared .align 4 .b8 map2_transpose_mod_float$__cuda_local_var_32580_1730_non_const_tile[4224];
ld.param.u32 %r29, [map2_transpose_mod_float_param_0];
ld.param.u32 %r30, [map2_transpose_mod_float_param_1];
ld.param.u64 %rd4, [map2_transpose_mod_float_param_2];
ld.param.u32 %r31, [map2_transpose_mod_float_param_3];
ld.param.u64 %rd5, [map2_transpose_mod_float_param_4];
ld.param.u32 %r32, [map2_transpose_mod_float_param_5];
ld.param.u64 %rd6, [map2_transpose_mod_float_param_6];
ld.param.u32 %r33, [map2_transpose_mod_float_param_7];
cvta.to.global.u64 %rd1, %rd4;
cvta.to.global.u64 %rd2, %rd5;
cvta.to.global.u64 %rd3, %rd6;
.loc 2 64 1
mov.u32 %r1, %ntid.x;
mov.u32 %r34, %ctaid.y;
mov.u32 %r35, %ntid.y;
mul.lo.s32 %r79, %r34, %r35;
.loc 2 64 1
setp.ge.s32 %p2, %r79, %r30;
@%p2 bra BB67_29;
BB67_1:
.loc 2 64 1
mov.u32 %r37, %ctaid.x;
mul.lo.s32 %r80, %r37, %r1;
.loc 2 64 1
setp.ge.s32 %p3, %r80, %r29;
@%p3 bra BB67_28;
.loc 2 64 1
add.s32 %r39, %r79, 32;
.loc 4 2621 10
min.s32 %r4, %r30, %r39;
BB67_3:
.loc 2 64 1
add.s32 %r42, %r80, 32;
.loc 4 2621 10
min.s32 %r7, %r29, %r42;
.loc 2 64 1
mov.u32 %r43, %tid.y;
add.s32 %r81, %r43, %r80;
.loc 2 64 1
setp.ge.s32 %p4, %r81, %r7;
@%p4 bra BB67_8;
BB67_4:
.loc 2 64 1
mov.u32 %r44, %tid.x;
.loc 2 64 1
add.s32 %r82, %r44, %r79;
.loc 2 64 1
setp.ge.s32 %p5, %r82, %r4;
@%p5 bra BB67_7;
.loc 2 64 1
mul.lo.s32 %r10, %r81, %r33;
sub.s32 %r11, %r81, %r80;
BB67_6:
add.s32 %r47, %r82, %r10;
mul.wide.s32 %rd7, %r47, 4;
add.s64 %rd8, %rd3, %rd7;
.loc 2 64 1
sub.s32 %r48, %r82, %r79;
mul.wide.s32 %rd9, %r11, 132;
mov.u64 %rd10, map2_transpose_mod_float$__cuda_local_var_32580_1730_non_const_tile;
add.s64 %rd11, %rd10, %rd9;
mul.wide.s32 %rd12, %r48, 4;
add.s64 %rd13, %rd11, %rd12;
.loc 2 64 1
ld.global.f32 %f20, [%rd8];
st.shared.f32 [%rd13], %f20;
.loc 2 64 58
add.s32 %r82, %r1, %r82;
.loc 2 64 1
setp.lt.s32 %p6, %r82, %r4;
@%p6 bra BB67_6;
BB67_7:
.loc 2 64 58
add.s32 %r81, %r35, %r81;
.loc 2 64 1
setp.lt.s32 %p7, %r81, %r7;
@%p7 bra BB67_4;
BB67_8:
.loc 2 64 1
add.s32 %r83, %r43, %r79;
setp.lt.s32 %p1, %r83, %r4;
.loc 2 64 1
bar.sync 0;
.loc 2 64 1
@!%p1 bra BB67_27;
bra.uni BB67_9;
BB67_9:
.loc 2 64 1
mov.u32 %r53, %tid.x;
add.s32 %r84, %r53, %r80;
.loc 2 64 1
setp.ge.s32 %p8, %r84, %r7;
@%p8 bra BB67_26;
.loc 2 64 1
mul.lo.s32 %r18, %r83, %r32;
sub.s32 %r19, %r83, %r79;
.loc 2 64 184
mul.lo.s32 %r20, %r83, %r31;
BB67_11:
.loc 2 64 1
add.s32 %r56, %r84, %r18;
mul.wide.s32 %rd14, %r56, 4;
add.s64 %rd15, %rd2, %rd14;
.loc 2 64 1
sub.s32 %r57, %r84, %r80;
mul.wide.s32 %rd16, %r57, 132;
mov.u64 %rd17, map2_transpose_mod_float$__cuda_local_var_32580_1730_non_const_tile;
add.s64 %rd18, %rd17, %rd16;
mul.wide.s32 %rd19, %r19, 4;
add.s64 %rd20, %rd18, %rd19;
.loc 2 64 1
ld.global.f32 %f1, [%rd15];
.loc 3 8651 10
abs.f32 %f47, %f1;
.loc 2 64 1
ld.shared.f32 %f3, [%rd20];
.loc 3 8651 10
abs.f32 %f4, %f3;
setp.eq.f32 %p9, %f47, 0f7F800000;
setp.eq.f32 %p10, %f4, 0f00000000;
or.pred %p11, %p9, %p10;
@!%p11 bra BB67_13;
bra.uni BB67_12;
BB67_12:
mov.f32 %f48, 0f7FFFFFFF;
bra.uni BB67_25;
BB67_13:
.loc 3 8651 10
setp.ltu.f32 %p12, %f47, %f4;
@%p12 bra BB67_24;
lg2.approx.f32 %f21, %f47;
cvt.rzi.s32.f32 %r58, %f21;
lg2.approx.f32 %f22, %f4;
cvt.rzi.s32.f32 %r59, %f22;
sub.s32 %r23, %r58, %r59;
abs.f32 %f5, %f4;
setp.eq.f32 %p13, %f5, 0f00000000;
setp.eq.f32 %p14, %f5, 0f7F800000;
or.pred %p15, %p13, %p14;
setp.eq.s32 %p16, %r58, %r59;
or.pred %p17, %p15, %p16;
@%p17 bra BB67_20;
abs.s32 %r24, %r23;
setp.lt.s32 %p18, %r24, 126;
@%p18 bra BB67_19;
setp.lt.s32 %p19, %r24, 252;
@%p19 bra BB67_18;
shr.s32 %r60, %r23, 31;
shr.u32 %r61, %r60, 30;
add.s32 %r62, %r23, %r61;
shr.s32 %r63, %r62, 2;
cvt.rn.f32.s32 %f24, %r63;
// inline asm
ex2.approx.ftz.f32 %f23,%f24;
// inline asm
mul.f32 %f27, %f4, %f23;
mul.f32 %f28, %f27, %f23;
mul.f32 %f29, %f28, %f23;
mad.lo.s32 %r64, %r63, -3, %r23;
cvt.rn.f32.s32 %f26, %r64;
// inline asm
ex2.approx.ftz.f32 %f25,%f26;
// inline asm
mul.f32 %f45, %f29, %f25;
bra.uni BB67_21;
BB67_18:
.loc 3 8651 10
shr.u32 %r65, %r23, 31;
add.s32 %r66, %r23, %r65;
shr.s32 %r67, %r66, 1;
cvt.rn.f32.s32 %f31, %r67;
// inline asm
ex2.approx.ftz.f32 %f30,%f31;
// inline asm
mul.f32 %f34, %f4, %f30;
sub.s32 %r68, %r23, %r67;
cvt.rn.f32.s32 %f33, %r68;
// inline asm
ex2.approx.ftz.f32 %f32,%f33;
// inline asm
mul.f32 %f45, %f34, %f32;
bra.uni BB67_21;
BB67_19:
.loc 3 8651 10
cvt.rn.f32.s32 %f36, %r23;
// inline asm
ex2.approx.ftz.f32 %f35,%f36;
// inline asm
mul.f32 %f45, %f4, %f35;
bra.uni BB67_21;
BB67_20:
.loc 3 8651 10
setp.leu.f32 %p20, %f5, 0f00000000;
add.f32 %f37, %f4, %f4;
selp.f32 %f45, %f37, %f4, %p20;
BB67_21:
mul.f32 %f38, %f47, 0f3F000000;
setp.gtu.f32 %p21, %f45, %f38;
add.f32 %f39, %f45, %f45;
selp.f32 %f46, %f45, %f39, %p21;
setp.ltu.f32 %p22, %f46, %f4;
@%p22 bra BB67_23;
BB67_22:
sub.f32 %f40, %f47, %f46;
setp.ltu.f32 %p23, %f47, %f46;
selp.f32 %f47, %f47, %f40, %p23;
mul.f32 %f46, %f46, 0f3F000000;
setp.ge.f32 %p24, %f46, %f4;
@%p24 bra BB67_22;
BB67_23:
mov.b32 %r69, %f1;
and.b32 %r70, %r69, -2147483648;
mov.b32 %r71, %f47;
or.b32 %r72, %r71, %r70;
mov.b32 %f48, %r72;
bra.uni BB67_25;
BB67_24:
.loc 3 8651 10
setp.gtu.f32 %p25, %f4, 0f7F800000;
add.f32 %f41, %f1, %f3;
selp.f32 %f42, %f41, %f1, %p25;
add.f32 %f43, %f42, %f1;
setp.leu.f32 %p26, %f47, 0f00000000;
selp.f32 %f48, %f43, %f42, %p26;
BB67_25:
.loc 2 64 184
add.s32 %r73, %r84, %r20;
mul.wide.s32 %rd21, %r73, 4;
add.s64 %rd22, %rd1, %rd21;
.loc 2 64 184
st.global.f32 [%rd22], %f48;
.loc 2 64 58
add.s32 %r84, %r1, %r84;
.loc 2 64 1
setp.lt.s32 %p27, %r84, %r7;
@%p27 bra BB67_11;
BB67_26:
.loc 2 64 58
add.s32 %r83, %r35, %r83;
.loc 2 64 1
setp.lt.s32 %p28, %r83, %r4;
@%p28 bra BB67_9;
BB67_27:
.loc 2 64 1
bar.sync 0;
.loc 2 64 1
mov.u32 %r76, %nctaid.x;
.loc 2 64 21
mad.lo.s32 %r80, %r76, %r1, %r80;
.loc 2 64 1
setp.lt.s32 %p29, %r80, %r29;
@%p29 bra BB67_3;
BB67_28:
.loc 2 64 1
mov.u32 %r77, %nctaid.y;
.loc 2 64 21
mad.lo.s32 %r79, %r77, %r35, %r79;
.loc 2 64 1
setp.lt.s32 %p30, %r79, %r30;
@%p30 bra BB67_1;
BB67_29:
.loc 2 64 2
ret;
}
.visible .entry map2_pow_float(
.param .u32 map2_pow_float_param_0,
.param .u32 map2_pow_float_param_1,
.param .u64 map2_pow_float_param_2,
.param .u32 map2_pow_float_param_3,
.param .u64 map2_pow_float_param_4,
.param .u32 map2_pow_float_param_5,
.param .u64 map2_pow_float_param_6,
.param .u32 map2_pow_float_param_7
)
{
.reg .pred %p<34>;
.reg .f32 %f<101>;
.reg .s32 %r<54>;
.reg .s64 %rd<13>;
ld.param.u32 %r10, [map2_pow_float_param_0];
ld.param.u32 %r11, [map2_pow_float_param_1];
ld.param.u64 %rd1, [map2_pow_float_param_2];
ld.param.u32 %r12, [map2_pow_float_param_3];
ld.param.u64 %rd2, [map2_pow_float_param_4];
ld.param.u32 %r13, [map2_pow_float_param_5];
ld.param.u64 %rd3, [map2_pow_float_param_6];
ld.param.u32 %r14, [map2_pow_float_param_7];
.loc 2 65 1
mov.u32 %r15, %tid.x;
mov.u32 %r16, %ntid.x;
mov.u32 %r17, %ctaid.x;
mad.lo.s32 %r52, %r16, %r17, %r15;
.loc 2 65 1
setp.ge.s32 %p1, %r52, %r11;
@%p1 bra BB68_22;
.loc 2 65 1
mov.u32 %r18, %ntid.y;
.loc 2 65 22
mov.u32 %r19, %nctaid.y;
mul.lo.s32 %r2, %r19, %r18;
cvta.to.global.u64 %rd4, %rd2;
cvta.to.global.u64 %rd7, %rd3;
cvta.to.global.u64 %rd10, %rd1;
BB68_2:
.loc 2 65 1
mov.u32 %r20, %ctaid.y;
mov.u32 %r22, %tid.y;
mad.lo.s32 %r53, %r18, %r20, %r22;
.loc 2 65 1
setp.ge.s32 %p2, %r53, %r10;
@%p2 bra BB68_21;
BB68_3:
.loc 2 65 1
mul.lo.s32 %r51, %r52, %r14;
mul.lo.s32 %r50, %r52, %r13;
add.s32 %r27, %r53, %r50;
mul.wide.s32 %rd5, %r27, 4;
add.s64 %rd6, %rd4, %rd5;
.loc 2 65 1
add.s32 %r28, %r53, %r51;
mul.wide.s32 %rd8, %r28, 4;
add.s64 %rd9, %rd7, %rd8;
.loc 2 65 1
ld.global.f32 %f1, [%rd9];
.loc 3 8684 10
mul.f32 %f16, %f1, 0f3F000000;
cvt.rzi.f32.f32 %f17, %f16;
fma.rn.f32 %f18, %f17, 0fC0000000, %f1;
abs.f32 %f2, %f18;
.loc 2 65 1
ld.global.f32 %f3, [%rd6];
.loc 3 8684 10
setp.eq.f32 %p3, %f3, 0f3F800000;
setp.eq.f32 %p4, %f1, 0f00000000;
or.pred %p5, %p3, %p4;
@!%p5 bra BB68_5;
bra.uni BB68_4;
BB68_4:
mov.f32 %f100, 0f3F800000;
bra.uni BB68_20;
BB68_5:
.loc 3 8684 10
abs.f32 %f4, %f3;
setp.gtu.f32 %p6, %f4, 0f7F800000;
@%p6 bra BB68_19;
abs.f32 %f5, %f1;
setp.gtu.f32 %p7, %f5, 0f7F800000;
@%p7 bra BB68_19;
setp.eq.f32 %p8, %f5, 0f7F800000;
@%p8 bra BB68_18;
setp.eq.f32 %p9, %f4, 0f7F800000;
@%p9 bra BB68_17;
setp.eq.f32 %p10, %f3, 0f00000000;
@%p10 bra BB68_16;
setp.geu.f32 %p11, %f3, 0f00000000;
@%p11 bra BB68_13;
cvt.rzi.f32.f32 %f19, %f1;
setp.eq.f32 %p12, %f1, %f19;
@%p12 bra BB68_13;
mov.f32 %f100, 0f7FFFFFFF;
bra.uni BB68_20;
BB68_13:
.loc 3 8684 10
setp.lt.f32 %p13, %f4, 0f00800000;
selp.f32 %f24, 0fC3170000, 0fC2FE0000, %p13;
mul.f32 %f25, %f4, 0f4B800000;
selp.f32 %f26, %f25, %f4, %p13;
mov.b32 %r29, %f26;
and.b32 %r30, %r29, 8388607;
or.b32 %r31, %r30, 1065353216;
mov.b32 %f27, %r31;
shr.u32 %r32, %r29, 23;
cvt.rn.f32.u32 %f28, %r32;
add.f32 %f29, %f24, %f28;
setp.gt.f32 %p14, %f27, 0f3FB504F3;
mul.f32 %f30, %f27, 0f3F000000;
add.f32 %f31, %f29, 0f3F800000;
selp.f32 %f32, %f30, %f27, %p14;
selp.f32 %f33, %f31, %f29, %p14;
add.f32 %f34, %f32, 0fBF800000;
add.f32 %f21, %f32, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f20,%f21;
// inline asm
add.f32 %f35, %f34, %f34;
mul.f32 %f36, %f35, %f20;
mul.f32 %f37, %f36, %f36;
mov.f32 %f38, 0f3C4CAF63;
mov.f32 %f39, 0f3B18F0FE;
.loc 3 8684 10
fma.rn.f32 %f40, %f39, %f37, %f38;
mov.f32 %f41, 0f3DAAAABD;
.loc 3 8684 10
fma.rn.f32 %f42, %f40, %f37, %f41;
mul.rn.f32 %f43, %f42, %f37;
mul.rn.f32 %f44, %f43, %f36;
sub.f32 %f45, %f34, %f36;
add.f32 %f46, %f45, %f45;
neg.f32 %f47, %f36;
fma.rn.f32 %f48, %f47, %f34, %f46;
mul.rn.f32 %f49, %f20, %f48;
add.f32 %f50, %f36, %f44;
sub.f32 %f51, %f36, %f50;
add.f32 %f52, %f51, %f44;
add.f32 %f53, %f52, %f49;
add.f32 %f54, %f50, %f53;
sub.f32 %f55, %f50, %f54;
add.f32 %f56, %f55, %f53;
mov.f32 %f57, 0f3F317200;
.loc 3 8684 10
mul.rn.f32 %f58, %f33, %f57;
mov.f32 %f59, 0f35BFBE8E;
.loc 3 8684 10
mul.rn.f32 %f60, %f33, %f59;
add.f32 %f61, %f58, %f54;
sub.f32 %f62, %f58, %f61;
add.f32 %f63, %f62, %f54;
add.f32 %f64, %f63, %f56;
add.f32 %f65, %f64, %f60;
add.f32 %f66, %f61, %f65;
sub.f32 %f67, %f61, %f66;
add.f32 %f68, %f67, %f65;
mul.f32 %f69, %f1, 0f39000000;
setp.gt.f32 %p15, %f5, 0f77F684DF;
selp.f32 %f70, %f69, %f1, %p15;
mul.rn.f32 %f71, %f70, %f66;
neg.f32 %f72, %f71;
fma.rn.f32 %f73, %f70, %f66, %f72;
fma.rn.f32 %f74, %f70, %f68, %f73;
mov.f32 %f75, 0f00000000;
.loc 3 8684 10
fma.rn.f32 %f76, %f75, %f66, %f74;
add.rn.f32 %f77, %f71, %f76;
neg.f32 %f78, %f77;
add.rn.f32 %f79, %f71, %f78;
add.rn.f32 %f80, %f79, %f76;
mov.b32 %r33, %f77;
setp.eq.s32 %p16, %r33, 1118925336;
add.s32 %r34, %r33, -1;
mov.b32 %f81, %r34;
add.f32 %f82, %f80, 0f37000000;
selp.f32 %f6, %f82, %f80, %p16;
selp.f32 %f83, %f81, %f77, %p16;
mul.f32 %f84, %f83, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f85, %f84;
mov.f32 %f86, 0fBF317200;
.loc 3 8684 10
fma.rn.f32 %f87, %f85, %f86, %f83;
mov.f32 %f88, 0fB5BFBE8E;
.loc 3 8684 10
fma.rn.f32 %f89, %f85, %f88, %f87;
mul.f32 %f23, %f89, 0f3FB8AA3B;
// inline asm
ex2.approx.ftz.f32 %f22,%f23;
// inline asm
add.f32 %f90, %f85, 0f00000000;
ex2.approx.f32 %f91, %f90;
mul.f32 %f92, %f22, %f91;
setp.lt.f32 %p17, %f83, 0fC2D20000;
selp.f32 %f93, 0f00000000, %f92, %p17;
setp.gt.f32 %p18, %f83, 0f42D20000;
selp.f32 %f99, 0f7F800000, %f93, %p18;
setp.eq.f32 %p19, %f99, 0f7F800000;
@%p19 bra BB68_15;
fma.rn.f32 %f99, %f99, %f6, %f99;
BB68_15:
setp.eq.f32 %p20, %f2, 0f3F800000;
setp.lt.f32 %p21, %f3, 0f00000000;
.loc 3 8684 10
and.pred %p22, %p21, %p20;
mov.b32 %r35, %f99;
xor.b32 %r36, %r35, -2147483648;
mov.b32 %f94, %r36;
selp.f32 %f100, %f94, %f99, %p22;
bra.uni BB68_20;
BB68_16:
setp.eq.f32 %p23, %f2, 0f3F800000;
.loc 3 8684 10
add.f32 %f96, %f3, %f3;
mov.b32 %r37, %f96;
selp.b32 %r38, %r37, 0, %p23;
or.b32 %r39, %r38, 2139095040;
setp.lt.f32 %p24, %f1, 0f00000000;
selp.b32 %r40, %r39, %r38, %p24;
mov.b32 %f100, %r40;
bra.uni BB68_20;
BB68_17:
setp.eq.f32 %p25, %f2, 0f3F800000;
.loc 3 8684 10
setp.ltu.f32 %p26, %f1, 0f00000000;
selp.b32 %r41, 0, 2139095040, %p26;
setp.lt.f32 %p27, %f3, 0f00000000;
and.pred %p28, %p27, %p25;
or.b32 %r42, %r41, -2147483648;
selp.b32 %r43, %r42, %r41, %p28;
mov.b32 %f100, %r43;
bra.uni BB68_20;
BB68_18:
.loc 3 8684 10
setp.gt.f32 %p29, %f4, 0f3F800000;
selp.b32 %r44, 2139095040, 0, %p29;
xor.b32 %r45, %r44, 2139095040;
setp.lt.f32 %p30, %f1, 0f00000000;
selp.b32 %r46, %r45, %r44, %p30;
mov.b32 %f97, %r46;
setp.eq.f32 %p31, %f3, 0fBF800000;
selp.f32 %f100, 0f3F800000, %f97, %p31;
bra.uni BB68_20;
BB68_19:
.loc 3 8684 10
add.f32 %f100, %f3, %f1;
BB68_20:
.loc 2 65 155
mad.lo.s32 %r47, %r52, %r12, %r53;
mul.wide.s32 %rd11, %r47, 4;
add.s64 %rd12, %rd10, %rd11;
.loc 2 65 155
st.global.f32 [%rd12], %f100;
.loc 2 65 22
add.s32 %r53, %r2, %r53;
.loc 2 65 1
setp.lt.s32 %p32, %r53, %r10;
@%p32 bra BB68_3;
BB68_21:
.loc 2 65 22
mov.u32 %r48, %nctaid.x;
mad.lo.s32 %r52, %r48, %r16, %r52;
.loc 2 65 1
setp.lt.s32 %p33, %r52, %r11;
@%p33 bra BB68_2;
BB68_22:
.loc 2 65 2
ret;
}
.visible .entry map2_v_s_pow_float(
.param .u32 map2_v_s_pow_float_param_0,
.param .u32 map2_v_s_pow_float_param_1,
.param .u64 map2_v_s_pow_float_param_2,
.param .u32 map2_v_s_pow_float_param_3,
.param .u64 map2_v_s_pow_float_param_4,
.param .u32 map2_v_s_pow_float_param_5,
.param .f32 map2_v_s_pow_float_param_6
)
{
.reg .pred %p<34>;
.reg .f32 %f<101>;
.reg .s32 %r<50>;
.reg .s64 %rd<9>;
ld.param.u32 %r9, [map2_v_s_pow_float_param_0];
ld.param.u32 %r10, [map2_v_s_pow_float_param_1];
ld.param.u64 %rd1, [map2_v_s_pow_float_param_2];
ld.param.u32 %r11, [map2_v_s_pow_float_param_3];
ld.param.u64 %rd2, [map2_v_s_pow_float_param_4];
ld.param.u32 %r12, [map2_v_s_pow_float_param_5];
ld.param.f32 %f17, [map2_v_s_pow_float_param_6];
.loc 2 65 1
mov.u32 %r13, %tid.x;
mov.u32 %r14, %ntid.x;
mov.u32 %r15, %ctaid.x;
mad.lo.s32 %r48, %r14, %r15, %r13;
.loc 2 65 1
setp.ge.s32 %p1, %r48, %r10;
@%p1 bra BB69_22;
.loc 2 65 1
mov.u32 %r16, %ntid.y;
.loc 3 8684 10
mul.f32 %f1, %f17, 0f3F000000;
.loc 2 65 22
mov.u32 %r17, %nctaid.y;
mul.lo.s32 %r2, %r17, %r16;
.loc 3 8684 10
mul.f32 %f2, %f17, 0f39000000;
cvt.rzi.f32.f32 %f18, %f1;
fma.rn.f32 %f19, %f18, 0fC0000000, %f17;
abs.f32 %f3, %f19;
cvta.to.global.u64 %rd3, %rd2;
cvta.to.global.u64 %rd6, %rd1;
BB69_2:
.loc 2 65 1
mov.u32 %r18, %ctaid.y;
mov.u32 %r20, %tid.y;
mad.lo.s32 %r49, %r16, %r18, %r20;
.loc 2 65 1
setp.ge.s32 %p2, %r49, %r9;
@%p2 bra BB69_21;
BB69_3:
.loc 2 65 1
mad.lo.s32 %r25, %r48, %r12, %r49;
mul.wide.s32 %rd4, %r25, 4;
add.s64 %rd5, %rd3, %rd4;
.loc 2 65 1
ld.global.f32 %f4, [%rd5];
.loc 3 8684 10
setp.eq.f32 %p3, %f4, 0f3F800000;
setp.eq.f32 %p4, %f17, 0f00000000;
.loc 3 8684 10
or.pred %p5, %p3, %p4;
@!%p5 bra BB69_5;
bra.uni BB69_4;
BB69_4:
mov.f32 %f100, 0f3F800000;
bra.uni BB69_20;
BB69_5:
.loc 3 8684 10
abs.f32 %f5, %f4;
setp.gtu.f32 %p6, %f5, 0f7F800000;
@%p6 bra BB69_19;
abs.f32 %f6, %f17;
setp.gtu.f32 %p7, %f6, 0f7F800000;
@%p7 bra BB69_19;
setp.eq.f32 %p8, %f6, 0f7F800000;
@%p8 bra BB69_18;
setp.eq.f32 %p9, %f5, 0f7F800000;
@%p9 bra BB69_17;
setp.eq.f32 %p10, %f4, 0f00000000;
@%p10 bra BB69_16;
setp.geu.f32 %p11, %f4, 0f00000000;
@%p11 bra BB69_13;
cvt.rzi.f32.f32 %f20, %f17;
setp.eq.f32 %p12, %f20, %f17;
@%p12 bra BB69_13;
mov.f32 %f100, 0f7FFFFFFF;
bra.uni BB69_20;
BB69_13:
.loc 3 8684 10
setp.lt.f32 %p13, %f5, 0f00800000;
selp.f32 %f25, 0fC3170000, 0fC2FE0000, %p13;
mul.f32 %f26, %f5, 0f4B800000;
selp.f32 %f27, %f26, %f5, %p13;
mov.b32 %r26, %f27;
and.b32 %r27, %r26, 8388607;
or.b32 %r28, %r27, 1065353216;
mov.b32 %f28, %r28;
shr.u32 %r29, %r26, 23;
cvt.rn.f32.u32 %f29, %r29;
add.f32 %f30, %f25, %f29;
setp.gt.f32 %p14, %f28, 0f3FB504F3;
mul.f32 %f31, %f28, 0f3F000000;
add.f32 %f32, %f30, 0f3F800000;
selp.f32 %f33, %f31, %f28, %p14;
selp.f32 %f34, %f32, %f30, %p14;
add.f32 %f35, %f33, 0fBF800000;
add.f32 %f22, %f33, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f21,%f22;
// inline asm
add.f32 %f36, %f35, %f35;
mul.f32 %f37, %f36, %f21;
mul.f32 %f38, %f37, %f37;
mov.f32 %f39, 0f3C4CAF63;
mov.f32 %f40, 0f3B18F0FE;
.loc 3 8684 10
fma.rn.f32 %f41, %f40, %f38, %f39;
mov.f32 %f42, 0f3DAAAABD;
.loc 3 8684 10
fma.rn.f32 %f43, %f41, %f38, %f42;
mul.rn.f32 %f44, %f43, %f38;
mul.rn.f32 %f45, %f44, %f37;
sub.f32 %f46, %f35, %f37;
add.f32 %f47, %f46, %f46;
neg.f32 %f48, %f37;
fma.rn.f32 %f49, %f48, %f35, %f47;
mul.rn.f32 %f50, %f21, %f49;
add.f32 %f51, %f37, %f45;
sub.f32 %f52, %f37, %f51;
add.f32 %f53, %f52, %f45;
add.f32 %f54, %f53, %f50;
add.f32 %f55, %f51, %f54;
sub.f32 %f56, %f51, %f55;
add.f32 %f57, %f56, %f54;
mov.f32 %f58, 0f3F317200;
.loc 3 8684 10
mul.rn.f32 %f59, %f34, %f58;
mov.f32 %f60, 0f35BFBE8E;
.loc 3 8684 10
mul.rn.f32 %f61, %f34, %f60;
add.f32 %f62, %f59, %f55;
sub.f32 %f63, %f59, %f62;
add.f32 %f64, %f63, %f55;
add.f32 %f65, %f64, %f57;
add.f32 %f66, %f65, %f61;
add.f32 %f67, %f62, %f66;
sub.f32 %f68, %f62, %f67;
add.f32 %f69, %f68, %f66;
setp.gt.f32 %p15, %f6, 0f77F684DF;
selp.f32 %f70, %f2, %f17, %p15;
mul.rn.f32 %f71, %f70, %f67;
neg.f32 %f72, %f71;
fma.rn.f32 %f73, %f70, %f67, %f72;
fma.rn.f32 %f74, %f70, %f69, %f73;
mov.f32 %f75, 0f00000000;
.loc 3 8684 10
fma.rn.f32 %f76, %f75, %f67, %f74;
add.rn.f32 %f77, %f71, %f76;
neg.f32 %f78, %f77;
add.rn.f32 %f79, %f71, %f78;
add.rn.f32 %f80, %f79, %f76;
mov.b32 %r30, %f77;
setp.eq.s32 %p16, %r30, 1118925336;
add.s32 %r31, %r30, -1;
mov.b32 %f81, %r31;
add.f32 %f82, %f80, 0f37000000;
selp.f32 %f7, %f82, %f80, %p16;
selp.f32 %f83, %f81, %f77, %p16;
mul.f32 %f84, %f83, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f85, %f84;
mov.f32 %f86, 0fBF317200;
.loc 3 8684 10
fma.rn.f32 %f87, %f85, %f86, %f83;
mov.f32 %f88, 0fB5BFBE8E;
.loc 3 8684 10
fma.rn.f32 %f89, %f85, %f88, %f87;
mul.f32 %f24, %f89, 0f3FB8AA3B;
// inline asm
ex2.approx.ftz.f32 %f23,%f24;
// inline asm
add.f32 %f90, %f85, 0f00000000;
ex2.approx.f32 %f91, %f90;
mul.f32 %f92, %f23, %f91;
setp.lt.f32 %p17, %f83, 0fC2D20000;
selp.f32 %f93, 0f00000000, %f92, %p17;
setp.gt.f32 %p18, %f83, 0f42D20000;
selp.f32 %f99, 0f7F800000, %f93, %p18;
setp.eq.f32 %p19, %f99, 0f7F800000;
@%p19 bra BB69_15;
fma.rn.f32 %f99, %f99, %f7, %f99;
BB69_15:
setp.eq.f32 %p20, %f3, 0f3F800000;
setp.lt.f32 %p21, %f4, 0f00000000;
.loc 3 8684 10
and.pred %p22, %p21, %p20;
mov.b32 %r32, %f99;
xor.b32 %r33, %r32, -2147483648;
mov.b32 %f94, %r33;
selp.f32 %f100, %f94, %f99, %p22;
bra.uni BB69_20;
BB69_16:
setp.eq.f32 %p23, %f3, 0f3F800000;
.loc 3 8684 10
add.f32 %f96, %f4, %f4;
mov.b32 %r34, %f96;
selp.b32 %r35, %r34, 0, %p23;
or.b32 %r36, %r35, 2139095040;
setp.lt.f32 %p24, %f17, 0f00000000;
.loc 3 8684 10
selp.b32 %r37, %r36, %r35, %p24;
mov.b32 %f100, %r37;
bra.uni BB69_20;
BB69_17:
setp.eq.f32 %p25, %f3, 0f3F800000;
.loc 3 8684 10
setp.lt.f32 %p26, %f4, 0f00000000;
and.pred %p27, %p26, %p25;
setp.ltu.f32 %p28, %f17, 0f00000000;
selp.b32 %r38, 0, 2139095040, %p28;
or.b32 %r39, %r38, -2147483648;
selp.b32 %r40, %r39, %r38, %p27;
mov.b32 %f100, %r40;
bra.uni BB69_20;
BB69_18:
setp.lt.f32 %p29, %f17, 0f00000000;
.loc 3 8684 10
setp.gt.f32 %p30, %f5, 0f3F800000;
selp.b32 %r41, 2139095040, 0, %p30;
xor.b32 %r42, %r41, 2139095040;
selp.b32 %r43, %r42, %r41, %p29;
mov.b32 %f97, %r43;
setp.eq.f32 %p31, %f4, 0fBF800000;
selp.f32 %f100, 0f3F800000, %f97, %p31;
bra.uni BB69_20;
BB69_19:
.loc 3 8684 10
add.f32 %f100, %f4, %f17;
BB69_20:
.loc 2 65 98
mul.lo.s32 %r47, %r48, %r11;
add.s32 %r44, %r49, %r47;
mul.wide.s32 %rd7, %r44, 4;
add.s64 %rd8, %rd6, %rd7;
.loc 2 65 98
st.global.f32 [%rd8], %f100;
.loc 2 65 22
add.s32 %r49, %r2, %r49;
.loc 2 65 1
setp.lt.s32 %p32, %r49, %r9;
@%p32 bra BB69_3;
BB69_21:
.loc 2 65 22
mov.u32 %r45, %nctaid.x;
mad.lo.s32 %r48, %r45, %r14, %r48;
.loc 2 65 1
setp.lt.s32 %p33, %r48, %r10;
@%p33 bra BB69_2;
BB69_22:
.loc 2 65 2
ret;
}
.visible .entry map2_s_v_pow_float(
.param .u32 map2_s_v_pow_float_param_0,
.param .u32 map2_s_v_pow_float_param_1,
.param .u64 map2_s_v_pow_float_param_2,
.param .u32 map2_s_v_pow_float_param_3,
.param .f32 map2_s_v_pow_float_param_4,
.param .u64 map2_s_v_pow_float_param_5,
.param .u32 map2_s_v_pow_float_param_6
)
{
.reg .pred %p<34>;
.reg .f32 %f<101>;
.reg .s32 %r<47>;
.reg .s64 %rd<9>;
ld.param.u32 %r10, [map2_s_v_pow_float_param_0];
ld.param.u32 %r11, [map2_s_v_pow_float_param_1];
ld.param.u64 %rd1, [map2_s_v_pow_float_param_2];
ld.param.u32 %r12, [map2_s_v_pow_float_param_3];
ld.param.f32 %f15, [map2_s_v_pow_float_param_4];
ld.param.u64 %rd2, [map2_s_v_pow_float_param_5];
ld.param.u32 %r13, [map2_s_v_pow_float_param_6];
.loc 2 65 1
mov.u32 %r14, %tid.x;
mov.u32 %r15, %ntid.x;
mov.u32 %r16, %ctaid.x;
mad.lo.s32 %r45, %r15, %r16, %r14;
.loc 2 65 1
setp.ge.s32 %p1, %r45, %r11;
@%p1 bra BB70_23;
.loc 2 65 1
mov.u32 %r17, %tid.y;
mov.u32 %r18, %ntid.y;
mov.u32 %r19, %ctaid.y;
mad.lo.s32 %r2, %r18, %r19, %r17;
.loc 2 65 22
mov.u32 %r20, %nctaid.y;
mul.lo.s32 %r3, %r20, %r18;
cvta.to.global.u64 %rd3, %rd2;
cvta.to.global.u64 %rd6, %rd1;
BB70_2:
.loc 2 65 1
setp.ge.s32 %p2, %r2, %r10;
@%p2 bra BB70_22;
mov.u32 %r46, %r2;
BB70_4:
.loc 2 65 1
mov.u32 %r7, %r46;
mul.lo.s32 %r44, %r45, %r13;
add.s32 %r21, %r7, %r44;
mul.wide.s32 %rd4, %r21, 4;
add.s64 %rd5, %rd3, %rd4;
.loc 2 65 1
ld.global.f32 %f1, [%rd5];
.loc 3 8684 10
mul.f32 %f16, %f1, 0f3F000000;
cvt.rzi.f32.f32 %f17, %f16;
fma.rn.f32 %f18, %f17, 0fC0000000, %f1;
abs.f32 %f2, %f18;
setp.eq.f32 %p3, %f1, 0f00000000;
setp.eq.f32 %p4, %f15, 0f3F800000;
.loc 3 8684 10
or.pred %p5, %p4, %p3;
@!%p5 bra BB70_6;
bra.uni BB70_5;
BB70_5:
mov.f32 %f100, 0f3F800000;
bra.uni BB70_21;
BB70_6:
.loc 3 8684 10
abs.f32 %f3, %f15;
setp.gtu.f32 %p6, %f3, 0f7F800000;
@%p6 bra BB70_20;
abs.f32 %f4, %f1;
setp.gtu.f32 %p7, %f4, 0f7F800000;
@%p7 bra BB70_20;
setp.eq.f32 %p8, %f4, 0f7F800000;
@%p8 bra BB70_19;
setp.eq.f32 %p9, %f3, 0f7F800000;
@%p9 bra BB70_18;
setp.eq.f32 %p10, %f15, 0f00000000;
.loc 3 8684 10
@%p10 bra BB70_17;
setp.geu.f32 %p11, %f15, 0f00000000;
@%p11 bra BB70_14;
cvt.rzi.f32.f32 %f19, %f1;
setp.eq.f32 %p12, %f1, %f19;
@%p12 bra BB70_14;
mov.f32 %f100, 0f7FFFFFFF;
bra.uni BB70_21;
BB70_14:
.loc 3 8684 10
setp.lt.f32 %p13, %f3, 0f00800000;
selp.f32 %f24, 0fC3170000, 0fC2FE0000, %p13;
mul.f32 %f25, %f3, 0f4B800000;
selp.f32 %f26, %f25, %f3, %p13;
mov.b32 %r22, %f26;
and.b32 %r23, %r22, 8388607;
or.b32 %r24, %r23, 1065353216;
mov.b32 %f27, %r24;
shr.u32 %r25, %r22, 23;
cvt.rn.f32.u32 %f28, %r25;
add.f32 %f29, %f24, %f28;
setp.gt.f32 %p14, %f27, 0f3FB504F3;
mul.f32 %f30, %f27, 0f3F000000;
add.f32 %f31, %f29, 0f3F800000;
selp.f32 %f32, %f30, %f27, %p14;
selp.f32 %f33, %f31, %f29, %p14;
add.f32 %f34, %f32, 0fBF800000;
add.f32 %f21, %f32, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f20,%f21;
// inline asm
add.f32 %f35, %f34, %f34;
mul.f32 %f36, %f35, %f20;
mul.f32 %f37, %f36, %f36;
mov.f32 %f38, 0f3C4CAF63;
mov.f32 %f39, 0f3B18F0FE;
.loc 3 8684 10
fma.rn.f32 %f40, %f39, %f37, %f38;
mov.f32 %f41, 0f3DAAAABD;
.loc 3 8684 10
fma.rn.f32 %f42, %f40, %f37, %f41;
mul.rn.f32 %f43, %f42, %f37;
mul.rn.f32 %f44, %f43, %f36;
sub.f32 %f45, %f34, %f36;
add.f32 %f46, %f45, %f45;
neg.f32 %f47, %f36;
fma.rn.f32 %f48, %f47, %f34, %f46;
mul.rn.f32 %f49, %f20, %f48;
add.f32 %f50, %f36, %f44;
sub.f32 %f51, %f36, %f50;
add.f32 %f52, %f51, %f44;
add.f32 %f53, %f52, %f49;
add.f32 %f54, %f50, %f53;
sub.f32 %f55, %f50, %f54;
add.f32 %f56, %f55, %f53;
mov.f32 %f57, 0f3F317200;
.loc 3 8684 10
mul.rn.f32 %f58, %f33, %f57;
mov.f32 %f59, 0f35BFBE8E;
.loc 3 8684 10
mul.rn.f32 %f60, %f33, %f59;
add.f32 %f61, %f58, %f54;
sub.f32 %f62, %f58, %f61;
add.f32 %f63, %f62, %f54;
add.f32 %f64, %f63, %f56;
add.f32 %f65, %f64, %f60;
add.f32 %f66, %f61, %f65;
sub.f32 %f67, %f61, %f66;
add.f32 %f68, %f67, %f65;
mul.f32 %f69, %f1, 0f39000000;
setp.gt.f32 %p15, %f4, 0f77F684DF;
selp.f32 %f70, %f69, %f1, %p15;
mul.rn.f32 %f71, %f70, %f66;
neg.f32 %f72, %f71;
fma.rn.f32 %f73, %f70, %f66, %f72;
fma.rn.f32 %f74, %f70, %f68, %f73;
mov.f32 %f75, 0f00000000;
.loc 3 8684 10
fma.rn.f32 %f76, %f75, %f66, %f74;
add.rn.f32 %f77, %f71, %f76;
neg.f32 %f78, %f77;
add.rn.f32 %f79, %f71, %f78;
add.rn.f32 %f80, %f79, %f76;
mov.b32 %r26, %f77;
setp.eq.s32 %p16, %r26, 1118925336;
add.s32 %r27, %r26, -1;
mov.b32 %f81, %r27;
add.f32 %f82, %f80, 0f37000000;
selp.f32 %f5, %f82, %f80, %p16;
selp.f32 %f83, %f81, %f77, %p16;
mul.f32 %f84, %f83, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f85, %f84;
mov.f32 %f86, 0fBF317200;
.loc 3 8684 10
fma.rn.f32 %f87, %f85, %f86, %f83;
mov.f32 %f88, 0fB5BFBE8E;
.loc 3 8684 10
fma.rn.f32 %f89, %f85, %f88, %f87;
mul.f32 %f23, %f89, 0f3FB8AA3B;
// inline asm
ex2.approx.ftz.f32 %f22,%f23;
// inline asm
add.f32 %f90, %f85, 0f00000000;
ex2.approx.f32 %f91, %f90;
mul.f32 %f92, %f22, %f91;
setp.lt.f32 %p17, %f83, 0fC2D20000;
selp.f32 %f93, 0f00000000, %f92, %p17;
setp.gt.f32 %p18, %f83, 0f42D20000;
selp.f32 %f99, 0f7F800000, %f93, %p18;
setp.eq.f32 %p19, %f99, 0f7F800000;
@%p19 bra BB70_16;
fma.rn.f32 %f99, %f99, %f5, %f99;
BB70_16:
setp.lt.f32 %p20, %f15, 0f00000000;
setp.eq.f32 %p21, %f2, 0f3F800000;
.loc 3 8684 10
and.pred %p22, %p20, %p21;
mov.b32 %r28, %f99;
xor.b32 %r29, %r28, -2147483648;
mov.b32 %f94, %r29;
selp.f32 %f100, %f94, %f99, %p22;
bra.uni BB70_21;
BB70_17:
setp.eq.f32 %p23, %f2, 0f3F800000;
.loc 3 8684 10
add.f32 %f96, %f15, %f15;
mov.b32 %r30, %f96;
selp.b32 %r31, %r30, 0, %p23;
or.b32 %r32, %r31, 2139095040;
setp.lt.f32 %p24, %f1, 0f00000000;
selp.b32 %r33, %r32, %r31, %p24;
mov.b32 %f100, %r33;
bra.uni BB70_21;
BB70_18:
setp.eq.f32 %p25, %f2, 0f3F800000;
.loc 3 8684 10
setp.ltu.f32 %p26, %f1, 0f00000000;
selp.b32 %r34, 0, 2139095040, %p26;
setp.lt.f32 %p27, %f15, 0f00000000;
.loc 3 8684 10
and.pred %p28, %p27, %p25;
or.b32 %r35, %r34, -2147483648;
selp.b32 %r36, %r35, %r34, %p28;
mov.b32 %f100, %r36;
bra.uni BB70_21;
BB70_19:
setp.eq.f32 %p29, %f15, 0fBF800000;
.loc 3 8684 10
setp.gt.f32 %p30, %f3, 0f3F800000;
selp.b32 %r37, 2139095040, 0, %p30;
xor.b32 %r38, %r37, 2139095040;
setp.lt.f32 %p31, %f1, 0f00000000;
selp.b32 %r39, %r38, %r37, %p31;
mov.b32 %f97, %r39;
selp.f32 %f100, 0f3F800000, %f97, %p29;
bra.uni BB70_21;
BB70_20:
.loc 3 8684 10
add.f32 %f100, %f1, %f15;
BB70_21:
.loc 2 65 98
mul.lo.s32 %r43, %r45, %r12;
add.s32 %r40, %r7, %r43;
mul.wide.s32 %rd7, %r40, 4;
add.s64 %rd8, %rd6, %rd7;
.loc 2 65 98
st.global.f32 [%rd8], %f100;
.loc 2 65 22
add.s32 %r8, %r3, %r7;
.loc 2 65 1
setp.lt.s32 %p32, %r8, %r10;
mov.u32 %r46, %r8;
@%p32 bra BB70_4;
BB70_22:
.loc 2 65 22
mov.u32 %r41, %nctaid.x;
mad.lo.s32 %r45, %r41, %r15, %r45;
.loc 2 65 1
setp.lt.s32 %p33, %r45, %r11;
@%p33 bra BB70_2;
BB70_23:
.loc 2 65 2
ret;
}
.visible .entry map2_transpose_pow_float(
.param .u32 map2_transpose_pow_float_param_0,
.param .u32 map2_transpose_pow_float_param_1,
.param .u64 map2_transpose_pow_float_param_2,
.param .u32 map2_transpose_pow_float_param_3,
.param .u64 map2_transpose_pow_float_param_4,
.param .u32 map2_transpose_pow_float_param_5,
.param .u64 map2_transpose_pow_float_param_6,
.param .u32 map2_transpose_pow_float_param_7
)
{
.reg .pred %p<42>;
.reg .f32 %f<102>;
.reg .s32 %r<89>;
.reg .s64 %rd<23>;
// demoted variable
.shared .align 4 .b8 map2_transpose_pow_float$__cuda_local_var_32581_1730_non_const_tile[4224];
ld.param.u32 %r27, [map2_transpose_pow_float_param_0];
ld.param.u32 %r28, [map2_transpose_pow_float_param_1];
ld.param.u64 %rd4, [map2_transpose_pow_float_param_2];
ld.param.u32 %r29, [map2_transpose_pow_float_param_3];
ld.param.u64 %rd5, [map2_transpose_pow_float_param_4];
ld.param.u32 %r30, [map2_transpose_pow_float_param_5];
ld.param.u64 %rd6, [map2_transpose_pow_float_param_6];
ld.param.u32 %r31, [map2_transpose_pow_float_param_7];
cvta.to.global.u64 %rd1, %rd4;
cvta.to.global.u64 %rd2, %rd5;
cvta.to.global.u64 %rd3, %rd6;
.loc 2 65 1
mov.u32 %r1, %ntid.x;
mov.u32 %r32, %ctaid.y;
mov.u32 %r33, %ntid.y;
mul.lo.s32 %r83, %r32, %r33;
.loc 2 65 1
setp.ge.s32 %p2, %r83, %r28;
@%p2 bra BB71_31;
BB71_1:
.loc 2 65 1
mov.u32 %r35, %ctaid.x;
mul.lo.s32 %r84, %r35, %r1;
.loc 2 65 1
setp.ge.s32 %p3, %r84, %r27;
@%p3 bra BB71_30;
.loc 2 65 1
add.s32 %r37, %r83, 32;
.loc 4 2621 10
min.s32 %r4, %r28, %r37;
BB71_3:
.loc 2 65 1
add.s32 %r40, %r84, 32;
.loc 4 2621 10
min.s32 %r7, %r27, %r40;
.loc 2 65 1
mov.u32 %r41, %tid.y;
add.s32 %r85, %r41, %r84;
.loc 2 65 1
setp.ge.s32 %p4, %r85, %r7;
@%p4 bra BB71_8;
BB71_4:
.loc 2 65 1
mov.u32 %r42, %tid.x;
.loc 2 65 1
add.s32 %r86, %r42, %r83;
.loc 2 65 1
setp.ge.s32 %p5, %r86, %r4;
@%p5 bra BB71_7;
.loc 2 65 1
mul.lo.s32 %r10, %r85, %r31;
sub.s32 %r11, %r85, %r84;
BB71_6:
add.s32 %r45, %r86, %r10;
mul.wide.s32 %rd7, %r45, 4;
add.s64 %rd8, %rd3, %rd7;
.loc 2 65 1
sub.s32 %r46, %r86, %r83;
mul.wide.s32 %rd9, %r11, 132;
mov.u64 %rd10, map2_transpose_pow_float$__cuda_local_var_32581_1730_non_const_tile;
add.s64 %rd11, %rd10, %rd9;
mul.wide.s32 %rd12, %r46, 4;
add.s64 %rd13, %rd11, %rd12;
.loc 2 65 1
ld.global.f32 %f16, [%rd8];
st.shared.f32 [%rd13], %f16;
.loc 2 65 58
add.s32 %r86, %r1, %r86;
.loc 2 65 1
setp.lt.s32 %p6, %r86, %r4;
@%p6 bra BB71_6;
BB71_7:
.loc 2 65 58
add.s32 %r85, %r33, %r85;
.loc 2 65 1
setp.lt.s32 %p7, %r85, %r7;
@%p7 bra BB71_4;
BB71_8:
.loc 2 65 1
add.s32 %r87, %r41, %r83;
setp.lt.s32 %p1, %r87, %r4;
.loc 2 65 1
bar.sync 0;
.loc 2 65 1
@!%p1 bra BB71_29;
bra.uni BB71_9;
BB71_9:
.loc 2 65 1
mov.u32 %r51, %tid.x;
add.s32 %r88, %r51, %r84;
.loc 2 65 1
setp.ge.s32 %p8, %r88, %r7;
@%p8 bra BB71_28;
BB71_10:
.loc 2 65 1
sub.s32 %r82, %r87, %r83;
mul.lo.s32 %r81, %r87, %r30;
add.s32 %r54, %r88, %r81;
mul.wide.s32 %rd14, %r54, 4;
add.s64 %rd15, %rd2, %rd14;
.loc 2 65 1
sub.s32 %r55, %r88, %r84;
mul.wide.s32 %rd16, %r55, 132;
mov.u64 %rd17, map2_transpose_pow_float$__cuda_local_var_32581_1730_non_const_tile;
add.s64 %rd18, %rd17, %rd16;
mul.wide.s32 %rd19, %r82, 4;
add.s64 %rd20, %rd18, %rd19;
.loc 2 65 1
ld.shared.f32 %f1, [%rd20];
.loc 3 8684 10
mul.f32 %f17, %f1, 0f3F000000;
cvt.rzi.f32.f32 %f18, %f17;
fma.rn.f32 %f19, %f18, 0fC0000000, %f1;
abs.f32 %f2, %f19;
.loc 2 65 1
ld.global.f32 %f3, [%rd15];
.loc 3 8684 10
setp.eq.f32 %p9, %f3, 0f3F800000;
setp.eq.f32 %p10, %f1, 0f00000000;
or.pred %p11, %p9, %p10;
@!%p11 bra BB71_12;
bra.uni BB71_11;
BB71_11:
mov.f32 %f101, 0f3F800000;
bra.uni BB71_27;
BB71_12:
.loc 3 8684 10
abs.f32 %f4, %f3;
setp.gtu.f32 %p12, %f4, 0f7F800000;
@%p12 bra BB71_26;
abs.f32 %f5, %f1;
setp.gtu.f32 %p13, %f5, 0f7F800000;
@%p13 bra BB71_26;
setp.eq.f32 %p14, %f5, 0f7F800000;
@%p14 bra BB71_25;
setp.eq.f32 %p15, %f4, 0f7F800000;
@%p15 bra BB71_24;
setp.eq.f32 %p16, %f3, 0f00000000;
@%p16 bra BB71_23;
setp.geu.f32 %p17, %f3, 0f00000000;
@%p17 bra BB71_20;
cvt.rzi.f32.f32 %f20, %f1;
setp.eq.f32 %p18, %f1, %f20;
@%p18 bra BB71_20;
mov.f32 %f101, 0f7FFFFFFF;
bra.uni BB71_27;
BB71_20:
.loc 3 8684 10
setp.lt.f32 %p19, %f4, 0f00800000;
selp.f32 %f25, 0fC3170000, 0fC2FE0000, %p19;
mul.f32 %f26, %f4, 0f4B800000;
selp.f32 %f27, %f26, %f4, %p19;
mov.b32 %r56, %f27;
and.b32 %r57, %r56, 8388607;
or.b32 %r58, %r57, 1065353216;
mov.b32 %f28, %r58;
shr.u32 %r59, %r56, 23;
cvt.rn.f32.u32 %f29, %r59;
add.f32 %f30, %f25, %f29;
setp.gt.f32 %p20, %f28, 0f3FB504F3;
mul.f32 %f31, %f28, 0f3F000000;
add.f32 %f32, %f30, 0f3F800000;
selp.f32 %f33, %f31, %f28, %p20;
selp.f32 %f34, %f32, %f30, %p20;
add.f32 %f35, %f33, 0fBF800000;
add.f32 %f22, %f33, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f21,%f22;
// inline asm
add.f32 %f36, %f35, %f35;
mul.f32 %f37, %f36, %f21;
mul.f32 %f38, %f37, %f37;
mov.f32 %f39, 0f3C4CAF63;
mov.f32 %f40, 0f3B18F0FE;
.loc 3 8684 10
fma.rn.f32 %f41, %f40, %f38, %f39;
mov.f32 %f42, 0f3DAAAABD;
.loc 3 8684 10
fma.rn.f32 %f43, %f41, %f38, %f42;
mul.rn.f32 %f44, %f43, %f38;
mul.rn.f32 %f45, %f44, %f37;
sub.f32 %f46, %f35, %f37;
add.f32 %f47, %f46, %f46;
neg.f32 %f48, %f37;
fma.rn.f32 %f49, %f48, %f35, %f47;
mul.rn.f32 %f50, %f21, %f49;
add.f32 %f51, %f37, %f45;
sub.f32 %f52, %f37, %f51;
add.f32 %f53, %f52, %f45;
add.f32 %f54, %f53, %f50;
add.f32 %f55, %f51, %f54;
sub.f32 %f56, %f51, %f55;
add.f32 %f57, %f56, %f54;
mov.f32 %f58, 0f3F317200;
.loc 3 8684 10
mul.rn.f32 %f59, %f34, %f58;
mov.f32 %f60, 0f35BFBE8E;
.loc 3 8684 10
mul.rn.f32 %f61, %f34, %f60;
add.f32 %f62, %f59, %f55;
sub.f32 %f63, %f59, %f62;
add.f32 %f64, %f63, %f55;
add.f32 %f65, %f64, %f57;
add.f32 %f66, %f65, %f61;
add.f32 %f67, %f62, %f66;
sub.f32 %f68, %f62, %f67;
add.f32 %f69, %f68, %f66;
mul.f32 %f70, %f1, 0f39000000;
setp.gt.f32 %p21, %f5, 0f77F684DF;
selp.f32 %f71, %f70, %f1, %p21;
mul.rn.f32 %f72, %f71, %f67;
neg.f32 %f73, %f72;
fma.rn.f32 %f74, %f71, %f67, %f73;
fma.rn.f32 %f75, %f71, %f69, %f74;
mov.f32 %f76, 0f00000000;
.loc 3 8684 10
fma.rn.f32 %f77, %f76, %f67, %f75;
add.rn.f32 %f78, %f72, %f77;
neg.f32 %f79, %f78;
add.rn.f32 %f80, %f72, %f79;
add.rn.f32 %f81, %f80, %f77;
mov.b32 %r60, %f78;
setp.eq.s32 %p22, %r60, 1118925336;
add.s32 %r61, %r60, -1;
mov.b32 %f82, %r61;
add.f32 %f83, %f81, 0f37000000;
selp.f32 %f6, %f83, %f81, %p22;
selp.f32 %f84, %f82, %f78, %p22;
mul.f32 %f85, %f84, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f86, %f85;
mov.f32 %f87, 0fBF317200;
.loc 3 8684 10
fma.rn.f32 %f88, %f86, %f87, %f84;
mov.f32 %f89, 0fB5BFBE8E;
.loc 3 8684 10
fma.rn.f32 %f90, %f86, %f89, %f88;
mul.f32 %f24, %f90, 0f3FB8AA3B;
// inline asm
ex2.approx.ftz.f32 %f23,%f24;
// inline asm
add.f32 %f91, %f86, 0f00000000;
ex2.approx.f32 %f92, %f91;
mul.f32 %f93, %f23, %f92;
setp.lt.f32 %p23, %f84, 0fC2D20000;
selp.f32 %f94, 0f00000000, %f93, %p23;
setp.gt.f32 %p24, %f84, 0f42D20000;
selp.f32 %f100, 0f7F800000, %f94, %p24;
setp.eq.f32 %p25, %f100, 0f7F800000;
@%p25 bra BB71_22;
fma.rn.f32 %f100, %f100, %f6, %f100;
BB71_22:
setp.eq.f32 %p26, %f2, 0f3F800000;
setp.lt.f32 %p27, %f3, 0f00000000;
.loc 3 8684 10
and.pred %p28, %p27, %p26;
mov.b32 %r62, %f100;
xor.b32 %r63, %r62, -2147483648;
mov.b32 %f95, %r63;
selp.f32 %f101, %f95, %f100, %p28;
bra.uni BB71_27;
BB71_23:
setp.eq.f32 %p29, %f2, 0f3F800000;
.loc 3 8684 10
add.f32 %f97, %f3, %f3;
mov.b32 %r64, %f97;
selp.b32 %r65, %r64, 0, %p29;
or.b32 %r66, %r65, 2139095040;
setp.lt.f32 %p30, %f1, 0f00000000;
selp.b32 %r67, %r66, %r65, %p30;
mov.b32 %f101, %r67;
bra.uni BB71_27;
BB71_24:
setp.eq.f32 %p31, %f2, 0f3F800000;
.loc 3 8684 10
setp.ltu.f32 %p32, %f1, 0f00000000;
selp.b32 %r68, 0, 2139095040, %p32;
setp.lt.f32 %p33, %f3, 0f00000000;
and.pred %p34, %p33, %p31;
or.b32 %r69, %r68, -2147483648;
selp.b32 %r70, %r69, %r68, %p34;
mov.b32 %f101, %r70;
bra.uni BB71_27;
BB71_25:
.loc 3 8684 10
setp.gt.f32 %p35, %f4, 0f3F800000;
selp.b32 %r71, 2139095040, 0, %p35;
xor.b32 %r72, %r71, 2139095040;
setp.lt.f32 %p36, %f1, 0f00000000;
selp.b32 %r73, %r72, %r71, %p36;
mov.b32 %f98, %r73;
setp.eq.f32 %p37, %f3, 0fBF800000;
selp.f32 %f101, 0f3F800000, %f98, %p37;
bra.uni BB71_27;
BB71_26:
.loc 3 8684 10
add.f32 %f101, %f3, %f1;
BB71_27:
.loc 2 65 184
mul.lo.s32 %r80, %r87, %r29;
add.s32 %r74, %r88, %r80;
mul.wide.s32 %rd21, %r74, 4;
add.s64 %rd22, %rd1, %rd21;
.loc 2 65 184
st.global.f32 [%rd22], %f101;
.loc 2 65 58
add.s32 %r88, %r1, %r88;
.loc 2 65 1
setp.lt.s32 %p38, %r88, %r7;
@%p38 bra BB71_10;
BB71_28:
.loc 2 65 58
add.s32 %r87, %r33, %r87;
.loc 2 65 1
setp.lt.s32 %p39, %r87, %r4;
@%p39 bra BB71_9;
BB71_29:
.loc 2 65 1
bar.sync 0;
.loc 2 65 1
mov.u32 %r77, %nctaid.x;
.loc 2 65 21
mad.lo.s32 %r84, %r77, %r1, %r84;
.loc 2 65 1
setp.lt.s32 %p40, %r84, %r27;
@%p40 bra BB71_3;
BB71_30:
.loc 2 65 1
mov.u32 %r78, %nctaid.y;
.loc 2 65 21
mad.lo.s32 %r83, %r78, %r33, %r83;
.loc 2 65 1
setp.lt.s32 %p41, %r83, %r28;
@%p41 bra BB71_1;
BB71_31:
.loc 2 65 2
ret;
}
.visible .entry map2_max_float(
.param .u32 map2_max_float_param_0,
.param .u32 map2_max_float_param_1,
.param .u64 map2_max_float_param_2,
.param .u32 map2_max_float_param_3,
.param .u64 map2_max_float_param_4,
.param .u32 map2_max_float_param_5,
.param .u64 map2_max_float_param_6,
.param .u32 map2_max_float_param_7
)
{
.reg .pred %p<5>;
.reg .f32 %f<4>;
.reg .s32 %r<30>;
.reg .s64 %rd<13>;
ld.param.u32 %r13, [map2_max_float_param_0];
ld.param.u32 %r14, [map2_max_float_param_1];
ld.param.u64 %rd4, [map2_max_float_param_2];
ld.param.u32 %r15, [map2_max_float_param_3];
ld.param.u64 %rd5, [map2_max_float_param_4];
ld.param.u32 %r16, [map2_max_float_param_5];
ld.param.u64 %rd6, [map2_max_float_param_6];
ld.param.u32 %r17, [map2_max_float_param_7];
cvta.to.global.u64 %rd1, %rd4;
cvta.to.global.u64 %rd2, %rd6;
cvta.to.global.u64 %rd3, %rd5;
.loc 2 66 1
mov.u32 %r1, %ntid.x;
mov.u32 %r18, %ctaid.x;
mov.u32 %r19, %tid.x;
mad.lo.s32 %r28, %r1, %r18, %r19;
.loc 2 66 1
setp.ge.s32 %p1, %r28, %r14;
@%p1 bra BB72_6;
.loc 2 66 1
mov.u32 %r20, %tid.y;
mov.u32 %r21, %ntid.y;
mov.u32 %r22, %ctaid.y;
mad.lo.s32 %r3, %r21, %r22, %r20;
.loc 2 66 22
mov.u32 %r23, %nctaid.x;
mul.lo.s32 %r4, %r23, %r1;
.loc 2 66 22
mov.u32 %r24, %nctaid.y;
mul.lo.s32 %r5, %r24, %r21;
BB72_2:
.loc 2 66 1
setp.ge.s32 %p2, %r3, %r13;
@%p2 bra BB72_5;
.loc 2 66 1
mul.lo.s32 %r7, %r28, %r16;
mul.lo.s32 %r8, %r28, %r17;
.loc 2 66 147
mul.lo.s32 %r9, %r28, %r15;
mov.u32 %r29, %r3;
BB72_4:
.loc 2 66 1
mov.u32 %r10, %r29;
add.s32 %r25, %r10, %r7;
mul.wide.s32 %rd7, %r25, 4;
add.s64 %rd8, %rd3, %rd7;
.loc 2 66 1
add.s32 %r26, %r10, %r8;
mul.wide.s32 %rd9, %r26, 4;
add.s64 %rd10, %rd2, %rd9;
.loc 2 66 1
ld.global.f32 %f1, [%rd10];
ld.global.f32 %f2, [%rd8];
.loc 4 2770 10
max.f32 %f3, %f2, %f1;
.loc 2 66 147
add.s32 %r27, %r10, %r9;
mul.wide.s32 %rd11, %r27, 4;
add.s64 %rd12, %rd1, %rd11;
.loc 2 66 147
st.global.f32 [%rd12], %f3;
.loc 2 66 22
add.s32 %r11, %r5, %r10;
.loc 2 66 1
setp.lt.s32 %p3, %r11, %r13;
mov.u32 %r29, %r11;
@%p3 bra BB72_4;
BB72_5:
.loc 2 66 22
add.s32 %r28, %r4, %r28;
.loc 2 66 1
setp.lt.s32 %p4, %r28, %r14;
@%p4 bra BB72_2;
BB72_6:
.loc 2 66 2
ret;
}
.visible .entry map2_v_s_max_float(
.param .u32 map2_v_s_max_float_param_0,
.param .u32 map2_v_s_max_float_param_1,
.param .u64 map2_v_s_max_float_param_2,
.param .u32 map2_v_s_max_float_param_3,
.param .u64 map2_v_s_max_float_param_4,
.param .u32 map2_v_s_max_float_param_5,
.param .f32 map2_v_s_max_float_param_6
)
{
.reg .pred %p<5>;
.reg .f32 %f<4>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map2_v_s_max_float_param_0];
ld.param.u32 %r13, [map2_v_s_max_float_param_1];
ld.param.u64 %rd3, [map2_v_s_max_float_param_2];
ld.param.u32 %r14, [map2_v_s_max_float_param_3];
ld.param.u64 %rd4, [map2_v_s_max_float_param_4];
ld.param.u32 %r15, [map2_v_s_max_float_param_5];
ld.param.f32 %f1, [map2_v_s_max_float_param_6];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 66 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 66 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB73_6;
.loc 2 66 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 66 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 66 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB73_2:
.loc 2 66 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB73_5;
.loc 2 66 1
mul.lo.s32 %r7, %r25, %r15;
.loc 2 66 90
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB73_4:
.loc 2 66 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 66 1
ld.global.f32 %f2, [%rd6];
.loc 4 2770 10
max.f32 %f3, %f2, %f1;
.loc 2 66 90
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 66 90
st.global.f32 [%rd8], %f3;
.loc 2 66 22
add.s32 %r10, %r5, %r9;
.loc 2 66 1
setp.lt.s32 %p3, %r10, %r12;
mov.u32 %r26, %r10;
@%p3 bra BB73_4;
BB73_5:
.loc 2 66 22
add.s32 %r25, %r4, %r25;
.loc 2 66 1
setp.lt.s32 %p4, %r25, %r13;
@%p4 bra BB73_2;
BB73_6:
.loc 2 66 2
ret;
}
.visible .entry map2_s_v_max_float(
.param .u32 map2_s_v_max_float_param_0,
.param .u32 map2_s_v_max_float_param_1,
.param .u64 map2_s_v_max_float_param_2,
.param .u32 map2_s_v_max_float_param_3,
.param .f32 map2_s_v_max_float_param_4,
.param .u64 map2_s_v_max_float_param_5,
.param .u32 map2_s_v_max_float_param_6
)
{
.reg .pred %p<5>;
.reg .f32 %f<4>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map2_s_v_max_float_param_0];
ld.param.u32 %r13, [map2_s_v_max_float_param_1];
ld.param.u64 %rd3, [map2_s_v_max_float_param_2];
ld.param.u32 %r14, [map2_s_v_max_float_param_3];
ld.param.f32 %f1, [map2_s_v_max_float_param_4];
ld.param.u64 %rd4, [map2_s_v_max_float_param_5];
ld.param.u32 %r15, [map2_s_v_max_float_param_6];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 66 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 66 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB74_6;
.loc 2 66 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 66 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 66 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB74_2:
.loc 2 66 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB74_5;
.loc 2 66 1
mul.lo.s32 %r7, %r25, %r15;
.loc 2 66 90
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB74_4:
.loc 2 66 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 66 1
ld.global.f32 %f2, [%rd6];
.loc 4 2770 10
max.f32 %f3, %f1, %f2;
.loc 2 66 90
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 66 90
st.global.f32 [%rd8], %f3;
.loc 2 66 22
add.s32 %r10, %r5, %r9;
.loc 2 66 1
setp.lt.s32 %p3, %r10, %r12;
mov.u32 %r26, %r10;
@%p3 bra BB74_4;
BB74_5:
.loc 2 66 22
add.s32 %r25, %r4, %r25;
.loc 2 66 1
setp.lt.s32 %p4, %r25, %r13;
@%p4 bra BB74_2;
BB74_6:
.loc 2 66 2
ret;
}
.visible .entry map2_transpose_max_float(
.param .u32 map2_transpose_max_float_param_0,
.param .u32 map2_transpose_max_float_param_1,
.param .u64 map2_transpose_max_float_param_2,
.param .u32 map2_transpose_max_float_param_3,
.param .u64 map2_transpose_max_float_param_4,
.param .u32 map2_transpose_max_float_param_5,
.param .u64 map2_transpose_max_float_param_6,
.param .u32 map2_transpose_max_float_param_7
)
{
.reg .pred %p<13>;
.reg .f32 %f<5>;
.reg .s32 %r<68>;
.reg .s64 %rd<23>;
// demoted variable
.shared .align 4 .b8 map2_transpose_max_float$__cuda_local_var_32582_1730_non_const_tile[4224];
ld.param.u32 %r27, [map2_transpose_max_float_param_0];
ld.param.u32 %r28, [map2_transpose_max_float_param_1];
ld.param.u64 %rd4, [map2_transpose_max_float_param_2];
ld.param.u32 %r29, [map2_transpose_max_float_param_3];
ld.param.u64 %rd5, [map2_transpose_max_float_param_4];
ld.param.u32 %r30, [map2_transpose_max_float_param_5];
ld.param.u64 %rd6, [map2_transpose_max_float_param_6];
ld.param.u32 %r31, [map2_transpose_max_float_param_7];
cvta.to.global.u64 %rd1, %rd4;
cvta.to.global.u64 %rd2, %rd5;
cvta.to.global.u64 %rd3, %rd6;
.loc 2 66 1
mov.u32 %r1, %ntid.x;
mov.u32 %r32, %ctaid.y;
mov.u32 %r33, %ntid.y;
mul.lo.s32 %r62, %r32, %r33;
.loc 2 66 1
setp.ge.s32 %p2, %r62, %r28;
@%p2 bra BB75_15;
BB75_1:
.loc 2 66 1
mov.u32 %r35, %ctaid.x;
mul.lo.s32 %r63, %r35, %r1;
.loc 2 66 1
setp.ge.s32 %p3, %r63, %r27;
@%p3 bra BB75_14;
.loc 2 66 1
add.s32 %r37, %r62, 32;
.loc 4 2621 10
min.s32 %r4, %r28, %r37;
BB75_3:
.loc 2 66 1
add.s32 %r40, %r63, 32;
.loc 4 2621 10
min.s32 %r7, %r27, %r40;
.loc 2 66 1
mov.u32 %r41, %tid.y;
add.s32 %r64, %r41, %r63;
.loc 2 66 1
setp.ge.s32 %p4, %r64, %r7;
@%p4 bra BB75_8;
BB75_4:
.loc 2 66 1
mov.u32 %r42, %tid.x;
.loc 2 66 1
add.s32 %r65, %r42, %r62;
.loc 2 66 1
setp.ge.s32 %p5, %r65, %r4;
@%p5 bra BB75_7;
.loc 2 66 1
mul.lo.s32 %r10, %r64, %r31;
sub.s32 %r11, %r64, %r63;
BB75_6:
add.s32 %r45, %r65, %r10;
mul.wide.s32 %rd7, %r45, 4;
add.s64 %rd8, %rd3, %rd7;
.loc 2 66 1
sub.s32 %r46, %r65, %r62;
mul.wide.s32 %rd9, %r11, 132;
mov.u64 %rd10, map2_transpose_max_float$__cuda_local_var_32582_1730_non_const_tile;
add.s64 %rd11, %rd10, %rd9;
mul.wide.s32 %rd12, %r46, 4;
add.s64 %rd13, %rd11, %rd12;
.loc 2 66 1
ld.global.f32 %f1, [%rd8];
st.shared.f32 [%rd13], %f1;
.loc 2 66 58
add.s32 %r65, %r1, %r65;
.loc 2 66 1
setp.lt.s32 %p6, %r65, %r4;
@%p6 bra BB75_6;
BB75_7:
.loc 2 66 58
add.s32 %r64, %r33, %r64;
.loc 2 66 1
setp.lt.s32 %p7, %r64, %r7;
@%p7 bra BB75_4;
BB75_8:
.loc 2 66 1
add.s32 %r66, %r41, %r62;
setp.lt.s32 %p1, %r66, %r4;
.loc 2 66 1
bar.sync 0;
.loc 2 66 1
@!%p1 bra BB75_13;
bra.uni BB75_9;
BB75_9:
.loc 2 66 1
mov.u32 %r51, %tid.x;
add.s32 %r67, %r51, %r63;
.loc 2 66 1
setp.ge.s32 %p8, %r67, %r7;
@%p8 bra BB75_12;
.loc 2 66 1
mul.lo.s32 %r18, %r66, %r30;
sub.s32 %r19, %r66, %r62;
.loc 2 66 176
mul.lo.s32 %r20, %r66, %r29;
BB75_11:
.loc 2 66 1
add.s32 %r54, %r67, %r18;
mul.wide.s32 %rd14, %r54, 4;
add.s64 %rd15, %rd2, %rd14;
.loc 2 66 1
sub.s32 %r55, %r67, %r63;
mul.wide.s32 %rd16, %r55, 132;
mov.u64 %rd17, map2_transpose_max_float$__cuda_local_var_32582_1730_non_const_tile;
add.s64 %rd18, %rd17, %rd16;
mul.wide.s32 %rd19, %r19, 4;
add.s64 %rd20, %rd18, %rd19;
.loc 2 66 1
ld.shared.f32 %f2, [%rd20];
ld.global.f32 %f3, [%rd15];
.loc 4 2770 10
max.f32 %f4, %f3, %f2;
.loc 2 66 176
add.s32 %r56, %r67, %r20;
mul.wide.s32 %rd21, %r56, 4;
add.s64 %rd22, %rd1, %rd21;
.loc 2 66 176
st.global.f32 [%rd22], %f4;
.loc 2 66 58
add.s32 %r67, %r1, %r67;
.loc 2 66 1
setp.lt.s32 %p9, %r67, %r7;
@%p9 bra BB75_11;
BB75_12:
.loc 2 66 58
add.s32 %r66, %r33, %r66;
.loc 2 66 1
setp.lt.s32 %p10, %r66, %r4;
@%p10 bra BB75_9;
BB75_13:
.loc 2 66 1
bar.sync 0;
.loc 2 66 1
mov.u32 %r59, %nctaid.x;
.loc 2 66 21
mad.lo.s32 %r63, %r59, %r1, %r63;
.loc 2 66 1
setp.lt.s32 %p11, %r63, %r27;
@%p11 bra BB75_3;
BB75_14:
.loc 2 66 1
mov.u32 %r60, %nctaid.y;
.loc 2 66 21
mad.lo.s32 %r62, %r60, %r33, %r62;
.loc 2 66 1
setp.lt.s32 %p12, %r62, %r28;
@%p12 bra BB75_1;
BB75_15:
.loc 2 66 2
ret;
}
.visible .entry map2_min_float(
.param .u32 map2_min_float_param_0,
.param .u32 map2_min_float_param_1,
.param .u64 map2_min_float_param_2,
.param .u32 map2_min_float_param_3,
.param .u64 map2_min_float_param_4,
.param .u32 map2_min_float_param_5,
.param .u64 map2_min_float_param_6,
.param .u32 map2_min_float_param_7
)
{
.reg .pred %p<5>;
.reg .f32 %f<4>;
.reg .s32 %r<30>;
.reg .s64 %rd<13>;
ld.param.u32 %r13, [map2_min_float_param_0];
ld.param.u32 %r14, [map2_min_float_param_1];
ld.param.u64 %rd4, [map2_min_float_param_2];
ld.param.u32 %r15, [map2_min_float_param_3];
ld.param.u64 %rd5, [map2_min_float_param_4];
ld.param.u32 %r16, [map2_min_float_param_5];
ld.param.u64 %rd6, [map2_min_float_param_6];
ld.param.u32 %r17, [map2_min_float_param_7];
cvta.to.global.u64 %rd1, %rd4;
cvta.to.global.u64 %rd2, %rd6;
cvta.to.global.u64 %rd3, %rd5;
.loc 2 67 1
mov.u32 %r1, %ntid.x;
mov.u32 %r18, %ctaid.x;
mov.u32 %r19, %tid.x;
mad.lo.s32 %r28, %r1, %r18, %r19;
.loc 2 67 1
setp.ge.s32 %p1, %r28, %r14;
@%p1 bra BB76_6;
.loc 2 67 1
mov.u32 %r20, %tid.y;
mov.u32 %r21, %ntid.y;
mov.u32 %r22, %ctaid.y;
mad.lo.s32 %r3, %r21, %r22, %r20;
.loc 2 67 22
mov.u32 %r23, %nctaid.x;
mul.lo.s32 %r4, %r23, %r1;
.loc 2 67 22
mov.u32 %r24, %nctaid.y;
mul.lo.s32 %r5, %r24, %r21;
BB76_2:
.loc 2 67 1
setp.ge.s32 %p2, %r3, %r13;
@%p2 bra BB76_5;
.loc 2 67 1
mul.lo.s32 %r7, %r28, %r16;
mul.lo.s32 %r8, %r28, %r17;
.loc 2 67 147
mul.lo.s32 %r9, %r28, %r15;
mov.u32 %r29, %r3;
BB76_4:
.loc 2 67 1
mov.u32 %r10, %r29;
add.s32 %r25, %r10, %r7;
mul.wide.s32 %rd7, %r25, 4;
add.s64 %rd8, %rd3, %rd7;
.loc 2 67 1
add.s32 %r26, %r10, %r8;
mul.wide.s32 %rd9, %r26, 4;
add.s64 %rd10, %rd2, %rd9;
.loc 2 67 1
ld.global.f32 %f1, [%rd10];
ld.global.f32 %f2, [%rd8];
.loc 4 2765 10
min.f32 %f3, %f2, %f1;
.loc 2 67 147
add.s32 %r27, %r10, %r9;
mul.wide.s32 %rd11, %r27, 4;
add.s64 %rd12, %rd1, %rd11;
.loc 2 67 147
st.global.f32 [%rd12], %f3;
.loc 2 67 22
add.s32 %r11, %r5, %r10;
.loc 2 67 1
setp.lt.s32 %p3, %r11, %r13;
mov.u32 %r29, %r11;
@%p3 bra BB76_4;
BB76_5:
.loc 2 67 22
add.s32 %r28, %r4, %r28;
.loc 2 67 1
setp.lt.s32 %p4, %r28, %r14;
@%p4 bra BB76_2;
BB76_6:
.loc 2 67 2
ret;
}
.visible .entry map2_v_s_min_float(
.param .u32 map2_v_s_min_float_param_0,
.param .u32 map2_v_s_min_float_param_1,
.param .u64 map2_v_s_min_float_param_2,
.param .u32 map2_v_s_min_float_param_3,
.param .u64 map2_v_s_min_float_param_4,
.param .u32 map2_v_s_min_float_param_5,
.param .f32 map2_v_s_min_float_param_6
)
{
.reg .pred %p<5>;
.reg .f32 %f<4>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map2_v_s_min_float_param_0];
ld.param.u32 %r13, [map2_v_s_min_float_param_1];
ld.param.u64 %rd3, [map2_v_s_min_float_param_2];
ld.param.u32 %r14, [map2_v_s_min_float_param_3];
ld.param.u64 %rd4, [map2_v_s_min_float_param_4];
ld.param.u32 %r15, [map2_v_s_min_float_param_5];
ld.param.f32 %f1, [map2_v_s_min_float_param_6];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 67 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 67 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB77_6;
.loc 2 67 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 67 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 67 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB77_2:
.loc 2 67 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB77_5;
.loc 2 67 1
mul.lo.s32 %r7, %r25, %r15;
.loc 2 67 90
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB77_4:
.loc 2 67 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 67 1
ld.global.f32 %f2, [%rd6];
.loc 4 2765 10
min.f32 %f3, %f2, %f1;
.loc 2 67 90
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 67 90
st.global.f32 [%rd8], %f3;
.loc 2 67 22
add.s32 %r10, %r5, %r9;
.loc 2 67 1
setp.lt.s32 %p3, %r10, %r12;
mov.u32 %r26, %r10;
@%p3 bra BB77_4;
BB77_5:
.loc 2 67 22
add.s32 %r25, %r4, %r25;
.loc 2 67 1
setp.lt.s32 %p4, %r25, %r13;
@%p4 bra BB77_2;
BB77_6:
.loc 2 67 2
ret;
}
.visible .entry map2_s_v_min_float(
.param .u32 map2_s_v_min_float_param_0,
.param .u32 map2_s_v_min_float_param_1,
.param .u64 map2_s_v_min_float_param_2,
.param .u32 map2_s_v_min_float_param_3,
.param .f32 map2_s_v_min_float_param_4,
.param .u64 map2_s_v_min_float_param_5,
.param .u32 map2_s_v_min_float_param_6
)
{
.reg .pred %p<5>;
.reg .f32 %f<4>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map2_s_v_min_float_param_0];
ld.param.u32 %r13, [map2_s_v_min_float_param_1];
ld.param.u64 %rd3, [map2_s_v_min_float_param_2];
ld.param.u32 %r14, [map2_s_v_min_float_param_3];
ld.param.f32 %f1, [map2_s_v_min_float_param_4];
ld.param.u64 %rd4, [map2_s_v_min_float_param_5];
ld.param.u32 %r15, [map2_s_v_min_float_param_6];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 67 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 67 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB78_6;
.loc 2 67 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 67 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 67 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB78_2:
.loc 2 67 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB78_5;
.loc 2 67 1
mul.lo.s32 %r7, %r25, %r15;
.loc 2 67 90
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB78_4:
.loc 2 67 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 67 1
ld.global.f32 %f2, [%rd6];
.loc 4 2765 10
min.f32 %f3, %f1, %f2;
.loc 2 67 90
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 67 90
st.global.f32 [%rd8], %f3;
.loc 2 67 22
add.s32 %r10, %r5, %r9;
.loc 2 67 1
setp.lt.s32 %p3, %r10, %r12;
mov.u32 %r26, %r10;
@%p3 bra BB78_4;
BB78_5:
.loc 2 67 22
add.s32 %r25, %r4, %r25;
.loc 2 67 1
setp.lt.s32 %p4, %r25, %r13;
@%p4 bra BB78_2;
BB78_6:
.loc 2 67 2
ret;
}
.visible .entry map2_transpose_min_float(
.param .u32 map2_transpose_min_float_param_0,
.param .u32 map2_transpose_min_float_param_1,
.param .u64 map2_transpose_min_float_param_2,
.param .u32 map2_transpose_min_float_param_3,
.param .u64 map2_transpose_min_float_param_4,
.param .u32 map2_transpose_min_float_param_5,
.param .u64 map2_transpose_min_float_param_6,
.param .u32 map2_transpose_min_float_param_7
)
{
.reg .pred %p<13>;
.reg .f32 %f<5>;
.reg .s32 %r<68>;
.reg .s64 %rd<23>;
// demoted variable
.shared .align 4 .b8 map2_transpose_min_float$__cuda_local_var_32583_1730_non_const_tile[4224];
ld.param.u32 %r27, [map2_transpose_min_float_param_0];
ld.param.u32 %r28, [map2_transpose_min_float_param_1];
ld.param.u64 %rd4, [map2_transpose_min_float_param_2];
ld.param.u32 %r29, [map2_transpose_min_float_param_3];
ld.param.u64 %rd5, [map2_transpose_min_float_param_4];
ld.param.u32 %r30, [map2_transpose_min_float_param_5];
ld.param.u64 %rd6, [map2_transpose_min_float_param_6];
ld.param.u32 %r31, [map2_transpose_min_float_param_7];
cvta.to.global.u64 %rd1, %rd4;
cvta.to.global.u64 %rd2, %rd5;
cvta.to.global.u64 %rd3, %rd6;
.loc 2 67 1
mov.u32 %r1, %ntid.x;
mov.u32 %r32, %ctaid.y;
mov.u32 %r33, %ntid.y;
mul.lo.s32 %r62, %r32, %r33;
.loc 2 67 1
setp.ge.s32 %p2, %r62, %r28;
@%p2 bra BB79_15;
BB79_1:
.loc 2 67 1
mov.u32 %r35, %ctaid.x;
mul.lo.s32 %r63, %r35, %r1;
.loc 2 67 1
setp.ge.s32 %p3, %r63, %r27;
@%p3 bra BB79_14;
.loc 2 67 1
add.s32 %r37, %r62, 32;
.loc 4 2621 10
min.s32 %r4, %r28, %r37;
BB79_3:
.loc 2 67 1
add.s32 %r40, %r63, 32;
.loc 4 2621 10
min.s32 %r7, %r27, %r40;
.loc 2 67 1
mov.u32 %r41, %tid.y;
add.s32 %r64, %r41, %r63;
.loc 2 67 1
setp.ge.s32 %p4, %r64, %r7;
@%p4 bra BB79_8;
BB79_4:
.loc 2 67 1
mov.u32 %r42, %tid.x;
.loc 2 67 1
add.s32 %r65, %r42, %r62;
.loc 2 67 1
setp.ge.s32 %p5, %r65, %r4;
@%p5 bra BB79_7;
.loc 2 67 1
mul.lo.s32 %r10, %r64, %r31;
sub.s32 %r11, %r64, %r63;
BB79_6:
add.s32 %r45, %r65, %r10;
mul.wide.s32 %rd7, %r45, 4;
add.s64 %rd8, %rd3, %rd7;
.loc 2 67 1
sub.s32 %r46, %r65, %r62;
mul.wide.s32 %rd9, %r11, 132;
mov.u64 %rd10, map2_transpose_min_float$__cuda_local_var_32583_1730_non_const_tile;
add.s64 %rd11, %rd10, %rd9;
mul.wide.s32 %rd12, %r46, 4;
add.s64 %rd13, %rd11, %rd12;
.loc 2 67 1
ld.global.f32 %f1, [%rd8];
st.shared.f32 [%rd13], %f1;
.loc 2 67 58
add.s32 %r65, %r1, %r65;
.loc 2 67 1
setp.lt.s32 %p6, %r65, %r4;
@%p6 bra BB79_6;
BB79_7:
.loc 2 67 58
add.s32 %r64, %r33, %r64;
.loc 2 67 1
setp.lt.s32 %p7, %r64, %r7;
@%p7 bra BB79_4;
BB79_8:
.loc 2 67 1
add.s32 %r66, %r41, %r62;
setp.lt.s32 %p1, %r66, %r4;
.loc 2 67 1
bar.sync 0;
.loc 2 67 1
@!%p1 bra BB79_13;
bra.uni BB79_9;
BB79_9:
.loc 2 67 1
mov.u32 %r51, %tid.x;
add.s32 %r67, %r51, %r63;
.loc 2 67 1
setp.ge.s32 %p8, %r67, %r7;
@%p8 bra BB79_12;
.loc 2 67 1
mul.lo.s32 %r18, %r66, %r30;
sub.s32 %r19, %r66, %r62;
.loc 2 67 176
mul.lo.s32 %r20, %r66, %r29;
BB79_11:
.loc 2 67 1
add.s32 %r54, %r67, %r18;
mul.wide.s32 %rd14, %r54, 4;
add.s64 %rd15, %rd2, %rd14;
.loc 2 67 1
sub.s32 %r55, %r67, %r63;
mul.wide.s32 %rd16, %r55, 132;
mov.u64 %rd17, map2_transpose_min_float$__cuda_local_var_32583_1730_non_const_tile;
add.s64 %rd18, %rd17, %rd16;
mul.wide.s32 %rd19, %r19, 4;
add.s64 %rd20, %rd18, %rd19;
.loc 2 67 1
ld.shared.f32 %f2, [%rd20];
ld.global.f32 %f3, [%rd15];
.loc 4 2765 10
min.f32 %f4, %f3, %f2;
.loc 2 67 176
add.s32 %r56, %r67, %r20;
mul.wide.s32 %rd21, %r56, 4;
add.s64 %rd22, %rd1, %rd21;
.loc 2 67 176
st.global.f32 [%rd22], %f4;
.loc 2 67 58
add.s32 %r67, %r1, %r67;
.loc 2 67 1
setp.lt.s32 %p9, %r67, %r7;
@%p9 bra BB79_11;
BB79_12:
.loc 2 67 58
add.s32 %r66, %r33, %r66;
.loc 2 67 1
setp.lt.s32 %p10, %r66, %r4;
@%p10 bra BB79_9;
BB79_13:
.loc 2 67 1
bar.sync 0;
.loc 2 67 1
mov.u32 %r59, %nctaid.x;
.loc 2 67 21
mad.lo.s32 %r63, %r59, %r1, %r63;
.loc 2 67 1
setp.lt.s32 %p11, %r63, %r27;
@%p11 bra BB79_3;
BB79_14:
.loc 2 67 1
mov.u32 %r60, %nctaid.y;
.loc 2 67 21
mad.lo.s32 %r62, %r60, %r33, %r62;
.loc 2 67 1
setp.lt.s32 %p12, %r62, %r28;
@%p12 bra BB79_1;
BB79_15:
.loc 2 67 2
ret;
}
.visible .entry map2_set_float(
.param .u32 map2_set_float_param_0,
.param .u32 map2_set_float_param_1,
.param .u64 map2_set_float_param_2,
.param .u32 map2_set_float_param_3,
.param .u64 map2_set_float_param_4,
.param .u32 map2_set_float_param_5,
.param .u64 map2_set_float_param_6,
.param .u32 map2_set_float_param_7
)
{
.reg .pred %p<5>;
.reg .f32 %f<2>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map2_set_float_param_0];
ld.param.u32 %r13, [map2_set_float_param_1];
ld.param.u64 %rd3, [map2_set_float_param_2];
ld.param.u32 %r14, [map2_set_float_param_3];
ld.param.u64 %rd4, [map2_set_float_param_6];
ld.param.u32 %r15, [map2_set_float_param_7];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 68 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 68 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB80_6;
.loc 2 68 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 68 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 68 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB80_2:
.loc 2 68 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB80_5;
.loc 2 68 1
mul.lo.s32 %r7, %r25, %r15;
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB80_4:
.loc 2 68 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 68 1
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 68 1
ld.global.f32 %f1, [%rd6];
st.global.f32 [%rd8], %f1;
.loc 2 68 22
add.s32 %r10, %r5, %r9;
.loc 2 68 1
setp.lt.s32 %p3, %r10, %r12;
mov.u32 %r26, %r10;
@%p3 bra BB80_4;
BB80_5:
.loc 2 68 22
add.s32 %r25, %r4, %r25;
.loc 2 68 1
setp.lt.s32 %p4, %r25, %r13;
@%p4 bra BB80_2;
BB80_6:
.loc 2 68 2
ret;
}
.visible .entry map2_v_s_set_float(
.param .u32 map2_v_s_set_float_param_0,
.param .u32 map2_v_s_set_float_param_1,
.param .u64 map2_v_s_set_float_param_2,
.param .u32 map2_v_s_set_float_param_3,
.param .u64 map2_v_s_set_float_param_4,
.param .u32 map2_v_s_set_float_param_5,
.param .f32 map2_v_s_set_float_param_6
)
{
.reg .pred %p<5>;
.reg .f32 %f<2>;
.reg .s32 %r<24>;
.reg .s64 %rd<5>;
ld.param.u32 %r11, [map2_v_s_set_float_param_0];
ld.param.u32 %r12, [map2_v_s_set_float_param_1];
ld.param.u64 %rd2, [map2_v_s_set_float_param_2];
ld.param.u32 %r13, [map2_v_s_set_float_param_3];
ld.param.f32 %f1, [map2_v_s_set_float_param_6];
cvta.to.global.u64 %rd1, %rd2;
.loc 2 68 1
mov.u32 %r1, %ntid.x;
mov.u32 %r14, %ctaid.x;
mov.u32 %r15, %tid.x;
mad.lo.s32 %r22, %r1, %r14, %r15;
.loc 2 68 1
setp.ge.s32 %p1, %r22, %r12;
@%p1 bra BB81_6;
.loc 2 68 1
mov.u32 %r16, %tid.y;
mov.u32 %r17, %ntid.y;
mov.u32 %r18, %ctaid.y;
mad.lo.s32 %r3, %r17, %r18, %r16;
.loc 2 68 22
mov.u32 %r19, %nctaid.x;
mul.lo.s32 %r4, %r19, %r1;
.loc 2 68 22
mov.u32 %r20, %nctaid.y;
mul.lo.s32 %r5, %r20, %r17;
BB81_2:
.loc 2 68 1
setp.ge.s32 %p2, %r3, %r11;
@%p2 bra BB81_5;
.loc 2 68 1
mul.lo.s32 %r7, %r22, %r13;
mov.u32 %r23, %r3;
BB81_4:
.loc 2 68 1
mov.u32 %r8, %r23;
add.s32 %r21, %r8, %r7;
mul.wide.s32 %rd3, %r21, 4;
add.s64 %rd4, %rd1, %rd3;
.loc 2 68 1
st.global.f32 [%rd4], %f1;
.loc 2 68 22
add.s32 %r9, %r5, %r8;
.loc 2 68 1
setp.lt.s32 %p3, %r9, %r11;
mov.u32 %r23, %r9;
@%p3 bra BB81_4;
BB81_5:
.loc 2 68 22
add.s32 %r22, %r4, %r22;
.loc 2 68 1
setp.lt.s32 %p4, %r22, %r12;
@%p4 bra BB81_2;
BB81_6:
.loc 2 68 2
ret;
}
.visible .entry map2_s_v_set_float(
.param .u32 map2_s_v_set_float_param_0,
.param .u32 map2_s_v_set_float_param_1,
.param .u64 map2_s_v_set_float_param_2,
.param .u32 map2_s_v_set_float_param_3,
.param .f32 map2_s_v_set_float_param_4,
.param .u64 map2_s_v_set_float_param_5,
.param .u32 map2_s_v_set_float_param_6
)
{
.reg .pred %p<5>;
.reg .f32 %f<2>;
.reg .s32 %r<27>;
.reg .s64 %rd<9>;
ld.param.u32 %r12, [map2_s_v_set_float_param_0];
ld.param.u32 %r13, [map2_s_v_set_float_param_1];
ld.param.u64 %rd3, [map2_s_v_set_float_param_2];
ld.param.u32 %r14, [map2_s_v_set_float_param_3];
ld.param.u64 %rd4, [map2_s_v_set_float_param_5];
ld.param.u32 %r15, [map2_s_v_set_float_param_6];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 68 1
mov.u32 %r1, %ntid.x;
mov.u32 %r16, %ctaid.x;
mov.u32 %r17, %tid.x;
mad.lo.s32 %r25, %r1, %r16, %r17;
.loc 2 68 1
setp.ge.s32 %p1, %r25, %r13;
@%p1 bra BB82_6;
.loc 2 68 1
mov.u32 %r18, %tid.y;
mov.u32 %r19, %ntid.y;
mov.u32 %r20, %ctaid.y;
mad.lo.s32 %r3, %r19, %r20, %r18;
.loc 2 68 22
mov.u32 %r21, %nctaid.x;
mul.lo.s32 %r4, %r21, %r1;
.loc 2 68 22
mov.u32 %r22, %nctaid.y;
mul.lo.s32 %r5, %r22, %r19;
BB82_2:
.loc 2 68 1
setp.ge.s32 %p2, %r3, %r12;
@%p2 bra BB82_5;
.loc 2 68 1
mul.lo.s32 %r7, %r25, %r15;
mul.lo.s32 %r8, %r25, %r14;
mov.u32 %r26, %r3;
BB82_4:
.loc 2 68 1
mov.u32 %r9, %r26;
add.s32 %r23, %r9, %r7;
mul.wide.s32 %rd5, %r23, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 68 1
add.s32 %r24, %r9, %r8;
mul.wide.s32 %rd7, %r24, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 68 1
ld.global.f32 %f1, [%rd6];
st.global.f32 [%rd8], %f1;
.loc 2 68 22
add.s32 %r10, %r5, %r9;
.loc 2 68 1
setp.lt.s32 %p3, %r10, %r12;
mov.u32 %r26, %r10;
@%p3 bra BB82_4;
BB82_5:
.loc 2 68 22
add.s32 %r25, %r4, %r25;
.loc 2 68 1
setp.lt.s32 %p4, %r25, %r13;
@%p4 bra BB82_2;
BB82_6:
.loc 2 68 2
ret;
}
.visible .entry map2_transpose_set_float(
.param .u32 map2_transpose_set_float_param_0,
.param .u32 map2_transpose_set_float_param_1,
.param .u64 map2_transpose_set_float_param_2,
.param .u32 map2_transpose_set_float_param_3,
.param .u64 map2_transpose_set_float_param_4,
.param .u32 map2_transpose_set_float_param_5,
.param .u64 map2_transpose_set_float_param_6,
.param .u32 map2_transpose_set_float_param_7
)
{
.reg .pred %p<13>;
.reg .f32 %f<3>;
.reg .s32 %r<65>;
.reg .s64 %rd<19>;
// demoted variable
.shared .align 4 .b8 map2_transpose_set_float$__cuda_local_var_32584_1730_non_const_tile[4224];
ld.param.u32 %r26, [map2_transpose_set_float_param_0];
ld.param.u32 %r27, [map2_transpose_set_float_param_1];
ld.param.u64 %rd3, [map2_transpose_set_float_param_2];
ld.param.u32 %r28, [map2_transpose_set_float_param_3];
ld.param.u64 %rd4, [map2_transpose_set_float_param_6];
ld.param.u32 %r29, [map2_transpose_set_float_param_7];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 68 1
mov.u32 %r1, %ntid.x;
mov.u32 %r30, %ctaid.y;
mov.u32 %r31, %ntid.y;
mul.lo.s32 %r59, %r30, %r31;
.loc 2 68 1
setp.ge.s32 %p2, %r59, %r27;
@%p2 bra BB83_15;
BB83_1:
.loc 2 68 1
mov.u32 %r33, %ctaid.x;
mul.lo.s32 %r60, %r33, %r1;
.loc 2 68 1
setp.ge.s32 %p3, %r60, %r26;
@%p3 bra BB83_14;
.loc 2 68 1
add.s32 %r35, %r59, 32;
.loc 4 2621 10
min.s32 %r4, %r27, %r35;
BB83_3:
.loc 2 68 1
add.s32 %r38, %r60, 32;
.loc 4 2621 10
min.s32 %r7, %r26, %r38;
.loc 2 68 1
mov.u32 %r39, %tid.y;
add.s32 %r61, %r39, %r60;
.loc 2 68 1
setp.ge.s32 %p4, %r61, %r7;
@%p4 bra BB83_8;
BB83_4:
.loc 2 68 1
mov.u32 %r40, %tid.x;
.loc 2 68 1
add.s32 %r62, %r40, %r59;
.loc 2 68 1
setp.ge.s32 %p5, %r62, %r4;
@%p5 bra BB83_7;
.loc 2 68 1
mul.lo.s32 %r10, %r61, %r29;
sub.s32 %r11, %r61, %r60;
BB83_6:
add.s32 %r43, %r62, %r10;
mul.wide.s32 %rd5, %r43, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 68 1
sub.s32 %r44, %r62, %r59;
mul.wide.s32 %rd7, %r11, 132;
mov.u64 %rd8, map2_transpose_set_float$__cuda_local_var_32584_1730_non_const_tile;
add.s64 %rd9, %rd8, %rd7;
mul.wide.s32 %rd10, %r44, 4;
add.s64 %rd11, %rd9, %rd10;
.loc 2 68 1
ld.global.f32 %f1, [%rd6];
st.shared.f32 [%rd11], %f1;
.loc 2 68 58
add.s32 %r62, %r1, %r62;
.loc 2 68 1
setp.lt.s32 %p6, %r62, %r4;
@%p6 bra BB83_6;
BB83_7:
.loc 2 68 58
add.s32 %r61, %r31, %r61;
.loc 2 68 1
setp.lt.s32 %p7, %r61, %r7;
@%p7 bra BB83_4;
BB83_8:
.loc 2 68 1
add.s32 %r63, %r39, %r59;
setp.lt.s32 %p1, %r63, %r4;
.loc 2 68 1
bar.sync 0;
.loc 2 68 1
@!%p1 bra BB83_13;
bra.uni BB83_9;
BB83_9:
.loc 2 68 1
mov.u32 %r49, %tid.x;
add.s32 %r64, %r49, %r60;
.loc 2 68 1
setp.ge.s32 %p8, %r64, %r7;
@%p8 bra BB83_12;
.loc 2 68 1
sub.s32 %r18, %r63, %r59;
mul.lo.s32 %r19, %r63, %r28;
BB83_11:
sub.s32 %r52, %r64, %r60;
mul.wide.s32 %rd12, %r52, 132;
mov.u64 %rd13, map2_transpose_set_float$__cuda_local_var_32584_1730_non_const_tile;
add.s64 %rd14, %rd13, %rd12;
mul.wide.s32 %rd15, %r18, 4;
add.s64 %rd16, %rd14, %rd15;
.loc 2 68 1
add.s32 %r53, %r64, %r19;
mul.wide.s32 %rd17, %r53, 4;
add.s64 %rd18, %rd1, %rd17;
.loc 2 68 1
ld.shared.f32 %f2, [%rd16];
st.global.f32 [%rd18], %f2;
.loc 2 68 58
add.s32 %r64, %r1, %r64;
.loc 2 68 1
setp.lt.s32 %p9, %r64, %r7;
@%p9 bra BB83_11;
BB83_12:
.loc 2 68 58
add.s32 %r63, %r31, %r63;
.loc 2 68 1
setp.lt.s32 %p10, %r63, %r4;
@%p10 bra BB83_9;
BB83_13:
.loc 2 68 1
bar.sync 0;
.loc 2 68 1
mov.u32 %r56, %nctaid.x;
.loc 2 68 21
mad.lo.s32 %r60, %r56, %r1, %r60;
.loc 2 68 1
setp.lt.s32 %p11, %r60, %r26;
@%p11 bra BB83_3;
BB83_14:
.loc 2 68 1
mov.u32 %r57, %nctaid.y;
.loc 2 68 21
mad.lo.s32 %r59, %r57, %r31, %r59;
.loc 2 68 1
setp.lt.s32 %p12, %r59, %r27;
@%p12 bra BB83_1;
BB83_15:
.loc 2 68 2
ret;
}
.visible .entry reduce_add_float(
.param .u32 reduce_add_float_param_0,
.param .u32 reduce_add_float_param_1,
.param .u64 reduce_add_float_param_2,
.param .u64 reduce_add_float_param_3,
.param .u32 reduce_add_float_param_4
)
{
.reg .pred %p<8>;
.reg .f32 %f<15>;
.reg .s32 %r<42>;
.reg .s64 %rd<9>;
ld.param.u32 %r16, [reduce_add_float_param_0];
ld.param.u32 %r17, [reduce_add_float_param_1];
ld.param.u64 %rd3, [reduce_add_float_param_2];
ld.param.u64 %rd4, [reduce_add_float_param_3];
ld.param.u32 %r18, [reduce_add_float_param_4];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 70 1
mov.u32 %r1, %ntid.y;
mov.u32 %r19, %ctaid.y;
mov.u32 %r20, %tid.y;
mad.lo.s32 %r39, %r1, %r19, %r20;
.loc 2 70 1
setp.lt.s32 %p1, %r39, %r17;
.loc 2 70 1
mov.u32 %r3, %ntid.x;
.loc 2 70 1
@%p1 bra BB84_2;
mov.f32 %f14, 0f00000000;
bra.uni BB84_7;
BB84_2:
.loc 2 70 1
mov.u32 %r21, %tid.x;
mov.u32 %r22, %ctaid.x;
mad.lo.s32 %r4, %r3, %r22, %r21;
.loc 2 70 22
mov.u32 %r23, %nctaid.y;
mul.lo.s32 %r5, %r23, %r1;
.loc 2 70 22
mov.u32 %r24, %nctaid.x;
mul.lo.s32 %r6, %r24, %r3;
mov.f32 %f14, 0f00000000;
BB84_3:
.loc 2 70 1
setp.ge.s32 %p2, %r4, %r16;
@%p2 bra BB84_6;
.loc 2 70 1
mul.lo.s32 %r8, %r39, %r18;
mov.u32 %r40, %r4;
BB84_5:
.loc 2 70 1
mov.u32 %r9, %r40;
add.s32 %r25, %r9, %r8;
mul.wide.s32 %rd5, %r25, 4;
add.s64 %rd6, %rd2, %rd5;
ld.global.f32 %f11, [%rd6];
add.f32 %f14, %f14, %f11;
.loc 2 70 22
add.s32 %r10, %r6, %r9;
.loc 2 70 1
setp.lt.s32 %p3, %r10, %r16;
mov.u32 %r40, %r10;
@%p3 bra BB84_5;
BB84_6:
.loc 2 70 22
add.s32 %r39, %r5, %r39;
.loc 2 70 1
setp.lt.s32 %p4, %r39, %r17;
@%p4 bra BB84_3;
BB84_7:
.loc 2 70 1
bar.sync 0;
.loc 2 70 1
setp.lt.u32 %p5, %r3, 2;
@%p5 bra BB84_10;
.loc 2 70 1
mov.u32 %r27, WARP_SZ;
mov.u32 %r28, 32;
.loc 5 140 1
sub.s32 %r29, %r28, %r27;
shl.b32 %r30, %r29, 8;
or.b32 %r13, %r30, 31;
mov.u32 %r41, 1;
BB84_9:
.loc 5 141 1
// inline asm
shfl.down.b32 %f12, %f14, %r41, %r13;
// inline asm
.loc 2 70 1
add.f32 %f14, %f14, %f12;
.loc 2 70 40
shl.b32 %r41, %r41, 1;
.loc 2 70 1
setp.lt.u32 %p6, %r41, %r3;
@%p6 bra BB84_9;
BB84_10:
.loc 2 70 1
mov.u32 %r33, %tid.x;
and.b32 %r34, %r33, 31;
setp.ne.s32 %p7, %r34, 0;
@%p7 bra BB84_12;
.loc 2 70 1
mov.u32 %r35, %ctaid.x;
mov.u32 %r36, %nctaid.y;
mad.lo.s32 %r38, %r36, %r35, %r19;
mul.wide.u32 %rd7, %r38, 4;
add.s64 %rd8, %rd1, %rd7;
st.global.f32 [%rd8], %f14;
BB84_12:
.loc 2 70 2
ret;
}
.visible .entry reduce_col_add_float(
.param .u32 reduce_col_add_float_param_0,
.param .u32 reduce_col_add_float_param_1,
.param .u64 reduce_col_add_float_param_2,
.param .u64 reduce_col_add_float_param_3,
.param .u32 reduce_col_add_float_param_4
)
{
.reg .pred %p<8>;
.reg .f32 %f<13>;
.reg .s32 %r<32>;
.reg .s64 %rd<9>;
ld.param.u32 %r15, [reduce_col_add_float_param_0];
ld.param.u32 %r16, [reduce_col_add_float_param_1];
ld.param.u64 %rd3, [reduce_col_add_float_param_2];
ld.param.u64 %rd4, [reduce_col_add_float_param_3];
ld.param.u32 %r17, [reduce_col_add_float_param_4];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 70 1
mov.u32 %r1, %ntid.y;
mov.u32 %r18, %ctaid.x;
mov.u32 %r19, %tid.y;
mad.lo.s32 %r29, %r1, %r18, %r19;
.loc 2 70 1
setp.ge.s32 %p1, %r29, %r16;
@%p1 bra BB85_12;
.loc 2 70 1
mov.u32 %r3, %tid.x;
.loc 2 70 1
mov.u32 %r4, %ntid.x;
.loc 2 70 1
and.b32 %r5, %r3, 31;
.loc 2 70 22
mov.u32 %r20, %nctaid.x;
mul.lo.s32 %r6, %r20, %r1;
.loc 2 70 1
mov.u32 %r21, WARP_SZ;
mov.u32 %r22, 32;
.loc 5 140 1
sub.s32 %r23, %r22, %r21;
shl.b32 %r24, %r23, 8;
or.b32 %r7, %r24, 31;
BB85_2:
setp.lt.s32 %p2, %r3, %r15;
.loc 2 70 1
@%p2 bra BB85_4;
mov.f32 %f12, 0f00000000;
bra.uni BB85_6;
BB85_4:
.loc 2 70 1
mul.lo.s32 %r9, %r29, %r17;
mov.f32 %f12, 0f00000000;
mov.u32 %r30, %r3;
BB85_5:
.loc 2 70 1
mov.u32 %r10, %r30;
add.s32 %r25, %r10, %r9;
mul.wide.s32 %rd5, %r25, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 70 1
ld.global.f32 %f9, [%rd6];
add.f32 %f12, %f12, %f9;
.loc 2 70 22
add.s32 %r11, %r4, %r10;
.loc 2 70 1
setp.lt.s32 %p3, %r11, %r15;
mov.u32 %r30, %r11;
@%p3 bra BB85_5;
BB85_6:
.loc 2 70 1
bar.sync 0;
.loc 2 70 1
setp.lt.u32 %p4, %r4, 2;
@%p4 bra BB85_9;
mov.u32 %r31, 1;
BB85_8:
.loc 5 141 1
// inline asm
shfl.down.b32 %f10, %f12, %r31, %r7;
// inline asm
.loc 2 70 1
add.f32 %f12, %f12, %f10;
.loc 2 70 40
shl.b32 %r31, %r31, 1;
.loc 2 70 1
setp.lt.u32 %p5, %r31, %r4;
@%p5 bra BB85_8;
BB85_9:
.loc 2 70 1
setp.ne.s32 %p6, %r5, 0;
@%p6 bra BB85_11;
mul.wide.s32 %rd7, %r29, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 70 1
st.global.f32 [%rd8], %f12;
BB85_11:
.loc 2 70 22
add.s32 %r29, %r6, %r29;
.loc 2 70 1
setp.lt.s32 %p7, %r29, %r16;
@%p7 bra BB85_2;
BB85_12:
.loc 2 70 2
ret;
}
.visible .entry reduce_row_add_float(
.param .u32 reduce_row_add_float_param_0,
.param .u32 reduce_row_add_float_param_1,
.param .u64 reduce_row_add_float_param_2,
.param .u64 reduce_row_add_float_param_3,
.param .u32 reduce_row_add_float_param_4
)
{
.reg .pred %p<5>;
.reg .f32 %f<8>;
.reg .s32 %r<18>;
.reg .s64 %rd<9>;
ld.param.u32 %r7, [reduce_row_add_float_param_0];
ld.param.u32 %r8, [reduce_row_add_float_param_1];
ld.param.u64 %rd3, [reduce_row_add_float_param_2];
ld.param.u64 %rd4, [reduce_row_add_float_param_3];
ld.param.u32 %r9, [reduce_row_add_float_param_4];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 70 1
mov.u32 %r10, %nctaid.x;
mov.u32 %r11, %ntid.x;
mul.lo.s32 %r1, %r10, %r11;
.loc 2 70 1
mov.u32 %r12, %ctaid.x;
mov.u32 %r13, %tid.x;
mad.lo.s32 %r16, %r11, %r12, %r13;
.loc 2 70 1
setp.ge.s32 %p1, %r16, %r7;
@%p1 bra BB86_5;
BB86_1:
mov.f32 %f7, 0f00000000;
setp.gt.s32 %p2, %r8, 0;
.loc 2 70 1
@%p2 bra BB86_2;
bra.uni BB86_4;
BB86_2:
mov.u32 %r17, 0;
BB86_3:
.loc 2 70 1
mad.lo.s32 %r15, %r17, %r9, %r16;
mul.wide.s32 %rd5, %r15, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 70 1
ld.global.f32 %f6, [%rd6];
add.f32 %f7, %f7, %f6;
.loc 2 70 22
add.s32 %r17, %r17, 1;
.loc 2 70 1
setp.lt.s32 %p3, %r17, %r8;
@%p3 bra BB86_3;
BB86_4:
mul.wide.s32 %rd7, %r16, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 70 1
st.global.f32 [%rd8], %f7;
.loc 2 70 22
add.s32 %r16, %r16, %r1;
.loc 2 70 1
setp.lt.s32 %p4, %r16, %r7;
@%p4 bra BB86_1;
BB86_5:
.loc 2 70 2
ret;
}
.visible .entry reduce_max_float(
.param .u32 reduce_max_float_param_0,
.param .u32 reduce_max_float_param_1,
.param .u64 reduce_max_float_param_2,
.param .u64 reduce_max_float_param_3,
.param .u32 reduce_max_float_param_4
)
{
.reg .pred %p<8>;
.reg .f32 %f<15>;
.reg .s32 %r<42>;
.reg .s64 %rd<9>;
ld.param.u32 %r16, [reduce_max_float_param_0];
ld.param.u32 %r17, [reduce_max_float_param_1];
ld.param.u64 %rd3, [reduce_max_float_param_2];
ld.param.u64 %rd4, [reduce_max_float_param_3];
ld.param.u32 %r18, [reduce_max_float_param_4];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 71 1
mov.u32 %r1, %ntid.y;
mov.u32 %r19, %ctaid.y;
mov.u32 %r20, %tid.y;
mad.lo.s32 %r39, %r1, %r19, %r20;
.loc 2 71 1
setp.lt.s32 %p1, %r39, %r17;
.loc 2 71 1
mov.u32 %r3, %ntid.x;
.loc 2 71 1
@%p1 bra BB87_2;
mov.f32 %f14, 0fFF800000;
bra.uni BB87_7;
BB87_2:
.loc 2 71 1
mov.u32 %r21, %tid.x;
mov.u32 %r22, %ctaid.x;
mad.lo.s32 %r4, %r3, %r22, %r21;
.loc 2 71 22
mov.u32 %r23, %nctaid.y;
mul.lo.s32 %r5, %r23, %r1;
.loc 2 71 22
mov.u32 %r24, %nctaid.x;
mul.lo.s32 %r6, %r24, %r3;
mov.f32 %f14, 0fFF800000;
BB87_3:
.loc 2 71 1
setp.ge.s32 %p2, %r4, %r16;
@%p2 bra BB87_6;
.loc 2 71 1
mul.lo.s32 %r8, %r39, %r18;
mov.u32 %r40, %r4;
BB87_5:
.loc 2 71 1
mov.u32 %r9, %r40;
add.s32 %r25, %r9, %r8;
mul.wide.s32 %rd5, %r25, 4;
add.s64 %rd6, %rd2, %rd5;
ld.global.f32 %f11, [%rd6];
.loc 4 2770 10
max.f32 %f14, %f14, %f11;
.loc 2 71 22
add.s32 %r10, %r6, %r9;
.loc 2 71 1
setp.lt.s32 %p3, %r10, %r16;
mov.u32 %r40, %r10;
@%p3 bra BB87_5;
BB87_6:
.loc 2 71 22
add.s32 %r39, %r5, %r39;
.loc 2 71 1
setp.lt.s32 %p4, %r39, %r17;
@%p4 bra BB87_3;
BB87_7:
.loc 2 71 1
bar.sync 0;
.loc 2 71 1
setp.lt.u32 %p5, %r3, 2;
@%p5 bra BB87_10;
.loc 2 71 1
mov.u32 %r27, WARP_SZ;
mov.u32 %r28, 32;
.loc 5 140 1
sub.s32 %r29, %r28, %r27;
shl.b32 %r30, %r29, 8;
or.b32 %r13, %r30, 31;
mov.u32 %r41, 1;
BB87_9:
.loc 5 141 1
// inline asm
shfl.down.b32 %f12, %f14, %r41, %r13;
// inline asm
.loc 4 2770 10
max.f32 %f14, %f14, %f12;
.loc 2 71 40
shl.b32 %r41, %r41, 1;
.loc 2 71 1
setp.lt.u32 %p6, %r41, %r3;
@%p6 bra BB87_9;
BB87_10:
.loc 2 71 1
mov.u32 %r33, %tid.x;
and.b32 %r34, %r33, 31;
setp.ne.s32 %p7, %r34, 0;
@%p7 bra BB87_12;
.loc 2 71 1
mov.u32 %r35, %ctaid.x;
mov.u32 %r36, %nctaid.y;
mad.lo.s32 %r38, %r36, %r35, %r19;
mul.wide.u32 %rd7, %r38, 4;
add.s64 %rd8, %rd1, %rd7;
st.global.f32 [%rd8], %f14;
BB87_12:
.loc 2 71 2
ret;
}
.visible .entry reduce_col_max_float(
.param .u32 reduce_col_max_float_param_0,
.param .u32 reduce_col_max_float_param_1,
.param .u64 reduce_col_max_float_param_2,
.param .u64 reduce_col_max_float_param_3,
.param .u32 reduce_col_max_float_param_4
)
{
.reg .pred %p<8>;
.reg .f32 %f<13>;
.reg .s32 %r<32>;
.reg .s64 %rd<9>;
ld.param.u32 %r15, [reduce_col_max_float_param_0];
ld.param.u32 %r16, [reduce_col_max_float_param_1];
ld.param.u64 %rd3, [reduce_col_max_float_param_2];
ld.param.u64 %rd4, [reduce_col_max_float_param_3];
ld.param.u32 %r17, [reduce_col_max_float_param_4];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 71 1
mov.u32 %r1, %ntid.y;
mov.u32 %r18, %ctaid.x;
mov.u32 %r19, %tid.y;
mad.lo.s32 %r29, %r1, %r18, %r19;
.loc 2 71 1
setp.ge.s32 %p1, %r29, %r16;
@%p1 bra BB88_12;
.loc 2 71 1
mov.u32 %r3, %tid.x;
.loc 2 71 1
mov.u32 %r4, %ntid.x;
.loc 2 71 1
and.b32 %r5, %r3, 31;
.loc 2 71 22
mov.u32 %r20, %nctaid.x;
mul.lo.s32 %r6, %r20, %r1;
.loc 2 71 1
mov.u32 %r21, WARP_SZ;
mov.u32 %r22, 32;
.loc 5 140 1
sub.s32 %r23, %r22, %r21;
shl.b32 %r24, %r23, 8;
or.b32 %r7, %r24, 31;
BB88_2:
setp.lt.s32 %p2, %r3, %r15;
.loc 2 71 1
@%p2 bra BB88_4;
mov.f32 %f12, 0fFF800000;
bra.uni BB88_6;
BB88_4:
.loc 2 71 1
mul.lo.s32 %r9, %r29, %r17;
mov.f32 %f12, 0fFF800000;
mov.u32 %r30, %r3;
BB88_5:
.loc 2 71 1
mov.u32 %r10, %r30;
add.s32 %r25, %r10, %r9;
mul.wide.s32 %rd5, %r25, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 71 1
ld.global.f32 %f9, [%rd6];
.loc 4 2770 10
max.f32 %f12, %f12, %f9;
.loc 2 71 22
add.s32 %r11, %r4, %r10;
.loc 2 71 1
setp.lt.s32 %p3, %r11, %r15;
mov.u32 %r30, %r11;
@%p3 bra BB88_5;
BB88_6:
.loc 2 71 1
bar.sync 0;
.loc 2 71 1
setp.lt.u32 %p4, %r4, 2;
@%p4 bra BB88_9;
mov.u32 %r31, 1;
BB88_8:
.loc 5 141 1
// inline asm
shfl.down.b32 %f10, %f12, %r31, %r7;
// inline asm
.loc 4 2770 10
max.f32 %f12, %f12, %f10;
.loc 2 71 40
shl.b32 %r31, %r31, 1;
.loc 2 71 1
setp.lt.u32 %p5, %r31, %r4;
@%p5 bra BB88_8;
BB88_9:
.loc 2 71 1
setp.ne.s32 %p6, %r5, 0;
@%p6 bra BB88_11;
mul.wide.s32 %rd7, %r29, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 71 1
st.global.f32 [%rd8], %f12;
BB88_11:
.loc 2 71 22
add.s32 %r29, %r6, %r29;
.loc 2 71 1
setp.lt.s32 %p7, %r29, %r16;
@%p7 bra BB88_2;
BB88_12:
.loc 2 71 2
ret;
}
.visible .entry reduce_row_max_float(
.param .u32 reduce_row_max_float_param_0,
.param .u32 reduce_row_max_float_param_1,
.param .u64 reduce_row_max_float_param_2,
.param .u64 reduce_row_max_float_param_3,
.param .u32 reduce_row_max_float_param_4
)
{
.reg .pred %p<5>;
.reg .f32 %f<8>;
.reg .s32 %r<18>;
.reg .s64 %rd<9>;
ld.param.u32 %r7, [reduce_row_max_float_param_0];
ld.param.u32 %r8, [reduce_row_max_float_param_1];
ld.param.u64 %rd3, [reduce_row_max_float_param_2];
ld.param.u64 %rd4, [reduce_row_max_float_param_3];
ld.param.u32 %r9, [reduce_row_max_float_param_4];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 71 1
mov.u32 %r10, %nctaid.x;
mov.u32 %r11, %ntid.x;
mul.lo.s32 %r1, %r10, %r11;
.loc 2 71 1
mov.u32 %r12, %ctaid.x;
mov.u32 %r13, %tid.x;
mad.lo.s32 %r16, %r11, %r12, %r13;
.loc 2 71 1
setp.ge.s32 %p1, %r16, %r7;
@%p1 bra BB89_5;
BB89_1:
mov.f32 %f7, 0fFF800000;
setp.gt.s32 %p2, %r8, 0;
.loc 2 71 1
@%p2 bra BB89_2;
bra.uni BB89_4;
BB89_2:
mov.u32 %r17, 0;
BB89_3:
.loc 2 71 1
mad.lo.s32 %r15, %r17, %r9, %r16;
mul.wide.s32 %rd5, %r15, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 71 1
ld.global.f32 %f6, [%rd6];
.loc 4 2770 10
max.f32 %f7, %f7, %f6;
.loc 2 71 22
add.s32 %r17, %r17, 1;
.loc 2 71 1
setp.lt.s32 %p3, %r17, %r8;
@%p3 bra BB89_3;
BB89_4:
mul.wide.s32 %rd7, %r16, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 71 1
st.global.f32 [%rd8], %f7;
.loc 2 71 22
add.s32 %r16, %r16, %r1;
.loc 2 71 1
setp.lt.s32 %p4, %r16, %r7;
@%p4 bra BB89_1;
BB89_5:
.loc 2 71 2
ret;
}
.visible .entry reduce_min_float(
.param .u32 reduce_min_float_param_0,
.param .u32 reduce_min_float_param_1,
.param .u64 reduce_min_float_param_2,
.param .u64 reduce_min_float_param_3,
.param .u32 reduce_min_float_param_4
)
{
.reg .pred %p<8>;
.reg .f32 %f<15>;
.reg .s32 %r<42>;
.reg .s64 %rd<9>;
ld.param.u32 %r16, [reduce_min_float_param_0];
ld.param.u32 %r17, [reduce_min_float_param_1];
ld.param.u64 %rd3, [reduce_min_float_param_2];
ld.param.u64 %rd4, [reduce_min_float_param_3];
ld.param.u32 %r18, [reduce_min_float_param_4];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 72 1
mov.u32 %r1, %ntid.y;
mov.u32 %r19, %ctaid.y;
mov.u32 %r20, %tid.y;
mad.lo.s32 %r39, %r1, %r19, %r20;
.loc 2 72 1
setp.lt.s32 %p1, %r39, %r17;
.loc 2 72 1
mov.u32 %r3, %ntid.x;
.loc 2 72 1
@%p1 bra BB90_2;
mov.f32 %f14, 0f7F800000;
bra.uni BB90_7;
BB90_2:
.loc 2 72 1
mov.u32 %r21, %tid.x;
mov.u32 %r22, %ctaid.x;
mad.lo.s32 %r4, %r3, %r22, %r21;
.loc 2 72 22
mov.u32 %r23, %nctaid.y;
mul.lo.s32 %r5, %r23, %r1;
.loc 2 72 22
mov.u32 %r24, %nctaid.x;
mul.lo.s32 %r6, %r24, %r3;
mov.f32 %f14, 0f7F800000;
BB90_3:
.loc 2 72 1
setp.ge.s32 %p2, %r4, %r16;
@%p2 bra BB90_6;
.loc 2 72 1
mul.lo.s32 %r8, %r39, %r18;
mov.u32 %r40, %r4;
BB90_5:
.loc 2 72 1
mov.u32 %r9, %r40;
add.s32 %r25, %r9, %r8;
mul.wide.s32 %rd5, %r25, 4;
add.s64 %rd6, %rd2, %rd5;
ld.global.f32 %f11, [%rd6];
.loc 4 2765 10
min.f32 %f14, %f14, %f11;
.loc 2 72 22
add.s32 %r10, %r6, %r9;
.loc 2 72 1
setp.lt.s32 %p3, %r10, %r16;
mov.u32 %r40, %r10;
@%p3 bra BB90_5;
BB90_6:
.loc 2 72 22
add.s32 %r39, %r5, %r39;
.loc 2 72 1
setp.lt.s32 %p4, %r39, %r17;
@%p4 bra BB90_3;
BB90_7:
.loc 2 72 1
bar.sync 0;
.loc 2 72 1
setp.lt.u32 %p5, %r3, 2;
@%p5 bra BB90_10;
.loc 2 72 1
mov.u32 %r27, WARP_SZ;
mov.u32 %r28, 32;
.loc 5 140 1
sub.s32 %r29, %r28, %r27;
shl.b32 %r30, %r29, 8;
or.b32 %r13, %r30, 31;
mov.u32 %r41, 1;
BB90_9:
.loc 5 141 1
// inline asm
shfl.down.b32 %f12, %f14, %r41, %r13;
// inline asm
.loc 4 2765 10
min.f32 %f14, %f14, %f12;
.loc 2 72 40
shl.b32 %r41, %r41, 1;
.loc 2 72 1
setp.lt.u32 %p6, %r41, %r3;
@%p6 bra BB90_9;
BB90_10:
.loc 2 72 1
mov.u32 %r33, %tid.x;
and.b32 %r34, %r33, 31;
setp.ne.s32 %p7, %r34, 0;
@%p7 bra BB90_12;
.loc 2 72 1
mov.u32 %r35, %ctaid.x;
mov.u32 %r36, %nctaid.y;
mad.lo.s32 %r38, %r36, %r35, %r19;
mul.wide.u32 %rd7, %r38, 4;
add.s64 %rd8, %rd1, %rd7;
st.global.f32 [%rd8], %f14;
BB90_12:
.loc 2 72 2
ret;
}
.visible .entry reduce_col_min_float(
.param .u32 reduce_col_min_float_param_0,
.param .u32 reduce_col_min_float_param_1,
.param .u64 reduce_col_min_float_param_2,
.param .u64 reduce_col_min_float_param_3,
.param .u32 reduce_col_min_float_param_4
)
{
.reg .pred %p<8>;
.reg .f32 %f<13>;
.reg .s32 %r<32>;
.reg .s64 %rd<9>;
ld.param.u32 %r15, [reduce_col_min_float_param_0];
ld.param.u32 %r16, [reduce_col_min_float_param_1];
ld.param.u64 %rd3, [reduce_col_min_float_param_2];
ld.param.u64 %rd4, [reduce_col_min_float_param_3];
ld.param.u32 %r17, [reduce_col_min_float_param_4];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 72 1
mov.u32 %r1, %ntid.y;
mov.u32 %r18, %ctaid.x;
mov.u32 %r19, %tid.y;
mad.lo.s32 %r29, %r1, %r18, %r19;
.loc 2 72 1
setp.ge.s32 %p1, %r29, %r16;
@%p1 bra BB91_12;
.loc 2 72 1
mov.u32 %r3, %tid.x;
.loc 2 72 1
mov.u32 %r4, %ntid.x;
.loc 2 72 1
and.b32 %r5, %r3, 31;
.loc 2 72 22
mov.u32 %r20, %nctaid.x;
mul.lo.s32 %r6, %r20, %r1;
.loc 2 72 1
mov.u32 %r21, WARP_SZ;
mov.u32 %r22, 32;
.loc 5 140 1
sub.s32 %r23, %r22, %r21;
shl.b32 %r24, %r23, 8;
or.b32 %r7, %r24, 31;
BB91_2:
setp.lt.s32 %p2, %r3, %r15;
.loc 2 72 1
@%p2 bra BB91_4;
mov.f32 %f12, 0f7F800000;
bra.uni BB91_6;
BB91_4:
.loc 2 72 1
mul.lo.s32 %r9, %r29, %r17;
mov.f32 %f12, 0f7F800000;
mov.u32 %r30, %r3;
BB91_5:
.loc 2 72 1
mov.u32 %r10, %r30;
add.s32 %r25, %r10, %r9;
mul.wide.s32 %rd5, %r25, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 72 1
ld.global.f32 %f9, [%rd6];
.loc 4 2765 10
min.f32 %f12, %f12, %f9;
.loc 2 72 22
add.s32 %r11, %r4, %r10;
.loc 2 72 1
setp.lt.s32 %p3, %r11, %r15;
mov.u32 %r30, %r11;
@%p3 bra BB91_5;
BB91_6:
.loc 2 72 1
bar.sync 0;
.loc 2 72 1
setp.lt.u32 %p4, %r4, 2;
@%p4 bra BB91_9;
mov.u32 %r31, 1;
BB91_8:
.loc 5 141 1
// inline asm
shfl.down.b32 %f10, %f12, %r31, %r7;
// inline asm
.loc 4 2765 10
min.f32 %f12, %f12, %f10;
.loc 2 72 40
shl.b32 %r31, %r31, 1;
.loc 2 72 1
setp.lt.u32 %p5, %r31, %r4;
@%p5 bra BB91_8;
BB91_9:
.loc 2 72 1
setp.ne.s32 %p6, %r5, 0;
@%p6 bra BB91_11;
mul.wide.s32 %rd7, %r29, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 72 1
st.global.f32 [%rd8], %f12;
BB91_11:
.loc 2 72 22
add.s32 %r29, %r6, %r29;
.loc 2 72 1
setp.lt.s32 %p7, %r29, %r16;
@%p7 bra BB91_2;
BB91_12:
.loc 2 72 2
ret;
}
.visible .entry reduce_row_min_float(
.param .u32 reduce_row_min_float_param_0,
.param .u32 reduce_row_min_float_param_1,
.param .u64 reduce_row_min_float_param_2,
.param .u64 reduce_row_min_float_param_3,
.param .u32 reduce_row_min_float_param_4
)
{
.reg .pred %p<5>;
.reg .f32 %f<8>;
.reg .s32 %r<18>;
.reg .s64 %rd<9>;
ld.param.u32 %r7, [reduce_row_min_float_param_0];
ld.param.u32 %r8, [reduce_row_min_float_param_1];
ld.param.u64 %rd3, [reduce_row_min_float_param_2];
ld.param.u64 %rd4, [reduce_row_min_float_param_3];
ld.param.u32 %r9, [reduce_row_min_float_param_4];
cvta.to.global.u64 %rd1, %rd3;
cvta.to.global.u64 %rd2, %rd4;
.loc 2 72 1
mov.u32 %r10, %nctaid.x;
mov.u32 %r11, %ntid.x;
mul.lo.s32 %r1, %r10, %r11;
.loc 2 72 1
mov.u32 %r12, %ctaid.x;
mov.u32 %r13, %tid.x;
mad.lo.s32 %r16, %r11, %r12, %r13;
.loc 2 72 1
setp.ge.s32 %p1, %r16, %r7;
@%p1 bra BB92_5;
BB92_1:
mov.f32 %f7, 0f7F800000;
setp.gt.s32 %p2, %r8, 0;
.loc 2 72 1
@%p2 bra BB92_2;
bra.uni BB92_4;
BB92_2:
mov.u32 %r17, 0;
BB92_3:
.loc 2 72 1
mad.lo.s32 %r15, %r17, %r9, %r16;
mul.wide.s32 %rd5, %r15, 4;
add.s64 %rd6, %rd2, %rd5;
.loc 2 72 1
ld.global.f32 %f6, [%rd6];
.loc 4 2765 10
min.f32 %f7, %f7, %f6;
.loc 2 72 22
add.s32 %r17, %r17, 1;
.loc 2 72 1
setp.lt.s32 %p3, %r17, %r8;
@%p3 bra BB92_3;
BB92_4:
mul.wide.s32 %rd7, %r16, 4;
add.s64 %rd8, %rd1, %rd7;
.loc 2 72 1
st.global.f32 [%rd8], %f7;
.loc 2 72 22
add.s32 %r16, %r16, %r1;
.loc 2 72 1
setp.lt.s32 %p4, %r16, %r7;
@%p4 bra BB92_1;
BB92_5:
.loc 2 72 2
ret;
}
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